From: Stefan Agner <stefan@agner.ch> To: dri-devel@lists.freedesktop.org, thierry.reding@gmail.com Cc: stefan@agner.ch, airlied@linux.ie, daniel.vetter@ffwll.ch, jianwei.wang.chn@gmail.com, alison.wang@freescale.com, meng.yi@nxp.com, linux@arm.linux.org.uk, p.zabel@pengutronix.de, denis@eukrea.com, eric@eukrea.com, ville.syrjala@linux.intel.com, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/3] drm/fsl-dcu: use bus_flags for pixel clock polarity Date: Mon, 8 Feb 2016 13:57:43 -0800 [thread overview] Message-ID: <1454968663-30066-4-git-send-email-stefan@agner.ch> (raw) In-Reply-To: <1454968663-30066-1-git-send-email-stefan@agner.ch> The drivers current default configuration drives the pixel data on rising edge of the pixel clock. However, most display sample data on rising edge... This leads to color shift artefacts visible especially at edges. This patch changes the relevant defines to be useful and actually set the bits, and changes pixel clock polarity to drive the pixel data on falling edge by default. The patch also adds an explicit pixel clock polarity flag to the display introduced with the driver (NEC WQVGA "nec,nl4827hc19-05b") using the new bus_flags field to retain the initial behavior. Signed-off-by: Stefan Agner <stefan@agner.ch> --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 5 +++++ drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h | 4 ++-- drivers/gpu/drm/panel/panel-simple.c | 5 ++++- 3 files changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c index b36f815..afcbdd8 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c @@ -73,6 +73,7 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) { struct drm_device *dev = crtc->dev; struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; + struct drm_connector *con = &fsl_dev->connector.base; struct drm_display_mode *mode = &crtc->state->mode; unsigned int hbp, hfp, hsw, vbp, vfp, vsw, div, index, pol = 0; unsigned long dcuclk; @@ -89,6 +90,10 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) vfp = mode->vsync_start - mode->vdisplay; vsw = mode->vsync_end - mode->vsync_start; + /* INV_PXCK as default (most display sample data on rising edge) */ + if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE)) + pol |= DCU_SYN_POL_INV_PXCK; + if (mode->flags & DRM_MODE_FLAG_NHSYNC) pol |= DCU_SYN_POL_INV_HS_LOW; diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h index 6413ac9..af3a707 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h @@ -47,8 +47,8 @@ #define DCU_VSYN_PARA_FP(x) (x) #define DCU_SYN_POL 0x0024 -#define DCU_SYN_POL_INV_PXCK_FALL (0 << 6) -#define DCU_SYN_POL_NEG_REMAIN (0 << 5) +#define DCU_SYN_POL_INV_PXCK BIT(6) +#define DCU_SYN_POL_NEG BIT(5) #define DCU_SYN_POL_INV_VS_LOW BIT(1) #define DCU_SYN_POL_INV_HS_LOW BIT(0) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 2164c99..7fae3d9 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -72,6 +72,7 @@ struct panel_desc { } delay; u32 bus_format; + u32 bus_flags; }; struct panel_simple { @@ -144,6 +145,7 @@ static int panel_simple_get_fixed_modes(struct panel_simple *panel) if (panel->desc->bus_format) drm_display_info_set_bus_formats(&connector->display_info, &panel->desc->bus_format, 1); + connector->display_info.bus_flags = panel->desc->bus_flags; return num; } @@ -1027,7 +1029,8 @@ static const struct panel_desc nec_nl4827hc19_05b = { .width = 95, .height = 54, }, - .bus_format = MEDIA_BUS_FMT_RGB888_1X24 + .bus_format = MEDIA_BUS_FMT_RGB888_1X24, + .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE, }; static const struct display_timing okaya_rs800480t_7x0gp_timing = { -- 2.7.1
WARNING: multiple messages have this Message-ID (diff)
From: Stefan Agner <stefan@agner.ch> To: dri-devel@lists.freedesktop.org, thierry.reding@gmail.com Cc: meng.yi@nxp.com, linux@arm.linux.org.uk, eric@eukrea.com, alison.wang@freescale.com, daniel.vetter@ffwll.ch, linux-kernel@vger.kernel.org, denis@eukrea.com Subject: [PATCH v2 3/3] drm/fsl-dcu: use bus_flags for pixel clock polarity Date: Mon, 8 Feb 2016 13:57:43 -0800 [thread overview] Message-ID: <1454968663-30066-4-git-send-email-stefan@agner.ch> (raw) In-Reply-To: <1454968663-30066-1-git-send-email-stefan@agner.ch> The drivers current default configuration drives the pixel data on rising edge of the pixel clock. However, most display sample data on rising edge... This leads to color shift artefacts visible especially at edges. This patch changes the relevant defines to be useful and actually set the bits, and changes pixel clock polarity to drive the pixel data on falling edge by default. The patch also adds an explicit pixel clock polarity flag to the display introduced with the driver (NEC WQVGA "nec,nl4827hc19-05b") using the new bus_flags field to retain the initial behavior. Signed-off-by: Stefan Agner <stefan@agner.ch> --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 5 +++++ drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h | 4 ++-- drivers/gpu/drm/panel/panel-simple.c | 5 ++++- 3 files changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c index b36f815..afcbdd8 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c @@ -73,6 +73,7 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) { struct drm_device *dev = crtc->dev; struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; + struct drm_connector *con = &fsl_dev->connector.base; struct drm_display_mode *mode = &crtc->state->mode; unsigned int hbp, hfp, hsw, vbp, vfp, vsw, div, index, pol = 0; unsigned long dcuclk; @@ -89,6 +90,10 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) vfp = mode->vsync_start - mode->vdisplay; vsw = mode->vsync_end - mode->vsync_start; + /* INV_PXCK as default (most display sample data on rising edge) */ + if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE)) + pol |= DCU_SYN_POL_INV_PXCK; + if (mode->flags & DRM_MODE_FLAG_NHSYNC) pol |= DCU_SYN_POL_INV_HS_LOW; diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h index 6413ac9..af3a707 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h @@ -47,8 +47,8 @@ #define DCU_VSYN_PARA_FP(x) (x) #define DCU_SYN_POL 0x0024 -#define DCU_SYN_POL_INV_PXCK_FALL (0 << 6) -#define DCU_SYN_POL_NEG_REMAIN (0 << 5) +#define DCU_SYN_POL_INV_PXCK BIT(6) +#define DCU_SYN_POL_NEG BIT(5) #define DCU_SYN_POL_INV_VS_LOW BIT(1) #define DCU_SYN_POL_INV_HS_LOW BIT(0) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 2164c99..7fae3d9 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -72,6 +72,7 @@ struct panel_desc { } delay; u32 bus_format; + u32 bus_flags; }; struct panel_simple { @@ -144,6 +145,7 @@ static int panel_simple_get_fixed_modes(struct panel_simple *panel) if (panel->desc->bus_format) drm_display_info_set_bus_formats(&connector->display_info, &panel->desc->bus_format, 1); + connector->display_info.bus_flags = panel->desc->bus_flags; return num; } @@ -1027,7 +1029,8 @@ static const struct panel_desc nec_nl4827hc19_05b = { .width = 95, .height = 54, }, - .bus_format = MEDIA_BUS_FMT_RGB888_1X24 + .bus_format = MEDIA_BUS_FMT_RGB888_1X24, + .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE, }; static const struct display_timing okaya_rs800480t_7x0gp_timing = { -- 2.7.1 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2016-02-08 21:57 UTC|newest] Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-02-08 21:57 [PATCH v2 0/3] drm: introduce bus_flags for pixel clock polarity Stefan Agner 2016-02-08 21:57 ` Stefan Agner 2016-02-08 21:57 ` [PATCH v2 1/3] drm/fsl-dcu: use mode flags for hsync/vsync polarity Stefan Agner 2016-02-08 21:57 ` Stefan Agner 2016-02-25 16:48 ` Thierry Reding 2016-02-25 16:48 ` Thierry Reding 2016-02-25 23:55 ` Stefan Agner 2016-02-25 23:55 ` Stefan Agner 2016-02-08 21:57 ` [PATCH v2 2/3] drm: introduce bus_flags in drm_display_info Stefan Agner 2016-02-08 21:57 ` Stefan Agner 2016-02-08 21:57 ` Stefan Agner [this message] 2016-02-08 21:57 ` [PATCH v2 3/3] drm/fsl-dcu: use bus_flags for pixel clock polarity Stefan Agner 2016-02-23 23:30 ` [PATCH v2 0/3] drm: introduce " Stefan Agner 2016-02-23 23:30 ` Stefan Agner 2016-02-24 10:28 ` Philipp Zabel 2016-02-25 7:59 ` Manfred Schlaegl 2016-02-25 7:59 ` Manfred Schlaegl 2016-02-24 11:06 ` Tomi Valkeinen 2016-02-24 11:06 ` Tomi Valkeinen 2016-02-24 19:02 ` Stefan Agner 2016-02-24 19:02 ` Stefan Agner 2016-02-24 20:17 ` Ville Syrjälä 2016-02-24 20:17 ` Ville Syrjälä
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1454968663-30066-4-git-send-email-stefan@agner.ch \ --to=stefan@agner.ch \ --cc=airlied@linux.ie \ --cc=alison.wang@freescale.com \ --cc=daniel.vetter@ffwll.ch \ --cc=denis@eukrea.com \ --cc=dri-devel@lists.freedesktop.org \ --cc=eric@eukrea.com \ --cc=jianwei.wang.chn@gmail.com \ --cc=linux-kernel@vger.kernel.org \ --cc=linux@arm.linux.org.uk \ --cc=meng.yi@nxp.com \ --cc=p.zabel@pengutronix.de \ --cc=thierry.reding@gmail.com \ --cc=ville.syrjala@linux.intel.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.