From: Andre Przywara <andre.przywara@arm.com> To: Christoffer Dall <christoffer.dall@linaro.org>, Marc Zyngier <marc.zyngier@arm.com>, Eric Auger <eric.auger@linaro.org> Cc: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org Subject: [PATCH v4 07/12] KVM: arm64: add data structures to model ITS interrupt translation Date: Sat, 26 Mar 2016 02:14:05 +0000 [thread overview] Message-ID: <1458958450-19662-8-git-send-email-andre.przywara@arm.com> (raw) In-Reply-To: <1458958450-19662-1-git-send-email-andre.przywara@arm.com> The GICv3 Interrupt Translation Service (ITS) uses tables in memory to allow a sophisticated interrupt routing. It features device tables, an interrupt table per device and a table connecting "collections" to actual CPUs (aka. redistributors in the GICv3 lingo). Since the interrupt numbers for the LPIs are allocated quite sparsely and the range can be quite huge (8192 LPIs being the minimum), using bitmaps or arrays for storing information is a waste of memory. We use linked lists instead, which we iterate linearily. This works very well with the actual number of LPIs/MSIs in the guest being quite low. Should the number of LPIs exceed the number where iterating through lists seems acceptable, we can later revisit this and use more efficient data structures. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- include/kvm/vgic/vgic.h | 3 ++ virt/kvm/arm/vgic/its-emul.c | 66 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 69 insertions(+) diff --git a/include/kvm/vgic/vgic.h b/include/kvm/vgic/vgic.h index bafea11..ecf3260 100644 --- a/include/kvm/vgic/vgic.h +++ b/include/kvm/vgic/vgic.h @@ -22,6 +22,7 @@ #include <linux/spinlock.h> #include <linux/types.h> #include <kvm/iodev.h> +#include <linux/list.h> #define VGIC_V3_MAX_CPUS 255 #define VGIC_V2_MAX_CPUS 8 @@ -118,6 +119,8 @@ struct vgic_its { u64 cbaser; int creadr; int cwriter; + struct list_head device_list; + struct list_head collection_list; }; struct vgic_dist { diff --git a/virt/kvm/arm/vgic/its-emul.c b/virt/kvm/arm/vgic/its-emul.c index de8d360..c0334ff 100644 --- a/virt/kvm/arm/vgic/its-emul.c +++ b/virt/kvm/arm/vgic/its-emul.c @@ -21,6 +21,7 @@ #include <linux/kvm.h> #include <linux/kvm_host.h> #include <linux/interrupt.h> +#include <linux/list.h> #include <linux/irqchip/arm-gic-v3.h> @@ -31,6 +32,34 @@ #include "vgic.h" #include "vgic_mmio.h" +struct its_device { + struct list_head dev_list; + + /* the head for the list of ITTEs */ + struct list_head itt; + u32 device_id; +}; + +#define COLLECTION_NOT_MAPPED ((u32)-1) + +struct its_collection { + struct list_head coll_list; + + u32 collection_id; + u32 target_addr; +}; + +#define its_is_collection_mapped(coll) ((coll) && \ + ((coll)->target_addr != COLLECTION_NOT_MAPPED)) + +struct its_itte { + struct list_head itte_list; + + struct its_collection *collection; + u32 lpi; + u32 event_id; +}; + #define BASER_BASE_ADDRESS(x) ((x) & 0xfffffffff000ULL) static int vgic_mmio_read_its_ctlr(struct kvm_vcpu *vcpu, @@ -137,6 +166,12 @@ static int vgic_mmio_read_its_idregs(struct kvm_vcpu *vcpu, return 0; } +static void its_free_itte(struct its_itte *itte) +{ + list_del(&itte->itte_list); + kfree(itte); +} + /* * This function is called with both the ITS and the distributor lock dropped, * so the actual command handlers must take the respective locks when needed. @@ -309,6 +344,9 @@ int vits_init(struct kvm *kvm) spin_lock_init(&its->lock); + INIT_LIST_HEAD(&its->device_list); + INIT_LIST_HEAD(&its->collection_list); + regions = kmalloc_array(ARRAY_SIZE(its_registers), sizeof(struct vgic_io_device), GFP_KERNEL); @@ -332,11 +370,39 @@ void vits_destroy(struct kvm *kvm) { struct vgic_dist *dist = &kvm->arch.vgic; struct vgic_its *its = &dist->its; + struct its_device *dev; + struct its_itte *itte; + struct list_head *dev_cur, *dev_temp; + struct list_head *cur, *temp; if (!vgic_has_its(kvm)) return; + /* + * We may end up here without the lists ever having been initialized. + * Check this and bail out early to avoid dereferencing a NULL pointer. + */ + if (!its->device_list.next) + return; + + spin_lock(&its->lock); + list_for_each_safe(dev_cur, dev_temp, &its->device_list) { + dev = container_of(dev_cur, struct its_device, dev_list); + list_for_each_safe(cur, temp, &dev->itt) { + itte = (container_of(cur, struct its_itte, itte_list)); + its_free_itte(itte); + } + list_del(dev_cur); + kfree(dev); + } + + list_for_each_safe(cur, temp, &its->collection_list) { + list_del(cur); + kfree(container_of(cur, struct its_collection, coll_list)); + } + kfree(dist->pendbaser); its->enabled = false; + spin_unlock(&its->lock); } -- 2.7.3
WARNING: multiple messages have this Message-ID (diff)
From: andre.przywara@arm.com (Andre Przywara) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 07/12] KVM: arm64: add data structures to model ITS interrupt translation Date: Sat, 26 Mar 2016 02:14:05 +0000 [thread overview] Message-ID: <1458958450-19662-8-git-send-email-andre.przywara@arm.com> (raw) In-Reply-To: <1458958450-19662-1-git-send-email-andre.przywara@arm.com> The GICv3 Interrupt Translation Service (ITS) uses tables in memory to allow a sophisticated interrupt routing. It features device tables, an interrupt table per device and a table connecting "collections" to actual CPUs (aka. redistributors in the GICv3 lingo). Since the interrupt numbers for the LPIs are allocated quite sparsely and the range can be quite huge (8192 LPIs being the minimum), using bitmaps or arrays for storing information is a waste of memory. We use linked lists instead, which we iterate linearily. This works very well with the actual number of LPIs/MSIs in the guest being quite low. Should the number of LPIs exceed the number where iterating through lists seems acceptable, we can later revisit this and use more efficient data structures. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- include/kvm/vgic/vgic.h | 3 ++ virt/kvm/arm/vgic/its-emul.c | 66 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 69 insertions(+) diff --git a/include/kvm/vgic/vgic.h b/include/kvm/vgic/vgic.h index bafea11..ecf3260 100644 --- a/include/kvm/vgic/vgic.h +++ b/include/kvm/vgic/vgic.h @@ -22,6 +22,7 @@ #include <linux/spinlock.h> #include <linux/types.h> #include <kvm/iodev.h> +#include <linux/list.h> #define VGIC_V3_MAX_CPUS 255 #define VGIC_V2_MAX_CPUS 8 @@ -118,6 +119,8 @@ struct vgic_its { u64 cbaser; int creadr; int cwriter; + struct list_head device_list; + struct list_head collection_list; }; struct vgic_dist { diff --git a/virt/kvm/arm/vgic/its-emul.c b/virt/kvm/arm/vgic/its-emul.c index de8d360..c0334ff 100644 --- a/virt/kvm/arm/vgic/its-emul.c +++ b/virt/kvm/arm/vgic/its-emul.c @@ -21,6 +21,7 @@ #include <linux/kvm.h> #include <linux/kvm_host.h> #include <linux/interrupt.h> +#include <linux/list.h> #include <linux/irqchip/arm-gic-v3.h> @@ -31,6 +32,34 @@ #include "vgic.h" #include "vgic_mmio.h" +struct its_device { + struct list_head dev_list; + + /* the head for the list of ITTEs */ + struct list_head itt; + u32 device_id; +}; + +#define COLLECTION_NOT_MAPPED ((u32)-1) + +struct its_collection { + struct list_head coll_list; + + u32 collection_id; + u32 target_addr; +}; + +#define its_is_collection_mapped(coll) ((coll) && \ + ((coll)->target_addr != COLLECTION_NOT_MAPPED)) + +struct its_itte { + struct list_head itte_list; + + struct its_collection *collection; + u32 lpi; + u32 event_id; +}; + #define BASER_BASE_ADDRESS(x) ((x) & 0xfffffffff000ULL) static int vgic_mmio_read_its_ctlr(struct kvm_vcpu *vcpu, @@ -137,6 +166,12 @@ static int vgic_mmio_read_its_idregs(struct kvm_vcpu *vcpu, return 0; } +static void its_free_itte(struct its_itte *itte) +{ + list_del(&itte->itte_list); + kfree(itte); +} + /* * This function is called with both the ITS and the distributor lock dropped, * so the actual command handlers must take the respective locks when needed. @@ -309,6 +344,9 @@ int vits_init(struct kvm *kvm) spin_lock_init(&its->lock); + INIT_LIST_HEAD(&its->device_list); + INIT_LIST_HEAD(&its->collection_list); + regions = kmalloc_array(ARRAY_SIZE(its_registers), sizeof(struct vgic_io_device), GFP_KERNEL); @@ -332,11 +370,39 @@ void vits_destroy(struct kvm *kvm) { struct vgic_dist *dist = &kvm->arch.vgic; struct vgic_its *its = &dist->its; + struct its_device *dev; + struct its_itte *itte; + struct list_head *dev_cur, *dev_temp; + struct list_head *cur, *temp; if (!vgic_has_its(kvm)) return; + /* + * We may end up here without the lists ever having been initialized. + * Check this and bail out early to avoid dereferencing a NULL pointer. + */ + if (!its->device_list.next) + return; + + spin_lock(&its->lock); + list_for_each_safe(dev_cur, dev_temp, &its->device_list) { + dev = container_of(dev_cur, struct its_device, dev_list); + list_for_each_safe(cur, temp, &dev->itt) { + itte = (container_of(cur, struct its_itte, itte_list)); + its_free_itte(itte); + } + list_del(dev_cur); + kfree(dev); + } + + list_for_each_safe(cur, temp, &its->collection_list) { + list_del(cur); + kfree(container_of(cur, struct its_collection, coll_list)); + } + kfree(dist->pendbaser); its->enabled = false; + spin_unlock(&its->lock); } -- 2.7.3
next prev parent reply other threads:[~2016-03-26 2:14 UTC|newest] Thread overview: 120+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-03-26 2:13 [PATCH v4 00/12] KVM: arm64: GICv3 ITS emulation Andre Przywara 2016-03-26 2:13 ` Andre Przywara 2016-03-26 2:13 ` [PATCH v4 01/12] KVM: extend struct kvm_msi to hold a 32-bit device ID Andre Przywara 2016-03-26 2:13 ` Andre Przywara 2016-04-03 9:15 ` Christoffer Dall 2016-04-03 9:15 ` Christoffer Dall 2016-05-25 15:55 ` Andre Przywara 2016-05-25 15:55 ` Andre Przywara 2016-05-25 16:16 ` Marc Zyngier 2016-05-25 16:16 ` Marc Zyngier 2016-05-31 13:05 ` Christoffer Dall 2016-05-31 13:05 ` Christoffer Dall 2016-05-05 17:55 ` Chalamarla, Tirumalesh 2016-05-05 17:55 ` Chalamarla, Tirumalesh 2016-03-26 2:14 ` [PATCH v4 02/12] KVM: arm/arm64: extend arch CAP checks to allow per-VM capabilities Andre Przywara 2016-03-26 2:14 ` Andre Przywara 2016-04-03 10:08 ` Christoffer Dall 2016-04-03 10:08 ` Christoffer Dall 2016-04-05 12:48 ` Eric Auger 2016-04-05 12:48 ` Eric Auger 2016-05-05 18:00 ` Chalamarla, Tirumalesh 2016-05-05 18:00 ` Chalamarla, Tirumalesh 2016-03-26 2:14 ` [PATCH v4 03/12] KVM: arm64: Introduce new MMIO region for the ITS base address Andre Przywara 2016-03-26 2:14 ` Andre Przywara 2016-04-03 10:08 ` Christoffer Dall 2016-04-03 10:08 ` Christoffer Dall 2016-04-05 12:47 ` Eric Auger 2016-04-05 12:47 ` Eric Auger 2016-04-07 13:44 ` Marc Zyngier 2016-04-07 13:44 ` Marc Zyngier 2016-05-05 18:08 ` Chalamarla, Tirumalesh 2016-05-05 18:08 ` Chalamarla, Tirumalesh 2016-05-09 15:47 ` Marc Zyngier 2016-05-09 15:47 ` Marc Zyngier 2016-05-09 16:53 ` Chalamarla, Tirumalesh 2016-05-09 16:53 ` Chalamarla, Tirumalesh 2016-05-09 17:09 ` Marc Zyngier 2016-05-09 17:09 ` Marc Zyngier 2016-03-26 2:14 ` [PATCH v4 04/12] KVM: arm64: handle ITS related GICv3 redistributor registers Andre Przywara 2016-03-26 2:14 ` Andre Przywara 2016-04-03 10:08 ` Christoffer Dall 2016-04-03 10:08 ` Christoffer Dall 2016-04-05 12:55 ` Eric Auger 2016-04-05 12:55 ` Eric Auger 2016-04-05 15:17 ` Eric Auger 2016-04-05 15:17 ` Eric Auger 2016-04-07 13:54 ` Marc Zyngier 2016-04-07 13:54 ` Marc Zyngier 2016-04-07 13:58 ` Marc Zyngier 2016-04-07 13:58 ` Marc Zyngier 2016-05-05 18:06 ` Chalamarla, Tirumalesh 2016-05-05 18:06 ` Chalamarla, Tirumalesh 2016-03-26 2:14 ` [PATCH v4 05/12] KVM: arm64: introduce ITS emulation file with stub functions Andre Przywara 2016-03-26 2:14 ` Andre Przywara 2016-04-05 16:03 ` Eric Auger 2016-04-05 16:03 ` Eric Auger 2016-04-07 14:04 ` Marc Zyngier 2016-04-07 14:04 ` Marc Zyngier 2016-04-07 14:08 ` Eric Auger 2016-04-07 14:08 ` Eric Auger 2016-04-07 14:48 ` Marc Zyngier 2016-04-07 14:48 ` Marc Zyngier 2016-04-07 15:09 ` Eric Auger 2016-04-07 15:09 ` Eric Auger 2016-04-07 15:19 ` Marc Zyngier 2016-04-07 15:19 ` Marc Zyngier 2016-03-26 2:14 ` [PATCH v4 06/12] KVM: arm64: implement basic ITS register handlers Andre Przywara 2016-03-26 2:14 ` Andre Przywara 2016-04-03 10:08 ` Christoffer Dall 2016-04-03 10:08 ` Christoffer Dall 2016-04-06 9:36 ` Eric Auger 2016-04-06 9:36 ` Eric Auger 2016-05-25 13:49 ` Andre Przywara 2016-05-25 13:49 ` Andre Przywara 2016-04-07 14:35 ` Marc Zyngier 2016-04-07 14:35 ` Marc Zyngier 2016-05-25 11:37 ` Andre Przywara 2016-05-25 11:37 ` Andre Przywara 2016-05-26 9:10 ` Marc Zyngier 2016-05-26 9:10 ` Marc Zyngier 2016-06-03 15:42 ` Andre Przywara 2016-06-03 15:42 ` Andre Przywara 2016-06-03 16:54 ` Marc Zyngier 2016-06-03 16:54 ` Marc Zyngier 2016-05-05 18:51 ` Chalamarla, Tirumalesh 2016-05-05 18:51 ` Chalamarla, Tirumalesh 2016-03-26 2:14 ` Andre Przywara [this message] 2016-03-26 2:14 ` [PATCH v4 07/12] KVM: arm64: add data structures to model ITS interrupt translation Andre Przywara 2016-04-06 9:53 ` Eric Auger 2016-04-06 9:53 ` Eric Auger 2016-03-26 2:14 ` [PATCH v4 08/12] KVM: arm64: connect LPIs to the VGIC emulation Andre Przywara 2016-03-26 2:14 ` Andre Przywara 2016-04-06 12:00 ` Eric Auger 2016-04-06 12:00 ` Eric Auger 2016-05-05 18:59 ` Chalamarla, Tirumalesh 2016-05-05 18:59 ` Chalamarla, Tirumalesh 2016-03-26 2:14 ` [PATCH v4 09/12] KVM: arm64: sync LPI configuration and pending tables Andre Przywara 2016-03-26 2:14 ` Andre Przywara 2016-04-06 13:41 ` Eric Auger 2016-04-06 13:41 ` Eric Auger 2016-06-03 14:17 ` Andre Przywara 2016-06-03 14:17 ` Andre Przywara 2016-03-26 2:14 ` [PATCH v4 10/12] KVM: arm64: implement ITS command queue command handlers Andre Przywara 2016-03-26 2:14 ` Andre Przywara 2016-05-05 19:12 ` Chalamarla, Tirumalesh 2016-05-05 19:12 ` Chalamarla, Tirumalesh 2016-05-25 14:34 ` Andre Przywara 2016-05-25 14:34 ` Andre Przywara 2016-03-26 2:14 ` [PATCH v4 11/12] KVM: arm64: implement MSI injection in ITS emulation Andre Przywara 2016-03-26 2:14 ` Andre Przywara 2016-03-26 2:14 ` [PATCH v4 12/12] KVM: arm64: enable ITS emulation as a virtual MSI controller Andre Przywara 2016-03-26 2:14 ` Andre Przywara 2016-06-03 4:26 ` [PATCH v4 00/12] KVM: arm64: GICv3 ITS emulation Bharat Bhushan 2016-06-03 4:26 ` Bharat Bhushan 2016-06-03 14:32 ` Andre Przywara 2016-06-03 14:32 ` Andre Przywara 2016-06-06 5:29 ` Bharat Bhushan 2016-06-06 5:29 ` Bharat Bhushan 2016-06-07 8:02 ` Christoffer Dall 2016-06-07 8:02 ` Christoffer Dall
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