From: Chanwoo Choi <cw00.choi@samsung.com> To: k.kozlowski@samsung.com, kgene@kernel.org, s.nawrocki@samsung.com, tomasz.figa@gmail.com Cc: jh80.chung@samsung.com, andi.shyti@samsung.com, inki.dae@samsung.com, sw0312.kim@samsung.com, pankaj.dubey@samsung.com, cw00.choi@samsung.com, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Kukjin Kim <kgene.kim@samsung.com> Subject: [PATCH v4 1/9] ARM: dts: Add initial pin configuration for exynos3250-rinato Date: Thu, 31 Mar 2016 11:47:57 +0900 [thread overview] Message-ID: <1459392485-11327-2-git-send-email-cw00.choi@samsung.com> (raw) In-Reply-To: <1459392485-11327-1-git-send-email-cw00.choi@samsung.com> This patch adds initial pin configuration using pinctrl subsystem to reduce leakage power-consumption of gpio pins in normal state. All pins included in this patch are NC (not connected) pin. Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> --- arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 38 +++++++++++++++++ arch/arm/boot/dts/exynos3250-rinato.dts | 71 ++++++++++++++++++++++++++++++- 2 files changed, 107 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi index 5ab81c39e2c9..ecf79386e891 100644 --- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi @@ -16,11 +16,49 @@ #define PIN_PULL_DOWN 1 #define PIN_PULL_UP 3 +#define PIN_DRV_LV1 0 +#define PIN_DRV_LV2 2 +#define PIN_DRV_LV3 1 +#define PIN_DRV_LV4 3 + #define PIN_PDN_OUT0 0 #define PIN_PDN_OUT1 1 #define PIN_PDN_INPUT 2 #define PIN_PDN_PREV 3 +#define PIN_IN(_pin, _pull, _drv) \ + _pin { \ + samsung,pins = #_pin; \ + samsung,pin-function = <0>; \ + samsung,pin-pud = <PIN_PULL_ ##_pull>; \ + samsung,pin-drv = <PIN_DRV_ ##_drv>; \ + } + +#define PIN_OUT(_pin, _drv) \ + _pin { \ + samsung,pins = #_pin; \ + samsung,pin-function = <1>; \ + samsung,pin-pud = <0>; \ + samsung,pin-drv = <PIN_DRV_ ##_drv>; \ + } + +#define PIN_OUT_SET(_pin, _val, _drv) \ + _pin { \ + samsung,pins = #_pin; \ + samsung,pin-function = <1>; \ + samsung,pin-pud = <0>; \ + samsung,pin-drv = <PIN_DRV_ ##_drv>; \ + samsung,pin-val = <_val>; \ + } + +#define PIN_CFG(_pin, _sel, _pull, _drv) \ + _pin { \ + samsung,pins = #_pin; \ + samsung,pin-function = <_sel>; \ + samsung,pin-pud = <PIN_PULL_ ##_pull>; \ + samsung,pin-drv = <PIN_DRV_ ##_drv>; \ + } + #define PIN_SLP(_pin, _mode, _pull) \ _pin { \ samsung,pins = #_pin; \ diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index 1f102f3a1ab1..31eb09bae0a2 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts @@ -681,7 +681,21 @@ &pinctrl_0 { pinctrl-names = "default"; - pinctrl-0 = <&sleep0>; + pinctrl-0 = <&initial0 &sleep0>; + + initial0: initial-state { + PIN_IN(gpa1-4, DOWN, LV1); + PIN_IN(gpa1-5, DOWN, LV1); + + PIN_IN(gpc0-0, DOWN, LV1); + PIN_IN(gpc0-1, DOWN, LV1); + PIN_IN(gpc0-2, DOWN, LV1); + PIN_IN(gpc0-3, DOWN, LV1); + PIN_IN(gpc0-4, DOWN, LV1); + + PIN_IN(gpd0-0, DOWN, LV1); + PIN_IN(gpd0-1, DOWN, LV1); + }; sleep0: sleep-state { PIN_SLP(gpa0-0, INPUT, DOWN); @@ -735,7 +749,60 @@ &pinctrl_1 { pinctrl-names = "default"; - pinctrl-0 = <&sleep1>; + pinctrl-0 = <&initial1 &sleep1>; + + initial1: initial-state { + PIN_IN(gpe0-6, DOWN, LV1); + PIN_IN(gpe0-7, DOWN, LV1); + + PIN_IN(gpe1-0, DOWN, LV1); + PIN_IN(gpe1-3, DOWN, LV1); + PIN_IN(gpe1-4, DOWN, LV1); + PIN_IN(gpe1-5, DOWN, LV1); + PIN_IN(gpe1-6, DOWN, LV1); + + PIN_IN(gpk2-0, DOWN, LV1); + PIN_IN(gpk2-1, DOWN, LV1); + PIN_IN(gpk2-2, DOWN, LV1); + PIN_IN(gpk2-3, DOWN, LV1); + PIN_IN(gpk2-4, DOWN, LV1); + PIN_IN(gpk2-5, DOWN, LV1); + PIN_IN(gpk2-6, DOWN, LV1); + + PIN_IN(gpm0-0, DOWN, LV1); + PIN_IN(gpm0-1, DOWN, LV1); + PIN_IN(gpm0-2, DOWN, LV1); + PIN_IN(gpm0-3, DOWN, LV1); + PIN_IN(gpm0-4, DOWN, LV1); + PIN_IN(gpm0-5, DOWN, LV1); + PIN_IN(gpm0-6, DOWN, LV1); + PIN_IN(gpm0-7, DOWN, LV1); + + PIN_IN(gpm1-0, DOWN, LV1); + PIN_IN(gpm1-1, DOWN, LV1); + PIN_IN(gpm1-2, DOWN, LV1); + PIN_IN(gpm1-3, DOWN, LV1); + PIN_IN(gpm1-4, DOWN, LV1); + PIN_IN(gpm1-5, DOWN, LV1); + PIN_IN(gpm1-6, DOWN, LV1); + + PIN_IN(gpm2-0, DOWN, LV1); + PIN_IN(gpm2-1, DOWN, LV1); + + PIN_IN(gpm3-0, DOWN, LV1); + PIN_IN(gpm3-1, DOWN, LV1); + PIN_IN(gpm3-2, DOWN, LV1); + PIN_IN(gpm3-3, DOWN, LV1); + PIN_IN(gpm3-4, DOWN, LV1); + + PIN_IN(gpm4-1, DOWN, LV1); + PIN_IN(gpm4-2, DOWN, LV1); + PIN_IN(gpm4-3, DOWN, LV1); + PIN_IN(gpm4-4, DOWN, LV1); + PIN_IN(gpm4-5, DOWN, LV1); + PIN_IN(gpm4-6, DOWN, LV1); + PIN_IN(gpm4-7, DOWN, LV1); + }; sleep1: sleep-state { PIN_SLP(gpe0-0, PREV, NONE); -- 1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: cw00.choi@samsung.com (Chanwoo Choi) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 1/9] ARM: dts: Add initial pin configuration for exynos3250-rinato Date: Thu, 31 Mar 2016 11:47:57 +0900 [thread overview] Message-ID: <1459392485-11327-2-git-send-email-cw00.choi@samsung.com> (raw) In-Reply-To: <1459392485-11327-1-git-send-email-cw00.choi@samsung.com> This patch adds initial pin configuration using pinctrl subsystem to reduce leakage power-consumption of gpio pins in normal state. All pins included in this patch are NC (not connected) pin. Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> --- arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 38 +++++++++++++++++ arch/arm/boot/dts/exynos3250-rinato.dts | 71 ++++++++++++++++++++++++++++++- 2 files changed, 107 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi index 5ab81c39e2c9..ecf79386e891 100644 --- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi @@ -16,11 +16,49 @@ #define PIN_PULL_DOWN 1 #define PIN_PULL_UP 3 +#define PIN_DRV_LV1 0 +#define PIN_DRV_LV2 2 +#define PIN_DRV_LV3 1 +#define PIN_DRV_LV4 3 + #define PIN_PDN_OUT0 0 #define PIN_PDN_OUT1 1 #define PIN_PDN_INPUT 2 #define PIN_PDN_PREV 3 +#define PIN_IN(_pin, _pull, _drv) \ + _pin { \ + samsung,pins = #_pin; \ + samsung,pin-function = <0>; \ + samsung,pin-pud = <PIN_PULL_ ##_pull>; \ + samsung,pin-drv = <PIN_DRV_ ##_drv>; \ + } + +#define PIN_OUT(_pin, _drv) \ + _pin { \ + samsung,pins = #_pin; \ + samsung,pin-function = <1>; \ + samsung,pin-pud = <0>; \ + samsung,pin-drv = <PIN_DRV_ ##_drv>; \ + } + +#define PIN_OUT_SET(_pin, _val, _drv) \ + _pin { \ + samsung,pins = #_pin; \ + samsung,pin-function = <1>; \ + samsung,pin-pud = <0>; \ + samsung,pin-drv = <PIN_DRV_ ##_drv>; \ + samsung,pin-val = <_val>; \ + } + +#define PIN_CFG(_pin, _sel, _pull, _drv) \ + _pin { \ + samsung,pins = #_pin; \ + samsung,pin-function = <_sel>; \ + samsung,pin-pud = <PIN_PULL_ ##_pull>; \ + samsung,pin-drv = <PIN_DRV_ ##_drv>; \ + } + #define PIN_SLP(_pin, _mode, _pull) \ _pin { \ samsung,pins = #_pin; \ diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index 1f102f3a1ab1..31eb09bae0a2 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts @@ -681,7 +681,21 @@ &pinctrl_0 { pinctrl-names = "default"; - pinctrl-0 = <&sleep0>; + pinctrl-0 = <&initial0 &sleep0>; + + initial0: initial-state { + PIN_IN(gpa1-4, DOWN, LV1); + PIN_IN(gpa1-5, DOWN, LV1); + + PIN_IN(gpc0-0, DOWN, LV1); + PIN_IN(gpc0-1, DOWN, LV1); + PIN_IN(gpc0-2, DOWN, LV1); + PIN_IN(gpc0-3, DOWN, LV1); + PIN_IN(gpc0-4, DOWN, LV1); + + PIN_IN(gpd0-0, DOWN, LV1); + PIN_IN(gpd0-1, DOWN, LV1); + }; sleep0: sleep-state { PIN_SLP(gpa0-0, INPUT, DOWN); @@ -735,7 +749,60 @@ &pinctrl_1 { pinctrl-names = "default"; - pinctrl-0 = <&sleep1>; + pinctrl-0 = <&initial1 &sleep1>; + + initial1: initial-state { + PIN_IN(gpe0-6, DOWN, LV1); + PIN_IN(gpe0-7, DOWN, LV1); + + PIN_IN(gpe1-0, DOWN, LV1); + PIN_IN(gpe1-3, DOWN, LV1); + PIN_IN(gpe1-4, DOWN, LV1); + PIN_IN(gpe1-5, DOWN, LV1); + PIN_IN(gpe1-6, DOWN, LV1); + + PIN_IN(gpk2-0, DOWN, LV1); + PIN_IN(gpk2-1, DOWN, LV1); + PIN_IN(gpk2-2, DOWN, LV1); + PIN_IN(gpk2-3, DOWN, LV1); + PIN_IN(gpk2-4, DOWN, LV1); + PIN_IN(gpk2-5, DOWN, LV1); + PIN_IN(gpk2-6, DOWN, LV1); + + PIN_IN(gpm0-0, DOWN, LV1); + PIN_IN(gpm0-1, DOWN, LV1); + PIN_IN(gpm0-2, DOWN, LV1); + PIN_IN(gpm0-3, DOWN, LV1); + PIN_IN(gpm0-4, DOWN, LV1); + PIN_IN(gpm0-5, DOWN, LV1); + PIN_IN(gpm0-6, DOWN, LV1); + PIN_IN(gpm0-7, DOWN, LV1); + + PIN_IN(gpm1-0, DOWN, LV1); + PIN_IN(gpm1-1, DOWN, LV1); + PIN_IN(gpm1-2, DOWN, LV1); + PIN_IN(gpm1-3, DOWN, LV1); + PIN_IN(gpm1-4, DOWN, LV1); + PIN_IN(gpm1-5, DOWN, LV1); + PIN_IN(gpm1-6, DOWN, LV1); + + PIN_IN(gpm2-0, DOWN, LV1); + PIN_IN(gpm2-1, DOWN, LV1); + + PIN_IN(gpm3-0, DOWN, LV1); + PIN_IN(gpm3-1, DOWN, LV1); + PIN_IN(gpm3-2, DOWN, LV1); + PIN_IN(gpm3-3, DOWN, LV1); + PIN_IN(gpm3-4, DOWN, LV1); + + PIN_IN(gpm4-1, DOWN, LV1); + PIN_IN(gpm4-2, DOWN, LV1); + PIN_IN(gpm4-3, DOWN, LV1); + PIN_IN(gpm4-4, DOWN, LV1); + PIN_IN(gpm4-5, DOWN, LV1); + PIN_IN(gpm4-6, DOWN, LV1); + PIN_IN(gpm4-7, DOWN, LV1); + }; sleep1: sleep-state { PIN_SLP(gpe0-0, PREV, NONE); -- 1.9.1
next prev parent reply other threads:[~2016-03-31 2:49 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-03-31 2:47 [PATCH v4 0/9] ARM: dts: Add new Exynos3250-based ARTIK5 module dtsi file Chanwoo Choi 2016-03-31 2:47 ` Chanwoo Choi 2016-03-31 2:47 ` Chanwoo Choi 2016-03-31 2:47 ` Chanwoo Choi [this message] 2016-03-31 2:47 ` [PATCH v4 1/9] ARM: dts: Add initial pin configuration for exynos3250-rinato Chanwoo Choi 2016-03-31 4:46 ` Krzysztof Kozlowski 2016-03-31 4:46 ` Krzysztof Kozlowski 2016-03-31 2:47 ` [PATCH v4 2/9] dt-bindings: Add the clock id of UART2 and MMC2 for Exynos3250 Chanwoo Choi 2016-03-31 2:47 ` Chanwoo Choi 2016-03-31 2:47 ` Chanwoo Choi 2016-03-31 2:47 ` [PATCH v4 3/9] clk: samsung: exynos3250: Add UART2 clock Chanwoo Choi 2016-03-31 2:47 ` Chanwoo Choi 2016-03-31 2:48 ` [PATCH v4 4/9] clk: samsung: exynos3250: Add MMC2 clock Chanwoo Choi 2016-03-31 2:48 ` Chanwoo Choi 2016-03-31 2:48 ` [PATCH v4 5/9] ARM: dts: Add UART2 dt node for Exynos3250 SoC Chanwoo Choi 2016-03-31 2:48 ` Chanwoo Choi 2016-03-31 2:48 ` Chanwoo Choi 2016-03-31 2:48 ` [PATCH v4 6/9] ARM: dts: Add initial gpio setting of MMC2 device for exynos3250-monk Chanwoo Choi 2016-03-31 2:48 ` Chanwoo Choi 2016-03-31 4:46 ` Krzysztof Kozlowski 2016-03-31 4:46 ` Krzysztof Kozlowski 2016-03-31 2:48 ` [PATCH v4 7/9] ARM: dts: Add MSHC2 dt node for Exynos3250 SoC Chanwoo Choi 2016-03-31 2:48 ` Chanwoo Choi 2016-03-31 2:48 ` [PATCH v4 8/9] ARM: dts: Add exynos3250-artik5 dtsi file for ARTIK5 module Chanwoo Choi 2016-03-31 2:48 ` Chanwoo Choi 2016-03-31 2:48 ` [PATCH v4 9/9] ARM: dts: Add MSHC2 dt node for SD card for exynos3250-artik5-eval board Chanwoo Choi 2016-03-31 2:48 ` Chanwoo Choi 2016-03-31 2:48 ` Chanwoo Choi 2016-04-01 0:29 ` [PATCH v4 0/9] ARM: dts: Add new Exynos3250-based ARTIK5 module dtsi file Krzysztof Kozlowski 2016-04-01 0:29 ` Krzysztof Kozlowski
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