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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v2 7/9] drm/i915: Reset engine->last_submitted_seqno
Date: Wed,  6 Apr 2016 13:33:21 +0100	[thread overview]
Message-ID: <1459946003-24543-7-git-send-email-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <1459946003-24543-1-git-send-email-chris@chris-wilson.co.uk>

When we change the current seqno, we also need to remember to reset the
last_submitted_seqno for the engine.

Testcase: igt/gem_exec_whisper
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 0e6490074011..6b4952031e30 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2578,6 +2578,7 @@ void intel_ring_init_seqno(struct intel_engine_cs *engine, u32 seqno)
 	       sizeof(engine->semaphore.sync_seqno));
 
 	engine->set_seqno(engine, seqno);
+	engine->last_submitted_seqno = seqno;
 
 	engine->hangcheck.seqno = seqno;
 }
-- 
2.8.0.rc3

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  parent reply	other threads:[~2016-04-06 12:33 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-05 23:57 [PATCH 1/7] drm/i915: Include engine->last_submitted_seqno in GPU error state Chris Wilson
2016-04-05 23:57 ` [PATCH 2/7] drm/i915: On GPU reset, set the HWS breadcrumb to the last seqno Chris Wilson
2016-04-06  9:29   ` Mika Kuoppala
2016-04-06 10:40   ` Joonas Lahtinen
2016-04-05 23:57 ` [PATCH 3/7] drm/i915: Remove unneeded drm_device pointer from intel_ring_init_seqno() Chris Wilson
2016-04-06  9:08   ` Joonas Lahtinen
2016-04-05 23:57 ` [PATCH 4/7] drm/i915: Move the hw semaphore initialisation from GEM to the engine Chris Wilson
2016-04-06  9:29   ` Mika Kuoppala
2016-04-06 10:27   ` Joonas Lahtinen
2016-04-05 23:57 ` [PATCH 5/7] drm/i915: Reset semaphore page for gen8 Chris Wilson
2016-04-06  9:58   ` Joonas Lahtinen
2016-04-06 10:10     ` Chris Wilson
2016-04-06 10:43       ` Joonas Lahtinen
2016-04-05 23:57 ` [PATCH 6/7] drm/i915: Reset engine->last_submitted_seqno Chris Wilson
2016-04-06  9:30   ` Mika Kuoppala
2016-04-06 10:36   ` Joonas Lahtinen
2016-04-05 23:57 ` [PATCH 7/7] drm/i915: Simplify check for idleness in hangcheck Chris Wilson
2016-04-06  9:05   ` Joonas Lahtinen
2016-04-06  9:32   ` Mika Kuoppala
2016-04-06  9:44     ` Chris Wilson
2016-04-06  8:57 ` [PATCH 1/7] drm/i915: Include engine->last_submitted_seqno in GPU error state Joonas Lahtinen
2016-04-06  8:59 ` ✗ Fi.CI.BAT: failure for series starting with [1/7] " Patchwork
2016-04-06  9:28 ` [PATCH 1/7] " Mika Kuoppala
2016-04-06 12:33 ` [PATCH v2 1/9] " Chris Wilson
2016-04-06 12:33   ` [PATCH v2 2/9] drm/i915: On GPU reset, set the HWS breadcrumb to the last seqno Chris Wilson
2016-04-06 12:33   ` [PATCH v2 3/9] drm/i915: Remove unneeded drm_device pointer from intel_ring_init_seqno() Chris Wilson
2016-04-06 12:33   ` [PATCH v2 4/9] drm/i915: Move the hw semaphore initialisation from GEM to the engine Chris Wilson
2016-04-07  6:24     ` Joonas Lahtinen
2016-04-06 12:33   ` [PATCH v2 5/9] drm/i915: Refactor gen8 semaphore offset calculation Chris Wilson
2016-04-07  6:23     ` Joonas Lahtinen
2016-04-06 12:33   ` [PATCH v2 6/9] drm/i915: Reset semaphore page for gen8 Chris Wilson
2016-04-07  6:21     ` Joonas Lahtinen
2016-04-06 12:33   ` Chris Wilson [this message]
2016-04-06 12:33   ` [PATCH v2 8/9] drm/i915: Apply a mb between emitting the request and hangcheck Chris Wilson
2016-04-06 14:24     ` Mika Kuoppala
2016-04-06 12:33   ` [PATCH v2 9/9] drm/i915: Simplify check for idleness in hangcheck Chris Wilson
2016-04-06 14:24     ` Mika Kuoppala

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