From: Geert Uytterhoeven <geert+renesas@glider.be> To: Simon Horman <horms@verge.net.au>, Magnus Damm <magnus.damm@gmail.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>, linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven <geert+renesas@glider.be> Subject: [PATCH v4 04/12] ARM: dts: r8a7793: Add SYSC PM Domains Date: Thu, 7 Apr 2016 14:20:27 +0200 [thread overview] Message-ID: <1460031635-13452-5-git-send-email-geert+renesas@glider.be> (raw) In-Reply-To: <1460031635-13452-1-git-send-email-geert+renesas@glider.be> Add a device node for the System Controller, and hook it up to the CPG/MSTP Clock Domain. Hook up the first Cortex-A15 CPU core and the Cortex-A15 L2 cache/SCU to their respective PM Domains. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- v4: - Add power-domains property to the sysc node, to refer to the SoC's Clock Domain, v3: - Drop power area hiearchy from DT, - Switch to "#power-domain-cells = <1>", - Drop fallback compatibility strings, v2: - Change one-line summary prefix to match current arm-soc practices, - Update compatible values. --- arch/arm/boot/dts/r8a7793.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index bf70c464920bc687..aa5af3b16f1826ab 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -11,6 +11,7 @@ #include <dt-bindings/clock/r8a7793-clock.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/power/r8a7793-sysc.h> / { compatible = "renesas,r8a7793"; @@ -43,6 +44,7 @@ voltage-tolerance = <1>; /* 1% */ clocks = <&cpg_clocks R8A7793_CLK_Z>; clock-latency = <300000>; /* 300 us */ + power-domains = <&sysc R8A7793_PD_CA15_CPU0>; /* kHz - uV - OPPs unknown yet */ operating-points = <1500000 1000000>, @@ -76,6 +78,7 @@ L2_CA15: cache-controller@0 { compatible = "cache"; + power-domains = <&sysc R8A7793_PD_CA15_SCU>; cache-unified; cache-level = <2>; }; @@ -1212,6 +1215,13 @@ }; }; + sysc: system-controller@e6180000 { + compatible = "renesas,r8a7793-sysc"; + reg = <0 0xe6180000 0 0x0200>; + power-domains = <&cpg_clocks>; + #power-domain-cells = <1>; + }; + ipmmu_sy0: mmu@e6280000 { compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa"; reg = <0 0xe6280000 0 0x1000>; -- 1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: geert+renesas@glider.be (Geert Uytterhoeven) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 04/12] ARM: dts: r8a7793: Add SYSC PM Domains Date: Thu, 7 Apr 2016 14:20:27 +0200 [thread overview] Message-ID: <1460031635-13452-5-git-send-email-geert+renesas@glider.be> (raw) In-Reply-To: <1460031635-13452-1-git-send-email-geert+renesas@glider.be> Add a device node for the System Controller, and hook it up to the CPG/MSTP Clock Domain. Hook up the first Cortex-A15 CPU core and the Cortex-A15 L2 cache/SCU to their respective PM Domains. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- v4: - Add power-domains property to the sysc node, to refer to the SoC's Clock Domain, v3: - Drop power area hiearchy from DT, - Switch to "#power-domain-cells = <1>", - Drop fallback compatibility strings, v2: - Change one-line summary prefix to match current arm-soc practices, - Update compatible values. --- arch/arm/boot/dts/r8a7793.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index bf70c464920bc687..aa5af3b16f1826ab 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -11,6 +11,7 @@ #include <dt-bindings/clock/r8a7793-clock.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/power/r8a7793-sysc.h> / { compatible = "renesas,r8a7793"; @@ -43,6 +44,7 @@ voltage-tolerance = <1>; /* 1% */ clocks = <&cpg_clocks R8A7793_CLK_Z>; clock-latency = <300000>; /* 300 us */ + power-domains = <&sysc R8A7793_PD_CA15_CPU0>; /* kHz - uV - OPPs unknown yet */ operating-points = <1500000 1000000>, @@ -76,6 +78,7 @@ L2_CA15: cache-controller at 0 { compatible = "cache"; + power-domains = <&sysc R8A7793_PD_CA15_SCU>; cache-unified; cache-level = <2>; }; @@ -1212,6 +1215,13 @@ }; }; + sysc: system-controller at e6180000 { + compatible = "renesas,r8a7793-sysc"; + reg = <0 0xe6180000 0 0x0200>; + power-domains = <&cpg_clocks>; + #power-domain-cells = <1>; + }; + ipmmu_sy0: mmu at e6280000 { compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa"; reg = <0 0xe6280000 0 0x1000>; -- 1.9.1
next prev parent reply other threads:[~2016-04-07 12:20 UTC|newest] Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-04-07 12:20 [PATCH v4 00/12] ARM/arm64: dts: rcar: Add SYSC PM domains Geert Uytterhoeven 2016-04-07 12:20 ` Geert Uytterhoeven 2016-04-07 12:20 ` [PATCH v4 01/12] ARM: dts: r8a7779: Add SYSC PM Domains Geert Uytterhoeven 2016-04-07 12:20 ` Geert Uytterhoeven 2016-04-07 12:20 ` [PATCH v4 02/12] ARM: dts: r8a7790: " Geert Uytterhoeven 2016-04-07 12:20 ` [PATCH v4 03/12] ARM: dts: r8a7791: " Geert Uytterhoeven 2016-04-07 12:20 ` Geert Uytterhoeven 2016-04-07 12:20 ` Geert Uytterhoeven [this message] 2016-04-07 12:20 ` [PATCH v4 04/12] ARM: dts: r8a7793: " Geert Uytterhoeven 2016-04-07 12:20 ` [PATCH v4 05/12] ARM: dts: r8a7794: " Geert Uytterhoeven 2016-04-07 12:20 ` Geert Uytterhoeven 2016-04-07 12:20 ` [PATCH v4 06/12] arm64: dts: r8a7795: " Geert Uytterhoeven 2016-04-07 12:20 ` [PATCH v4 07/12] ARM: dts: r8a7779: Use SYSC "always-on" PM Domain Geert Uytterhoeven 2016-04-07 12:20 ` [PATCH v4 09/12] ARM: dts: r8a7791: " Geert Uytterhoeven [not found] ` <1460031635-13452-1-git-send-email-geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org> 2016-04-07 12:20 ` [PATCH v4 08/12] ARM: dts: r8a7790: " Geert Uytterhoeven 2016-04-07 12:20 ` Geert Uytterhoeven 2016-04-07 12:20 ` [PATCH v4 10/12] ARM: dts: r8a7793: " Geert Uytterhoeven 2016-04-07 12:20 ` Geert Uytterhoeven 2016-04-07 12:20 ` [PATCH v4 11/12] ARM: dts: r8a7794: " Geert Uytterhoeven 2016-04-07 12:20 ` Geert Uytterhoeven 2016-04-07 12:20 ` [PATCH v4 12/12] arm64: dts: r8a7795: " Geert Uytterhoeven 2016-04-09 20:00 ` [PATCH v4 00/12] ARM/arm64: dts: rcar: Add SYSC PM domains Laurent Pinchart 2016-04-09 20:00 ` Laurent Pinchart
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