From: Rajendra Nayak <rnayak@codeaurora.org> To: edubezval@gmail.com Cc: Rajendra Nayak <rnayak@codeaurora.org>, linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, punit.agrawal@arm.com, sboyd@codeaurora.org, lina.iyer@linaro.org, nrajan@codeaurora.org, Andy Gross <agross@codeaurora.org>, andy.gross@linaro.org, rui.zhang@intel.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 08/11] arm: dts: apq8064: Add thermal zones, tsens and qfprom nodes Date: Thu, 14 Apr 2016 15:01:56 +0530 [thread overview] Message-ID: <1460626319-14516-9-git-send-email-rnayak@codeaurora.org> (raw) In-Reply-To: <1460626319-14516-1-git-send-email-rnayak@codeaurora.org> TSENS is part of GCC, hence add TSENS properties as part of GCC node. Also add thermal zones and qfprom nodes. Update GCC bindings doc to mention the possibility of optional TSENS properties that can be part of GCC node. Cc: Andy Gross <agross@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> --- .../devicetree/bindings/clock/qcom,gcc.txt | 18 ++++ arch/arm/boot/dts/qcom-apq8064.dtsi | 103 +++++++++++++++++++++ 2 files changed, 121 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.txt b/Documentation/devicetree/bindings/clock/qcom,gcc.txt index 9a60fde..16e2f84 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc.txt +++ b/Documentation/devicetree/bindings/clock/qcom,gcc.txt @@ -23,6 +23,13 @@ Required properties : Optional properties : - #power-domain-cells : shall contain 1 +Optional properties: +- Qualcomm TSENS (thermal sensor device) on some devices can +be part of GCC and hence the TSENS properties can also be +part of the GCC/clock-controller node. +For more details on the TSENS properties please refer +Documentation/devicetree/bindings/thermal/qcom-tsens.txt + Example: clock-controller@900000 { compatible = "qcom,gcc-msm8960"; @@ -31,3 +38,14 @@ Example: #reset-cells = <1>; #power-domain-cells = <1>; }; + +Example of GCC with TSENS properties: + clock-controller@900000 { + compatible = "qcom,gcc-apq8064"; + reg = <0x00900000 0x4000>; + nvmem-cells = <&tsens_calib>, <&tsens_backup>; + nvmem-cell-names = "calib", "calib_backup"; + #clock-cells = <1>; + #reset-cells = <1>; + #thermal-sensor-cells = <1>; + }; diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 65d0e8d..4f839b0 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -86,6 +86,92 @@ }; }; + thermal-zones { + cpu-thermal0 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&gcc 7>; + coefficients = <1199 0>; + + trips { + cpu_alert0: trip@0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit0: trip@1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal1 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&gcc 8>; + coefficients = <1132 0>; + + trips { + cpu_alert1: trip@0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit1: trip@1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal2 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&gcc 9>; + coefficients = <1199 0>; + + trips { + cpu_alert2: trip@0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit2: trip@1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal3 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&gcc 10>; + coefficients = <1132 0>; + + trips { + cpu_alert3: trip@0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit3: trip@1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; + cpu-pmu { compatible = "qcom,krait-pmu"; interrupts = <1 10 0x304>; @@ -481,11 +567,28 @@ }; }; + qfprom: qfprom@00700000 { + compatible = "qcom,qfprom"; + reg = <0x00700000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + tsens_calib: calib { + reg = <0x404 0x10>; + }; + tsens_backup: backup_calib { + reg = <0x414 0x10>; + }; + }; + gcc: clock-controller@900000 { compatible = "qcom,gcc-apq8064"; reg = <0x00900000 0x4000>; + nvmem-cells = <&tsens_calib>, <&tsens_backup>; + nvmem-cell-names = "calib", "calib_backup"; #clock-cells = <1>; #reset-cells = <1>; + #thermal-sensor-cells = <1>; }; lcc: clock-controller@28000000 { -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
WARNING: multiple messages have this Message-ID (diff)
From: rnayak@codeaurora.org (Rajendra Nayak) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 08/11] arm: dts: apq8064: Add thermal zones, tsens and qfprom nodes Date: Thu, 14 Apr 2016 15:01:56 +0530 [thread overview] Message-ID: <1460626319-14516-9-git-send-email-rnayak@codeaurora.org> (raw) In-Reply-To: <1460626319-14516-1-git-send-email-rnayak@codeaurora.org> TSENS is part of GCC, hence add TSENS properties as part of GCC node. Also add thermal zones and qfprom nodes. Update GCC bindings doc to mention the possibility of optional TSENS properties that can be part of GCC node. Cc: Andy Gross <agross@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> --- .../devicetree/bindings/clock/qcom,gcc.txt | 18 ++++ arch/arm/boot/dts/qcom-apq8064.dtsi | 103 +++++++++++++++++++++ 2 files changed, 121 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.txt b/Documentation/devicetree/bindings/clock/qcom,gcc.txt index 9a60fde..16e2f84 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc.txt +++ b/Documentation/devicetree/bindings/clock/qcom,gcc.txt @@ -23,6 +23,13 @@ Required properties : Optional properties : - #power-domain-cells : shall contain 1 +Optional properties: +- Qualcomm TSENS (thermal sensor device) on some devices can +be part of GCC and hence the TSENS properties can also be +part of the GCC/clock-controller node. +For more details on the TSENS properties please refer +Documentation/devicetree/bindings/thermal/qcom-tsens.txt + Example: clock-controller at 900000 { compatible = "qcom,gcc-msm8960"; @@ -31,3 +38,14 @@ Example: #reset-cells = <1>; #power-domain-cells = <1>; }; + +Example of GCC with TSENS properties: + clock-controller at 900000 { + compatible = "qcom,gcc-apq8064"; + reg = <0x00900000 0x4000>; + nvmem-cells = <&tsens_calib>, <&tsens_backup>; + nvmem-cell-names = "calib", "calib_backup"; + #clock-cells = <1>; + #reset-cells = <1>; + #thermal-sensor-cells = <1>; + }; diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 65d0e8d..4f839b0 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -86,6 +86,92 @@ }; }; + thermal-zones { + cpu-thermal0 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&gcc 7>; + coefficients = <1199 0>; + + trips { + cpu_alert0: trip at 0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit0: trip at 1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal1 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&gcc 8>; + coefficients = <1132 0>; + + trips { + cpu_alert1: trip at 0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit1: trip at 1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal2 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&gcc 9>; + coefficients = <1199 0>; + + trips { + cpu_alert2: trip at 0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit2: trip at 1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal3 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&gcc 10>; + coefficients = <1132 0>; + + trips { + cpu_alert3: trip at 0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit3: trip at 1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; + cpu-pmu { compatible = "qcom,krait-pmu"; interrupts = <1 10 0x304>; @@ -481,11 +567,28 @@ }; }; + qfprom: qfprom at 00700000 { + compatible = "qcom,qfprom"; + reg = <0x00700000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + tsens_calib: calib { + reg = <0x404 0x10>; + }; + tsens_backup: backup_calib { + reg = <0x414 0x10>; + }; + }; + gcc: clock-controller at 900000 { compatible = "qcom,gcc-apq8064"; reg = <0x00900000 0x4000>; + nvmem-cells = <&tsens_calib>, <&tsens_backup>; + nvmem-cell-names = "calib", "calib_backup"; #clock-cells = <1>; #reset-cells = <1>; + #thermal-sensor-cells = <1>; }; lcc: clock-controller at 28000000 { -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2016-04-14 9:31 UTC|newest] Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-04-14 9:31 [PATCH v5 00/11] qcom: Add support for TSENS driver Rajendra Nayak 2016-04-14 9:31 ` Rajendra Nayak 2016-04-14 9:31 ` [PATCH v5 01/11] thermal: qcom: tsens: Add a skeletal TSENS drivers Rajendra Nayak 2016-04-14 9:31 ` Rajendra Nayak 2016-04-28 0:20 ` Eduardo Valentin 2016-04-28 0:20 ` Eduardo Valentin 2016-05-05 4:50 ` Rajendra Nayak 2016-05-05 4:50 ` Rajendra Nayak 2016-04-14 9:31 ` [PATCH v5 02/11] thermal: qcom: tsens-8916: Add support for 8916 family of SoCs Rajendra Nayak 2016-04-14 9:31 ` Rajendra Nayak 2016-04-14 9:31 ` [PATCH v5 03/11] thermal: qcom: tsens-8974: Add support for 8974 " Rajendra Nayak 2016-04-14 9:31 ` Rajendra Nayak 2016-04-14 9:31 ` [PATCH v5 04/11] thermal: core: export apis to get slope and offset Rajendra Nayak 2016-04-14 9:31 ` Rajendra Nayak 2016-04-28 0:08 ` Eduardo Valentin 2016-04-28 0:08 ` Eduardo Valentin 2016-05-05 4:47 ` Rajendra Nayak 2016-05-05 4:47 ` Rajendra Nayak 2016-04-14 9:31 ` [PATCH v5 05/11] thermal: qcom: tsens-8960: Add support for 8960 family of SoCs Rajendra Nayak 2016-04-14 9:31 ` Rajendra Nayak 2016-04-28 0:10 ` Eduardo Valentin 2016-04-28 0:10 ` Eduardo Valentin 2016-05-05 4:48 ` Rajendra Nayak 2016-05-05 4:48 ` Rajendra Nayak 2016-04-14 9:31 ` [PATCH v5 06/11] thermal: qcom: tsens-8996: Add support for 8996 " Rajendra Nayak 2016-04-14 9:31 ` Rajendra Nayak 2016-04-28 0:13 ` Eduardo Valentin 2016-04-28 0:13 ` Eduardo Valentin 2016-04-14 9:31 ` [PATCH v5 07/11] arm: dts: msm8974: Add thermal zones, tsens and qfprom nodes Rajendra Nayak 2016-04-14 9:31 ` Rajendra Nayak 2016-04-14 9:31 ` Rajendra Nayak [this message] 2016-04-14 9:31 ` [PATCH v5 08/11] arm: dts: apq8064: " Rajendra Nayak 2016-04-14 9:31 ` [PATCH v5 09/11] arm: dts: apq8084: " Rajendra Nayak 2016-04-14 9:31 ` Rajendra Nayak 2016-04-14 9:31 ` [PATCH v5 10/11] arm64: dts: msm8916: " Rajendra Nayak 2016-04-14 9:31 ` Rajendra Nayak 2016-04-14 9:31 ` [PATCH v5 11/11] arm64: dts: msm8996: " Rajendra Nayak 2016-04-14 9:31 ` Rajendra Nayak 2016-04-28 0:03 ` Eduardo Valentin 2016-04-28 0:03 ` Eduardo Valentin 2016-05-05 4:47 ` Rajendra Nayak 2016-05-05 4:47 ` Rajendra Nayak 2016-04-20 23:51 ` [PATCH v5 00/11] qcom: Add support for TSENS driver Eduardo Valentin 2016-04-20 23:51 ` Eduardo Valentin 2016-04-21 10:49 ` Nayak, Rajendra 2016-04-21 10:49 ` Nayak, Rajendra 2016-04-22 9:07 ` Srinivas Kandagatla 2016-04-22 9:07 ` Srinivas Kandagatla 2016-04-28 0:03 ` Eduardo Valentin 2016-04-28 0:03 ` Eduardo Valentin 2016-05-05 4:46 ` Rajendra Nayak 2016-05-05 4:46 ` Rajendra Nayak
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