From: Tero Kristo <t-kristo@ti.com>
To: tony@atomide.com, paul@pwsan.com, sboyd@codeaurora.org,
mturquette@baylibre.com, linux-omap@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: [PATCHv2 15/28] clk: ti: omap5: transition to usage of ti_clk_get
Date: Thu, 14 Apr 2016 14:08:04 +0300 [thread overview]
Message-ID: <1460632097-25727-16-git-send-email-t-kristo@ti.com> (raw)
In-Reply-To: <1460632097-25727-1-git-send-email-t-kristo@ti.com>
Cleanup any unnecessary DT_CLK() alias entries from the OMAP5 clock file.
Also, use ti_clk_get where necessary.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
drivers/clk/ti/clk-54xx.c | 168 ++-------------------------------------------
1 file changed, 6 insertions(+), 162 deletions(-)
diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c
index 59ce2fa..c267806 100644
--- a/drivers/clk/ti/clk-54xx.c
+++ b/drivers/clk/ti/clk-54xx.c
@@ -28,162 +28,6 @@
#define OMAP5_DPLL_USB_DEFFREQ 960000000
static struct ti_dt_clk omap54xx_clks[] = {
- DT_CLK(NULL, "pad_clks_src_ck", "pad_clks_src_ck"),
- DT_CLK(NULL, "pad_clks_ck", "pad_clks_ck"),
- DT_CLK(NULL, "secure_32k_clk_src_ck", "secure_32k_clk_src_ck"),
- DT_CLK(NULL, "slimbus_src_clk", "slimbus_src_clk"),
- DT_CLK(NULL, "slimbus_clk", "slimbus_clk"),
- DT_CLK(NULL, "sys_32k_ck", "sys_32k_ck"),
- DT_CLK(NULL, "virt_12000000_ck", "virt_12000000_ck"),
- DT_CLK(NULL, "virt_13000000_ck", "virt_13000000_ck"),
- DT_CLK(NULL, "virt_16800000_ck", "virt_16800000_ck"),
- DT_CLK(NULL, "virt_19200000_ck", "virt_19200000_ck"),
- DT_CLK(NULL, "virt_26000000_ck", "virt_26000000_ck"),
- DT_CLK(NULL, "virt_27000000_ck", "virt_27000000_ck"),
- DT_CLK(NULL, "virt_38400000_ck", "virt_38400000_ck"),
- DT_CLK(NULL, "sys_clkin", "sys_clkin"),
- DT_CLK(NULL, "xclk60mhsp1_ck", "xclk60mhsp1_ck"),
- DT_CLK(NULL, "xclk60mhsp2_ck", "xclk60mhsp2_ck"),
- DT_CLK(NULL, "abe_dpll_bypass_clk_mux", "abe_dpll_bypass_clk_mux"),
- DT_CLK(NULL, "abe_dpll_clk_mux", "abe_dpll_clk_mux"),
- DT_CLK(NULL, "dpll_abe_ck", "dpll_abe_ck"),
- DT_CLK(NULL, "dpll_abe_x2_ck", "dpll_abe_x2_ck"),
- DT_CLK(NULL, "dpll_abe_m2x2_ck", "dpll_abe_m2x2_ck"),
- DT_CLK(NULL, "abe_24m_fclk", "abe_24m_fclk"),
- DT_CLK(NULL, "abe_clk", "abe_clk"),
- DT_CLK(NULL, "abe_iclk", "abe_iclk"),
- DT_CLK(NULL, "abe_lp_clk_div", "abe_lp_clk_div"),
- DT_CLK(NULL, "dpll_abe_m3x2_ck", "dpll_abe_m3x2_ck"),
- DT_CLK(NULL, "dpll_core_ck", "dpll_core_ck"),
- DT_CLK(NULL, "dpll_core_x2_ck", "dpll_core_x2_ck"),
- DT_CLK(NULL, "dpll_core_h21x2_ck", "dpll_core_h21x2_ck"),
- DT_CLK(NULL, "c2c_fclk", "c2c_fclk"),
- DT_CLK(NULL, "c2c_iclk", "c2c_iclk"),
- DT_CLK(NULL, "custefuse_sys_gfclk_div", "custefuse_sys_gfclk_div"),
- DT_CLK(NULL, "dpll_core_h11x2_ck", "dpll_core_h11x2_ck"),
- DT_CLK(NULL, "dpll_core_h12x2_ck", "dpll_core_h12x2_ck"),
- DT_CLK(NULL, "dpll_core_h13x2_ck", "dpll_core_h13x2_ck"),
- DT_CLK(NULL, "dpll_core_h14x2_ck", "dpll_core_h14x2_ck"),
- DT_CLK(NULL, "dpll_core_h22x2_ck", "dpll_core_h22x2_ck"),
- DT_CLK(NULL, "dpll_core_h23x2_ck", "dpll_core_h23x2_ck"),
- DT_CLK(NULL, "dpll_core_h24x2_ck", "dpll_core_h24x2_ck"),
- DT_CLK(NULL, "dpll_core_m2_ck", "dpll_core_m2_ck"),
- DT_CLK(NULL, "dpll_core_m3x2_ck", "dpll_core_m3x2_ck"),
- DT_CLK(NULL, "iva_dpll_hs_clk_div", "iva_dpll_hs_clk_div"),
- DT_CLK(NULL, "dpll_iva_ck", "dpll_iva_ck"),
- DT_CLK(NULL, "dpll_iva_x2_ck", "dpll_iva_x2_ck"),
- DT_CLK(NULL, "dpll_iva_h11x2_ck", "dpll_iva_h11x2_ck"),
- DT_CLK(NULL, "dpll_iva_h12x2_ck", "dpll_iva_h12x2_ck"),
- DT_CLK(NULL, "mpu_dpll_hs_clk_div", "mpu_dpll_hs_clk_div"),
- DT_CLK(NULL, "dpll_mpu_ck", "dpll_mpu_ck"),
- DT_CLK(NULL, "dpll_mpu_m2_ck", "dpll_mpu_m2_ck"),
- DT_CLK(NULL, "per_dpll_hs_clk_div", "per_dpll_hs_clk_div"),
- DT_CLK(NULL, "dpll_per_ck", "dpll_per_ck"),
- DT_CLK(NULL, "dpll_per_x2_ck", "dpll_per_x2_ck"),
- DT_CLK(NULL, "dpll_per_h11x2_ck", "dpll_per_h11x2_ck"),
- DT_CLK(NULL, "dpll_per_h12x2_ck", "dpll_per_h12x2_ck"),
- DT_CLK(NULL, "dpll_per_h14x2_ck", "dpll_per_h14x2_ck"),
- DT_CLK(NULL, "dpll_per_m2_ck", "dpll_per_m2_ck"),
- DT_CLK(NULL, "dpll_per_m2x2_ck", "dpll_per_m2x2_ck"),
- DT_CLK(NULL, "dpll_per_m3x2_ck", "dpll_per_m3x2_ck"),
- DT_CLK(NULL, "dpll_unipro1_ck", "dpll_unipro1_ck"),
- DT_CLK(NULL, "dpll_unipro1_clkdcoldo", "dpll_unipro1_clkdcoldo"),
- DT_CLK(NULL, "dpll_unipro1_m2_ck", "dpll_unipro1_m2_ck"),
- DT_CLK(NULL, "dpll_unipro2_ck", "dpll_unipro2_ck"),
- DT_CLK(NULL, "dpll_unipro2_clkdcoldo", "dpll_unipro2_clkdcoldo"),
- DT_CLK(NULL, "dpll_unipro2_m2_ck", "dpll_unipro2_m2_ck"),
- DT_CLK(NULL, "usb_dpll_hs_clk_div", "usb_dpll_hs_clk_div"),
- DT_CLK(NULL, "dpll_usb_ck", "dpll_usb_ck"),
- DT_CLK(NULL, "dpll_usb_clkdcoldo", "dpll_usb_clkdcoldo"),
- DT_CLK(NULL, "dpll_usb_m2_ck", "dpll_usb_m2_ck"),
- DT_CLK(NULL, "dss_syc_gfclk_div", "dss_syc_gfclk_div"),
- DT_CLK(NULL, "func_128m_clk", "func_128m_clk"),
- DT_CLK(NULL, "func_12m_fclk", "func_12m_fclk"),
- DT_CLK(NULL, "func_24m_clk", "func_24m_clk"),
- DT_CLK(NULL, "func_48m_fclk", "func_48m_fclk"),
- DT_CLK(NULL, "func_96m_fclk", "func_96m_fclk"),
- DT_CLK(NULL, "l3_iclk_div", "l3_iclk_div"),
- DT_CLK(NULL, "gpu_l3_iclk", "gpu_l3_iclk"),
- DT_CLK(NULL, "l3init_60m_fclk", "l3init_60m_fclk"),
- DT_CLK(NULL, "wkupaon_iclk_mux", "wkupaon_iclk_mux"),
- DT_CLK(NULL, "l3instr_ts_gclk_div", "l3instr_ts_gclk_div"),
- DT_CLK(NULL, "l4_root_clk_div", "l4_root_clk_div"),
- DT_CLK(NULL, "dss_32khz_clk", "dss_32khz_clk"),
- DT_CLK(NULL, "dss_48mhz_clk", "dss_48mhz_clk"),
- DT_CLK(NULL, "dss_dss_clk", "dss_dss_clk"),
- DT_CLK(NULL, "dss_sys_clk", "dss_sys_clk"),
- DT_CLK(NULL, "gpio1_dbclk", "gpio1_dbclk"),
- DT_CLK(NULL, "gpio2_dbclk", "gpio2_dbclk"),
- DT_CLK(NULL, "gpio3_dbclk", "gpio3_dbclk"),
- DT_CLK(NULL, "gpio4_dbclk", "gpio4_dbclk"),
- DT_CLK(NULL, "gpio5_dbclk", "gpio5_dbclk"),
- DT_CLK(NULL, "gpio6_dbclk", "gpio6_dbclk"),
- DT_CLK(NULL, "gpio7_dbclk", "gpio7_dbclk"),
- DT_CLK(NULL, "gpio8_dbclk", "gpio8_dbclk"),
- DT_CLK(NULL, "iss_ctrlclk", "iss_ctrlclk"),
- DT_CLK(NULL, "lli_txphy_clk", "lli_txphy_clk"),
- DT_CLK(NULL, "lli_txphy_ls_clk", "lli_txphy_ls_clk"),
- DT_CLK(NULL, "mmc1_32khz_clk", "mmc1_32khz_clk"),
- DT_CLK(NULL, "sata_ref_clk", "sata_ref_clk"),
- DT_CLK(NULL, "slimbus1_slimbus_clk", "slimbus1_slimbus_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic480m_p1_clk", "usb_host_hs_hsic480m_p1_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic480m_p2_clk", "usb_host_hs_hsic480m_p2_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic480m_p3_clk", "usb_host_hs_hsic480m_p3_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic60m_p1_clk", "usb_host_hs_hsic60m_p1_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic60m_p2_clk", "usb_host_hs_hsic60m_p2_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic60m_p3_clk", "usb_host_hs_hsic60m_p3_clk"),
- DT_CLK(NULL, "usb_host_hs_utmi_p1_clk", "usb_host_hs_utmi_p1_clk"),
- DT_CLK(NULL, "usb_host_hs_utmi_p2_clk", "usb_host_hs_utmi_p2_clk"),
- DT_CLK(NULL, "usb_host_hs_utmi_p3_clk", "usb_host_hs_utmi_p3_clk"),
- DT_CLK(NULL, "usb_otg_ss_refclk960m", "usb_otg_ss_refclk960m"),
- DT_CLK(NULL, "usb_phy_cm_clk32k", "usb_phy_cm_clk32k"),
- DT_CLK(NULL, "usb_tll_hs_usb_ch0_clk", "usb_tll_hs_usb_ch0_clk"),
- DT_CLK(NULL, "usb_tll_hs_usb_ch1_clk", "usb_tll_hs_usb_ch1_clk"),
- DT_CLK(NULL, "usb_tll_hs_usb_ch2_clk", "usb_tll_hs_usb_ch2_clk"),
- DT_CLK(NULL, "aess_fclk", "aess_fclk"),
- DT_CLK(NULL, "dmic_sync_mux_ck", "dmic_sync_mux_ck"),
- DT_CLK(NULL, "dmic_gfclk", "dmic_gfclk"),
- DT_CLK(NULL, "fdif_fclk", "fdif_fclk"),
- DT_CLK(NULL, "gpu_core_gclk_mux", "gpu_core_gclk_mux"),
- DT_CLK(NULL, "gpu_hyd_gclk_mux", "gpu_hyd_gclk_mux"),
- DT_CLK(NULL, "hsi_fclk", "hsi_fclk"),
- DT_CLK(NULL, "mcasp_sync_mux_ck", "mcasp_sync_mux_ck"),
- DT_CLK(NULL, "mcasp_gfclk", "mcasp_gfclk"),
- DT_CLK(NULL, "mcbsp1_sync_mux_ck", "mcbsp1_sync_mux_ck"),
- DT_CLK(NULL, "mcbsp1_gfclk", "mcbsp1_gfclk"),
- DT_CLK(NULL, "mcbsp2_sync_mux_ck", "mcbsp2_sync_mux_ck"),
- DT_CLK(NULL, "mcbsp2_gfclk", "mcbsp2_gfclk"),
- DT_CLK(NULL, "mcbsp3_sync_mux_ck", "mcbsp3_sync_mux_ck"),
- DT_CLK(NULL, "mcbsp3_gfclk", "mcbsp3_gfclk"),
- DT_CLK(NULL, "mmc1_fclk_mux", "mmc1_fclk_mux"),
- DT_CLK(NULL, "mmc1_fclk", "mmc1_fclk"),
- DT_CLK(NULL, "mmc2_fclk_mux", "mmc2_fclk_mux"),
- DT_CLK(NULL, "mmc2_fclk", "mmc2_fclk"),
- DT_CLK(NULL, "timer10_gfclk_mux", "timer10_gfclk_mux"),
- DT_CLK(NULL, "timer11_gfclk_mux", "timer11_gfclk_mux"),
- DT_CLK(NULL, "timer1_gfclk_mux", "timer1_gfclk_mux"),
- DT_CLK(NULL, "timer2_gfclk_mux", "timer2_gfclk_mux"),
- DT_CLK(NULL, "timer3_gfclk_mux", "timer3_gfclk_mux"),
- DT_CLK(NULL, "timer4_gfclk_mux", "timer4_gfclk_mux"),
- DT_CLK(NULL, "timer5_gfclk_mux", "timer5_gfclk_mux"),
- DT_CLK(NULL, "timer6_gfclk_mux", "timer6_gfclk_mux"),
- DT_CLK(NULL, "timer7_gfclk_mux", "timer7_gfclk_mux"),
- DT_CLK(NULL, "timer8_gfclk_mux", "timer8_gfclk_mux"),
- DT_CLK(NULL, "timer9_gfclk_mux", "timer9_gfclk_mux"),
- DT_CLK(NULL, "utmi_p1_gfclk", "utmi_p1_gfclk"),
- DT_CLK(NULL, "utmi_p2_gfclk", "utmi_p2_gfclk"),
- DT_CLK(NULL, "auxclk0_src_ck", "auxclk0_src_ck"),
- DT_CLK(NULL, "auxclk0_ck", "auxclk0_ck"),
- DT_CLK(NULL, "auxclkreq0_ck", "auxclkreq0_ck"),
- DT_CLK(NULL, "auxclk1_src_ck", "auxclk1_src_ck"),
- DT_CLK(NULL, "auxclk1_ck", "auxclk1_ck"),
- DT_CLK(NULL, "auxclkreq1_ck", "auxclkreq1_ck"),
- DT_CLK(NULL, "auxclk2_src_ck", "auxclk2_src_ck"),
- DT_CLK(NULL, "auxclk2_ck", "auxclk2_ck"),
- DT_CLK(NULL, "auxclkreq2_ck", "auxclkreq2_ck"),
- DT_CLK(NULL, "auxclk3_src_ck", "auxclk3_src_ck"),
- DT_CLK(NULL, "auxclk3_ck", "auxclk3_ck"),
- DT_CLK(NULL, "auxclkreq3_ck", "auxclkreq3_ck"),
DT_CLK("omap_i2c.1", "ick", "dummy_ck"),
DT_CLK("omap_i2c.2", "ick", "dummy_ck"),
DT_CLK("omap_i2c.3", "ick", "dummy_ck"),
@@ -233,27 +77,27 @@ int __init omap5xxx_dt_clk_init(void)
omap2_clk_disable_autoidle_all();
- abe_dpll_ref = clk_get_sys(NULL, "abe_dpll_clk_mux");
- sys_32k_ck = clk_get_sys(NULL, "sys_32k_ck");
+ abe_dpll_ref = ti_clk_get("abe_dpll_clk_mux");
+ sys_32k_ck = ti_clk_get("sys_32k_ck");
rc = clk_set_parent(abe_dpll_ref, sys_32k_ck);
- abe_dpll = clk_get_sys(NULL, "dpll_abe_ck");
+ abe_dpll = ti_clk_get("dpll_abe_ck");
if (!rc)
rc = clk_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ);
if (rc)
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
- abe_dpll = clk_get_sys(NULL, "dpll_abe_m2x2_ck");
+ abe_dpll = ti_clk_get("dpll_abe_m2x2_ck");
if (!rc)
rc = clk_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ * 2);
if (rc)
pr_err("%s: failed to configure ABE m2x2 DPLL!\n", __func__);
- usb_dpll = clk_get_sys(NULL, "dpll_usb_ck");
+ usb_dpll = ti_clk_get("dpll_usb_ck");
rc = clk_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ);
if (rc)
pr_err("%s: failed to configure USB DPLL!\n", __func__);
- usb_dpll = clk_get_sys(NULL, "dpll_usb_m2_ck");
+ usb_dpll = ti_clk_get("dpll_usb_m2_ck");
rc = clk_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ/2);
if (rc)
pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__);
--
1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: Tero Kristo <t-kristo@ti.com>
To: <tony@atomide.com>, <paul@pwsan.com>, <sboyd@codeaurora.org>,
<mturquette@baylibre.com>, <linux-omap@vger.kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>
Subject: [PATCHv2 15/28] clk: ti: omap5: transition to usage of ti_clk_get
Date: Thu, 14 Apr 2016 14:08:04 +0300 [thread overview]
Message-ID: <1460632097-25727-16-git-send-email-t-kristo@ti.com> (raw)
In-Reply-To: <1460632097-25727-1-git-send-email-t-kristo@ti.com>
Cleanup any unnecessary DT_CLK() alias entries from the OMAP5 clock file.
Also, use ti_clk_get where necessary.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
drivers/clk/ti/clk-54xx.c | 168 ++-------------------------------------------
1 file changed, 6 insertions(+), 162 deletions(-)
diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c
index 59ce2fa..c267806 100644
--- a/drivers/clk/ti/clk-54xx.c
+++ b/drivers/clk/ti/clk-54xx.c
@@ -28,162 +28,6 @@
#define OMAP5_DPLL_USB_DEFFREQ 960000000
static struct ti_dt_clk omap54xx_clks[] = {
- DT_CLK(NULL, "pad_clks_src_ck", "pad_clks_src_ck"),
- DT_CLK(NULL, "pad_clks_ck", "pad_clks_ck"),
- DT_CLK(NULL, "secure_32k_clk_src_ck", "secure_32k_clk_src_ck"),
- DT_CLK(NULL, "slimbus_src_clk", "slimbus_src_clk"),
- DT_CLK(NULL, "slimbus_clk", "slimbus_clk"),
- DT_CLK(NULL, "sys_32k_ck", "sys_32k_ck"),
- DT_CLK(NULL, "virt_12000000_ck", "virt_12000000_ck"),
- DT_CLK(NULL, "virt_13000000_ck", "virt_13000000_ck"),
- DT_CLK(NULL, "virt_16800000_ck", "virt_16800000_ck"),
- DT_CLK(NULL, "virt_19200000_ck", "virt_19200000_ck"),
- DT_CLK(NULL, "virt_26000000_ck", "virt_26000000_ck"),
- DT_CLK(NULL, "virt_27000000_ck", "virt_27000000_ck"),
- DT_CLK(NULL, "virt_38400000_ck", "virt_38400000_ck"),
- DT_CLK(NULL, "sys_clkin", "sys_clkin"),
- DT_CLK(NULL, "xclk60mhsp1_ck", "xclk60mhsp1_ck"),
- DT_CLK(NULL, "xclk60mhsp2_ck", "xclk60mhsp2_ck"),
- DT_CLK(NULL, "abe_dpll_bypass_clk_mux", "abe_dpll_bypass_clk_mux"),
- DT_CLK(NULL, "abe_dpll_clk_mux", "abe_dpll_clk_mux"),
- DT_CLK(NULL, "dpll_abe_ck", "dpll_abe_ck"),
- DT_CLK(NULL, "dpll_abe_x2_ck", "dpll_abe_x2_ck"),
- DT_CLK(NULL, "dpll_abe_m2x2_ck", "dpll_abe_m2x2_ck"),
- DT_CLK(NULL, "abe_24m_fclk", "abe_24m_fclk"),
- DT_CLK(NULL, "abe_clk", "abe_clk"),
- DT_CLK(NULL, "abe_iclk", "abe_iclk"),
- DT_CLK(NULL, "abe_lp_clk_div", "abe_lp_clk_div"),
- DT_CLK(NULL, "dpll_abe_m3x2_ck", "dpll_abe_m3x2_ck"),
- DT_CLK(NULL, "dpll_core_ck", "dpll_core_ck"),
- DT_CLK(NULL, "dpll_core_x2_ck", "dpll_core_x2_ck"),
- DT_CLK(NULL, "dpll_core_h21x2_ck", "dpll_core_h21x2_ck"),
- DT_CLK(NULL, "c2c_fclk", "c2c_fclk"),
- DT_CLK(NULL, "c2c_iclk", "c2c_iclk"),
- DT_CLK(NULL, "custefuse_sys_gfclk_div", "custefuse_sys_gfclk_div"),
- DT_CLK(NULL, "dpll_core_h11x2_ck", "dpll_core_h11x2_ck"),
- DT_CLK(NULL, "dpll_core_h12x2_ck", "dpll_core_h12x2_ck"),
- DT_CLK(NULL, "dpll_core_h13x2_ck", "dpll_core_h13x2_ck"),
- DT_CLK(NULL, "dpll_core_h14x2_ck", "dpll_core_h14x2_ck"),
- DT_CLK(NULL, "dpll_core_h22x2_ck", "dpll_core_h22x2_ck"),
- DT_CLK(NULL, "dpll_core_h23x2_ck", "dpll_core_h23x2_ck"),
- DT_CLK(NULL, "dpll_core_h24x2_ck", "dpll_core_h24x2_ck"),
- DT_CLK(NULL, "dpll_core_m2_ck", "dpll_core_m2_ck"),
- DT_CLK(NULL, "dpll_core_m3x2_ck", "dpll_core_m3x2_ck"),
- DT_CLK(NULL, "iva_dpll_hs_clk_div", "iva_dpll_hs_clk_div"),
- DT_CLK(NULL, "dpll_iva_ck", "dpll_iva_ck"),
- DT_CLK(NULL, "dpll_iva_x2_ck", "dpll_iva_x2_ck"),
- DT_CLK(NULL, "dpll_iva_h11x2_ck", "dpll_iva_h11x2_ck"),
- DT_CLK(NULL, "dpll_iva_h12x2_ck", "dpll_iva_h12x2_ck"),
- DT_CLK(NULL, "mpu_dpll_hs_clk_div", "mpu_dpll_hs_clk_div"),
- DT_CLK(NULL, "dpll_mpu_ck", "dpll_mpu_ck"),
- DT_CLK(NULL, "dpll_mpu_m2_ck", "dpll_mpu_m2_ck"),
- DT_CLK(NULL, "per_dpll_hs_clk_div", "per_dpll_hs_clk_div"),
- DT_CLK(NULL, "dpll_per_ck", "dpll_per_ck"),
- DT_CLK(NULL, "dpll_per_x2_ck", "dpll_per_x2_ck"),
- DT_CLK(NULL, "dpll_per_h11x2_ck", "dpll_per_h11x2_ck"),
- DT_CLK(NULL, "dpll_per_h12x2_ck", "dpll_per_h12x2_ck"),
- DT_CLK(NULL, "dpll_per_h14x2_ck", "dpll_per_h14x2_ck"),
- DT_CLK(NULL, "dpll_per_m2_ck", "dpll_per_m2_ck"),
- DT_CLK(NULL, "dpll_per_m2x2_ck", "dpll_per_m2x2_ck"),
- DT_CLK(NULL, "dpll_per_m3x2_ck", "dpll_per_m3x2_ck"),
- DT_CLK(NULL, "dpll_unipro1_ck", "dpll_unipro1_ck"),
- DT_CLK(NULL, "dpll_unipro1_clkdcoldo", "dpll_unipro1_clkdcoldo"),
- DT_CLK(NULL, "dpll_unipro1_m2_ck", "dpll_unipro1_m2_ck"),
- DT_CLK(NULL, "dpll_unipro2_ck", "dpll_unipro2_ck"),
- DT_CLK(NULL, "dpll_unipro2_clkdcoldo", "dpll_unipro2_clkdcoldo"),
- DT_CLK(NULL, "dpll_unipro2_m2_ck", "dpll_unipro2_m2_ck"),
- DT_CLK(NULL, "usb_dpll_hs_clk_div", "usb_dpll_hs_clk_div"),
- DT_CLK(NULL, "dpll_usb_ck", "dpll_usb_ck"),
- DT_CLK(NULL, "dpll_usb_clkdcoldo", "dpll_usb_clkdcoldo"),
- DT_CLK(NULL, "dpll_usb_m2_ck", "dpll_usb_m2_ck"),
- DT_CLK(NULL, "dss_syc_gfclk_div", "dss_syc_gfclk_div"),
- DT_CLK(NULL, "func_128m_clk", "func_128m_clk"),
- DT_CLK(NULL, "func_12m_fclk", "func_12m_fclk"),
- DT_CLK(NULL, "func_24m_clk", "func_24m_clk"),
- DT_CLK(NULL, "func_48m_fclk", "func_48m_fclk"),
- DT_CLK(NULL, "func_96m_fclk", "func_96m_fclk"),
- DT_CLK(NULL, "l3_iclk_div", "l3_iclk_div"),
- DT_CLK(NULL, "gpu_l3_iclk", "gpu_l3_iclk"),
- DT_CLK(NULL, "l3init_60m_fclk", "l3init_60m_fclk"),
- DT_CLK(NULL, "wkupaon_iclk_mux", "wkupaon_iclk_mux"),
- DT_CLK(NULL, "l3instr_ts_gclk_div", "l3instr_ts_gclk_div"),
- DT_CLK(NULL, "l4_root_clk_div", "l4_root_clk_div"),
- DT_CLK(NULL, "dss_32khz_clk", "dss_32khz_clk"),
- DT_CLK(NULL, "dss_48mhz_clk", "dss_48mhz_clk"),
- DT_CLK(NULL, "dss_dss_clk", "dss_dss_clk"),
- DT_CLK(NULL, "dss_sys_clk", "dss_sys_clk"),
- DT_CLK(NULL, "gpio1_dbclk", "gpio1_dbclk"),
- DT_CLK(NULL, "gpio2_dbclk", "gpio2_dbclk"),
- DT_CLK(NULL, "gpio3_dbclk", "gpio3_dbclk"),
- DT_CLK(NULL, "gpio4_dbclk", "gpio4_dbclk"),
- DT_CLK(NULL, "gpio5_dbclk", "gpio5_dbclk"),
- DT_CLK(NULL, "gpio6_dbclk", "gpio6_dbclk"),
- DT_CLK(NULL, "gpio7_dbclk", "gpio7_dbclk"),
- DT_CLK(NULL, "gpio8_dbclk", "gpio8_dbclk"),
- DT_CLK(NULL, "iss_ctrlclk", "iss_ctrlclk"),
- DT_CLK(NULL, "lli_txphy_clk", "lli_txphy_clk"),
- DT_CLK(NULL, "lli_txphy_ls_clk", "lli_txphy_ls_clk"),
- DT_CLK(NULL, "mmc1_32khz_clk", "mmc1_32khz_clk"),
- DT_CLK(NULL, "sata_ref_clk", "sata_ref_clk"),
- DT_CLK(NULL, "slimbus1_slimbus_clk", "slimbus1_slimbus_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic480m_p1_clk", "usb_host_hs_hsic480m_p1_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic480m_p2_clk", "usb_host_hs_hsic480m_p2_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic480m_p3_clk", "usb_host_hs_hsic480m_p3_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic60m_p1_clk", "usb_host_hs_hsic60m_p1_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic60m_p2_clk", "usb_host_hs_hsic60m_p2_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic60m_p3_clk", "usb_host_hs_hsic60m_p3_clk"),
- DT_CLK(NULL, "usb_host_hs_utmi_p1_clk", "usb_host_hs_utmi_p1_clk"),
- DT_CLK(NULL, "usb_host_hs_utmi_p2_clk", "usb_host_hs_utmi_p2_clk"),
- DT_CLK(NULL, "usb_host_hs_utmi_p3_clk", "usb_host_hs_utmi_p3_clk"),
- DT_CLK(NULL, "usb_otg_ss_refclk960m", "usb_otg_ss_refclk960m"),
- DT_CLK(NULL, "usb_phy_cm_clk32k", "usb_phy_cm_clk32k"),
- DT_CLK(NULL, "usb_tll_hs_usb_ch0_clk", "usb_tll_hs_usb_ch0_clk"),
- DT_CLK(NULL, "usb_tll_hs_usb_ch1_clk", "usb_tll_hs_usb_ch1_clk"),
- DT_CLK(NULL, "usb_tll_hs_usb_ch2_clk", "usb_tll_hs_usb_ch2_clk"),
- DT_CLK(NULL, "aess_fclk", "aess_fclk"),
- DT_CLK(NULL, "dmic_sync_mux_ck", "dmic_sync_mux_ck"),
- DT_CLK(NULL, "dmic_gfclk", "dmic_gfclk"),
- DT_CLK(NULL, "fdif_fclk", "fdif_fclk"),
- DT_CLK(NULL, "gpu_core_gclk_mux", "gpu_core_gclk_mux"),
- DT_CLK(NULL, "gpu_hyd_gclk_mux", "gpu_hyd_gclk_mux"),
- DT_CLK(NULL, "hsi_fclk", "hsi_fclk"),
- DT_CLK(NULL, "mcasp_sync_mux_ck", "mcasp_sync_mux_ck"),
- DT_CLK(NULL, "mcasp_gfclk", "mcasp_gfclk"),
- DT_CLK(NULL, "mcbsp1_sync_mux_ck", "mcbsp1_sync_mux_ck"),
- DT_CLK(NULL, "mcbsp1_gfclk", "mcbsp1_gfclk"),
- DT_CLK(NULL, "mcbsp2_sync_mux_ck", "mcbsp2_sync_mux_ck"),
- DT_CLK(NULL, "mcbsp2_gfclk", "mcbsp2_gfclk"),
- DT_CLK(NULL, "mcbsp3_sync_mux_ck", "mcbsp3_sync_mux_ck"),
- DT_CLK(NULL, "mcbsp3_gfclk", "mcbsp3_gfclk"),
- DT_CLK(NULL, "mmc1_fclk_mux", "mmc1_fclk_mux"),
- DT_CLK(NULL, "mmc1_fclk", "mmc1_fclk"),
- DT_CLK(NULL, "mmc2_fclk_mux", "mmc2_fclk_mux"),
- DT_CLK(NULL, "mmc2_fclk", "mmc2_fclk"),
- DT_CLK(NULL, "timer10_gfclk_mux", "timer10_gfclk_mux"),
- DT_CLK(NULL, "timer11_gfclk_mux", "timer11_gfclk_mux"),
- DT_CLK(NULL, "timer1_gfclk_mux", "timer1_gfclk_mux"),
- DT_CLK(NULL, "timer2_gfclk_mux", "timer2_gfclk_mux"),
- DT_CLK(NULL, "timer3_gfclk_mux", "timer3_gfclk_mux"),
- DT_CLK(NULL, "timer4_gfclk_mux", "timer4_gfclk_mux"),
- DT_CLK(NULL, "timer5_gfclk_mux", "timer5_gfclk_mux"),
- DT_CLK(NULL, "timer6_gfclk_mux", "timer6_gfclk_mux"),
- DT_CLK(NULL, "timer7_gfclk_mux", "timer7_gfclk_mux"),
- DT_CLK(NULL, "timer8_gfclk_mux", "timer8_gfclk_mux"),
- DT_CLK(NULL, "timer9_gfclk_mux", "timer9_gfclk_mux"),
- DT_CLK(NULL, "utmi_p1_gfclk", "utmi_p1_gfclk"),
- DT_CLK(NULL, "utmi_p2_gfclk", "utmi_p2_gfclk"),
- DT_CLK(NULL, "auxclk0_src_ck", "auxclk0_src_ck"),
- DT_CLK(NULL, "auxclk0_ck", "auxclk0_ck"),
- DT_CLK(NULL, "auxclkreq0_ck", "auxclkreq0_ck"),
- DT_CLK(NULL, "auxclk1_src_ck", "auxclk1_src_ck"),
- DT_CLK(NULL, "auxclk1_ck", "auxclk1_ck"),
- DT_CLK(NULL, "auxclkreq1_ck", "auxclkreq1_ck"),
- DT_CLK(NULL, "auxclk2_src_ck", "auxclk2_src_ck"),
- DT_CLK(NULL, "auxclk2_ck", "auxclk2_ck"),
- DT_CLK(NULL, "auxclkreq2_ck", "auxclkreq2_ck"),
- DT_CLK(NULL, "auxclk3_src_ck", "auxclk3_src_ck"),
- DT_CLK(NULL, "auxclk3_ck", "auxclk3_ck"),
- DT_CLK(NULL, "auxclkreq3_ck", "auxclkreq3_ck"),
DT_CLK("omap_i2c.1", "ick", "dummy_ck"),
DT_CLK("omap_i2c.2", "ick", "dummy_ck"),
DT_CLK("omap_i2c.3", "ick", "dummy_ck"),
@@ -233,27 +77,27 @@ int __init omap5xxx_dt_clk_init(void)
omap2_clk_disable_autoidle_all();
- abe_dpll_ref = clk_get_sys(NULL, "abe_dpll_clk_mux");
- sys_32k_ck = clk_get_sys(NULL, "sys_32k_ck");
+ abe_dpll_ref = ti_clk_get("abe_dpll_clk_mux");
+ sys_32k_ck = ti_clk_get("sys_32k_ck");
rc = clk_set_parent(abe_dpll_ref, sys_32k_ck);
- abe_dpll = clk_get_sys(NULL, "dpll_abe_ck");
+ abe_dpll = ti_clk_get("dpll_abe_ck");
if (!rc)
rc = clk_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ);
if (rc)
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
- abe_dpll = clk_get_sys(NULL, "dpll_abe_m2x2_ck");
+ abe_dpll = ti_clk_get("dpll_abe_m2x2_ck");
if (!rc)
rc = clk_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ * 2);
if (rc)
pr_err("%s: failed to configure ABE m2x2 DPLL!\n", __func__);
- usb_dpll = clk_get_sys(NULL, "dpll_usb_ck");
+ usb_dpll = ti_clk_get("dpll_usb_ck");
rc = clk_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ);
if (rc)
pr_err("%s: failed to configure USB DPLL!\n", __func__);
- usb_dpll = clk_get_sys(NULL, "dpll_usb_m2_ck");
+ usb_dpll = ti_clk_get("dpll_usb_m2_ck");
rc = clk_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ/2);
if (rc)
pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__);
--
1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: t-kristo@ti.com (Tero Kristo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv2 15/28] clk: ti: omap5: transition to usage of ti_clk_get
Date: Thu, 14 Apr 2016 14:08:04 +0300 [thread overview]
Message-ID: <1460632097-25727-16-git-send-email-t-kristo@ti.com> (raw)
In-Reply-To: <1460632097-25727-1-git-send-email-t-kristo@ti.com>
Cleanup any unnecessary DT_CLK() alias entries from the OMAP5 clock file.
Also, use ti_clk_get where necessary.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
drivers/clk/ti/clk-54xx.c | 168 ++-------------------------------------------
1 file changed, 6 insertions(+), 162 deletions(-)
diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c
index 59ce2fa..c267806 100644
--- a/drivers/clk/ti/clk-54xx.c
+++ b/drivers/clk/ti/clk-54xx.c
@@ -28,162 +28,6 @@
#define OMAP5_DPLL_USB_DEFFREQ 960000000
static struct ti_dt_clk omap54xx_clks[] = {
- DT_CLK(NULL, "pad_clks_src_ck", "pad_clks_src_ck"),
- DT_CLK(NULL, "pad_clks_ck", "pad_clks_ck"),
- DT_CLK(NULL, "secure_32k_clk_src_ck", "secure_32k_clk_src_ck"),
- DT_CLK(NULL, "slimbus_src_clk", "slimbus_src_clk"),
- DT_CLK(NULL, "slimbus_clk", "slimbus_clk"),
- DT_CLK(NULL, "sys_32k_ck", "sys_32k_ck"),
- DT_CLK(NULL, "virt_12000000_ck", "virt_12000000_ck"),
- DT_CLK(NULL, "virt_13000000_ck", "virt_13000000_ck"),
- DT_CLK(NULL, "virt_16800000_ck", "virt_16800000_ck"),
- DT_CLK(NULL, "virt_19200000_ck", "virt_19200000_ck"),
- DT_CLK(NULL, "virt_26000000_ck", "virt_26000000_ck"),
- DT_CLK(NULL, "virt_27000000_ck", "virt_27000000_ck"),
- DT_CLK(NULL, "virt_38400000_ck", "virt_38400000_ck"),
- DT_CLK(NULL, "sys_clkin", "sys_clkin"),
- DT_CLK(NULL, "xclk60mhsp1_ck", "xclk60mhsp1_ck"),
- DT_CLK(NULL, "xclk60mhsp2_ck", "xclk60mhsp2_ck"),
- DT_CLK(NULL, "abe_dpll_bypass_clk_mux", "abe_dpll_bypass_clk_mux"),
- DT_CLK(NULL, "abe_dpll_clk_mux", "abe_dpll_clk_mux"),
- DT_CLK(NULL, "dpll_abe_ck", "dpll_abe_ck"),
- DT_CLK(NULL, "dpll_abe_x2_ck", "dpll_abe_x2_ck"),
- DT_CLK(NULL, "dpll_abe_m2x2_ck", "dpll_abe_m2x2_ck"),
- DT_CLK(NULL, "abe_24m_fclk", "abe_24m_fclk"),
- DT_CLK(NULL, "abe_clk", "abe_clk"),
- DT_CLK(NULL, "abe_iclk", "abe_iclk"),
- DT_CLK(NULL, "abe_lp_clk_div", "abe_lp_clk_div"),
- DT_CLK(NULL, "dpll_abe_m3x2_ck", "dpll_abe_m3x2_ck"),
- DT_CLK(NULL, "dpll_core_ck", "dpll_core_ck"),
- DT_CLK(NULL, "dpll_core_x2_ck", "dpll_core_x2_ck"),
- DT_CLK(NULL, "dpll_core_h21x2_ck", "dpll_core_h21x2_ck"),
- DT_CLK(NULL, "c2c_fclk", "c2c_fclk"),
- DT_CLK(NULL, "c2c_iclk", "c2c_iclk"),
- DT_CLK(NULL, "custefuse_sys_gfclk_div", "custefuse_sys_gfclk_div"),
- DT_CLK(NULL, "dpll_core_h11x2_ck", "dpll_core_h11x2_ck"),
- DT_CLK(NULL, "dpll_core_h12x2_ck", "dpll_core_h12x2_ck"),
- DT_CLK(NULL, "dpll_core_h13x2_ck", "dpll_core_h13x2_ck"),
- DT_CLK(NULL, "dpll_core_h14x2_ck", "dpll_core_h14x2_ck"),
- DT_CLK(NULL, "dpll_core_h22x2_ck", "dpll_core_h22x2_ck"),
- DT_CLK(NULL, "dpll_core_h23x2_ck", "dpll_core_h23x2_ck"),
- DT_CLK(NULL, "dpll_core_h24x2_ck", "dpll_core_h24x2_ck"),
- DT_CLK(NULL, "dpll_core_m2_ck", "dpll_core_m2_ck"),
- DT_CLK(NULL, "dpll_core_m3x2_ck", "dpll_core_m3x2_ck"),
- DT_CLK(NULL, "iva_dpll_hs_clk_div", "iva_dpll_hs_clk_div"),
- DT_CLK(NULL, "dpll_iva_ck", "dpll_iva_ck"),
- DT_CLK(NULL, "dpll_iva_x2_ck", "dpll_iva_x2_ck"),
- DT_CLK(NULL, "dpll_iva_h11x2_ck", "dpll_iva_h11x2_ck"),
- DT_CLK(NULL, "dpll_iva_h12x2_ck", "dpll_iva_h12x2_ck"),
- DT_CLK(NULL, "mpu_dpll_hs_clk_div", "mpu_dpll_hs_clk_div"),
- DT_CLK(NULL, "dpll_mpu_ck", "dpll_mpu_ck"),
- DT_CLK(NULL, "dpll_mpu_m2_ck", "dpll_mpu_m2_ck"),
- DT_CLK(NULL, "per_dpll_hs_clk_div", "per_dpll_hs_clk_div"),
- DT_CLK(NULL, "dpll_per_ck", "dpll_per_ck"),
- DT_CLK(NULL, "dpll_per_x2_ck", "dpll_per_x2_ck"),
- DT_CLK(NULL, "dpll_per_h11x2_ck", "dpll_per_h11x2_ck"),
- DT_CLK(NULL, "dpll_per_h12x2_ck", "dpll_per_h12x2_ck"),
- DT_CLK(NULL, "dpll_per_h14x2_ck", "dpll_per_h14x2_ck"),
- DT_CLK(NULL, "dpll_per_m2_ck", "dpll_per_m2_ck"),
- DT_CLK(NULL, "dpll_per_m2x2_ck", "dpll_per_m2x2_ck"),
- DT_CLK(NULL, "dpll_per_m3x2_ck", "dpll_per_m3x2_ck"),
- DT_CLK(NULL, "dpll_unipro1_ck", "dpll_unipro1_ck"),
- DT_CLK(NULL, "dpll_unipro1_clkdcoldo", "dpll_unipro1_clkdcoldo"),
- DT_CLK(NULL, "dpll_unipro1_m2_ck", "dpll_unipro1_m2_ck"),
- DT_CLK(NULL, "dpll_unipro2_ck", "dpll_unipro2_ck"),
- DT_CLK(NULL, "dpll_unipro2_clkdcoldo", "dpll_unipro2_clkdcoldo"),
- DT_CLK(NULL, "dpll_unipro2_m2_ck", "dpll_unipro2_m2_ck"),
- DT_CLK(NULL, "usb_dpll_hs_clk_div", "usb_dpll_hs_clk_div"),
- DT_CLK(NULL, "dpll_usb_ck", "dpll_usb_ck"),
- DT_CLK(NULL, "dpll_usb_clkdcoldo", "dpll_usb_clkdcoldo"),
- DT_CLK(NULL, "dpll_usb_m2_ck", "dpll_usb_m2_ck"),
- DT_CLK(NULL, "dss_syc_gfclk_div", "dss_syc_gfclk_div"),
- DT_CLK(NULL, "func_128m_clk", "func_128m_clk"),
- DT_CLK(NULL, "func_12m_fclk", "func_12m_fclk"),
- DT_CLK(NULL, "func_24m_clk", "func_24m_clk"),
- DT_CLK(NULL, "func_48m_fclk", "func_48m_fclk"),
- DT_CLK(NULL, "func_96m_fclk", "func_96m_fclk"),
- DT_CLK(NULL, "l3_iclk_div", "l3_iclk_div"),
- DT_CLK(NULL, "gpu_l3_iclk", "gpu_l3_iclk"),
- DT_CLK(NULL, "l3init_60m_fclk", "l3init_60m_fclk"),
- DT_CLK(NULL, "wkupaon_iclk_mux", "wkupaon_iclk_mux"),
- DT_CLK(NULL, "l3instr_ts_gclk_div", "l3instr_ts_gclk_div"),
- DT_CLK(NULL, "l4_root_clk_div", "l4_root_clk_div"),
- DT_CLK(NULL, "dss_32khz_clk", "dss_32khz_clk"),
- DT_CLK(NULL, "dss_48mhz_clk", "dss_48mhz_clk"),
- DT_CLK(NULL, "dss_dss_clk", "dss_dss_clk"),
- DT_CLK(NULL, "dss_sys_clk", "dss_sys_clk"),
- DT_CLK(NULL, "gpio1_dbclk", "gpio1_dbclk"),
- DT_CLK(NULL, "gpio2_dbclk", "gpio2_dbclk"),
- DT_CLK(NULL, "gpio3_dbclk", "gpio3_dbclk"),
- DT_CLK(NULL, "gpio4_dbclk", "gpio4_dbclk"),
- DT_CLK(NULL, "gpio5_dbclk", "gpio5_dbclk"),
- DT_CLK(NULL, "gpio6_dbclk", "gpio6_dbclk"),
- DT_CLK(NULL, "gpio7_dbclk", "gpio7_dbclk"),
- DT_CLK(NULL, "gpio8_dbclk", "gpio8_dbclk"),
- DT_CLK(NULL, "iss_ctrlclk", "iss_ctrlclk"),
- DT_CLK(NULL, "lli_txphy_clk", "lli_txphy_clk"),
- DT_CLK(NULL, "lli_txphy_ls_clk", "lli_txphy_ls_clk"),
- DT_CLK(NULL, "mmc1_32khz_clk", "mmc1_32khz_clk"),
- DT_CLK(NULL, "sata_ref_clk", "sata_ref_clk"),
- DT_CLK(NULL, "slimbus1_slimbus_clk", "slimbus1_slimbus_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic480m_p1_clk", "usb_host_hs_hsic480m_p1_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic480m_p2_clk", "usb_host_hs_hsic480m_p2_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic480m_p3_clk", "usb_host_hs_hsic480m_p3_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic60m_p1_clk", "usb_host_hs_hsic60m_p1_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic60m_p2_clk", "usb_host_hs_hsic60m_p2_clk"),
- DT_CLK(NULL, "usb_host_hs_hsic60m_p3_clk", "usb_host_hs_hsic60m_p3_clk"),
- DT_CLK(NULL, "usb_host_hs_utmi_p1_clk", "usb_host_hs_utmi_p1_clk"),
- DT_CLK(NULL, "usb_host_hs_utmi_p2_clk", "usb_host_hs_utmi_p2_clk"),
- DT_CLK(NULL, "usb_host_hs_utmi_p3_clk", "usb_host_hs_utmi_p3_clk"),
- DT_CLK(NULL, "usb_otg_ss_refclk960m", "usb_otg_ss_refclk960m"),
- DT_CLK(NULL, "usb_phy_cm_clk32k", "usb_phy_cm_clk32k"),
- DT_CLK(NULL, "usb_tll_hs_usb_ch0_clk", "usb_tll_hs_usb_ch0_clk"),
- DT_CLK(NULL, "usb_tll_hs_usb_ch1_clk", "usb_tll_hs_usb_ch1_clk"),
- DT_CLK(NULL, "usb_tll_hs_usb_ch2_clk", "usb_tll_hs_usb_ch2_clk"),
- DT_CLK(NULL, "aess_fclk", "aess_fclk"),
- DT_CLK(NULL, "dmic_sync_mux_ck", "dmic_sync_mux_ck"),
- DT_CLK(NULL, "dmic_gfclk", "dmic_gfclk"),
- DT_CLK(NULL, "fdif_fclk", "fdif_fclk"),
- DT_CLK(NULL, "gpu_core_gclk_mux", "gpu_core_gclk_mux"),
- DT_CLK(NULL, "gpu_hyd_gclk_mux", "gpu_hyd_gclk_mux"),
- DT_CLK(NULL, "hsi_fclk", "hsi_fclk"),
- DT_CLK(NULL, "mcasp_sync_mux_ck", "mcasp_sync_mux_ck"),
- DT_CLK(NULL, "mcasp_gfclk", "mcasp_gfclk"),
- DT_CLK(NULL, "mcbsp1_sync_mux_ck", "mcbsp1_sync_mux_ck"),
- DT_CLK(NULL, "mcbsp1_gfclk", "mcbsp1_gfclk"),
- DT_CLK(NULL, "mcbsp2_sync_mux_ck", "mcbsp2_sync_mux_ck"),
- DT_CLK(NULL, "mcbsp2_gfclk", "mcbsp2_gfclk"),
- DT_CLK(NULL, "mcbsp3_sync_mux_ck", "mcbsp3_sync_mux_ck"),
- DT_CLK(NULL, "mcbsp3_gfclk", "mcbsp3_gfclk"),
- DT_CLK(NULL, "mmc1_fclk_mux", "mmc1_fclk_mux"),
- DT_CLK(NULL, "mmc1_fclk", "mmc1_fclk"),
- DT_CLK(NULL, "mmc2_fclk_mux", "mmc2_fclk_mux"),
- DT_CLK(NULL, "mmc2_fclk", "mmc2_fclk"),
- DT_CLK(NULL, "timer10_gfclk_mux", "timer10_gfclk_mux"),
- DT_CLK(NULL, "timer11_gfclk_mux", "timer11_gfclk_mux"),
- DT_CLK(NULL, "timer1_gfclk_mux", "timer1_gfclk_mux"),
- DT_CLK(NULL, "timer2_gfclk_mux", "timer2_gfclk_mux"),
- DT_CLK(NULL, "timer3_gfclk_mux", "timer3_gfclk_mux"),
- DT_CLK(NULL, "timer4_gfclk_mux", "timer4_gfclk_mux"),
- DT_CLK(NULL, "timer5_gfclk_mux", "timer5_gfclk_mux"),
- DT_CLK(NULL, "timer6_gfclk_mux", "timer6_gfclk_mux"),
- DT_CLK(NULL, "timer7_gfclk_mux", "timer7_gfclk_mux"),
- DT_CLK(NULL, "timer8_gfclk_mux", "timer8_gfclk_mux"),
- DT_CLK(NULL, "timer9_gfclk_mux", "timer9_gfclk_mux"),
- DT_CLK(NULL, "utmi_p1_gfclk", "utmi_p1_gfclk"),
- DT_CLK(NULL, "utmi_p2_gfclk", "utmi_p2_gfclk"),
- DT_CLK(NULL, "auxclk0_src_ck", "auxclk0_src_ck"),
- DT_CLK(NULL, "auxclk0_ck", "auxclk0_ck"),
- DT_CLK(NULL, "auxclkreq0_ck", "auxclkreq0_ck"),
- DT_CLK(NULL, "auxclk1_src_ck", "auxclk1_src_ck"),
- DT_CLK(NULL, "auxclk1_ck", "auxclk1_ck"),
- DT_CLK(NULL, "auxclkreq1_ck", "auxclkreq1_ck"),
- DT_CLK(NULL, "auxclk2_src_ck", "auxclk2_src_ck"),
- DT_CLK(NULL, "auxclk2_ck", "auxclk2_ck"),
- DT_CLK(NULL, "auxclkreq2_ck", "auxclkreq2_ck"),
- DT_CLK(NULL, "auxclk3_src_ck", "auxclk3_src_ck"),
- DT_CLK(NULL, "auxclk3_ck", "auxclk3_ck"),
- DT_CLK(NULL, "auxclkreq3_ck", "auxclkreq3_ck"),
DT_CLK("omap_i2c.1", "ick", "dummy_ck"),
DT_CLK("omap_i2c.2", "ick", "dummy_ck"),
DT_CLK("omap_i2c.3", "ick", "dummy_ck"),
@@ -233,27 +77,27 @@ int __init omap5xxx_dt_clk_init(void)
omap2_clk_disable_autoidle_all();
- abe_dpll_ref = clk_get_sys(NULL, "abe_dpll_clk_mux");
- sys_32k_ck = clk_get_sys(NULL, "sys_32k_ck");
+ abe_dpll_ref = ti_clk_get("abe_dpll_clk_mux");
+ sys_32k_ck = ti_clk_get("sys_32k_ck");
rc = clk_set_parent(abe_dpll_ref, sys_32k_ck);
- abe_dpll = clk_get_sys(NULL, "dpll_abe_ck");
+ abe_dpll = ti_clk_get("dpll_abe_ck");
if (!rc)
rc = clk_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ);
if (rc)
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
- abe_dpll = clk_get_sys(NULL, "dpll_abe_m2x2_ck");
+ abe_dpll = ti_clk_get("dpll_abe_m2x2_ck");
if (!rc)
rc = clk_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ * 2);
if (rc)
pr_err("%s: failed to configure ABE m2x2 DPLL!\n", __func__);
- usb_dpll = clk_get_sys(NULL, "dpll_usb_ck");
+ usb_dpll = ti_clk_get("dpll_usb_ck");
rc = clk_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ);
if (rc)
pr_err("%s: failed to configure USB DPLL!\n", __func__);
- usb_dpll = clk_get_sys(NULL, "dpll_usb_m2_ck");
+ usb_dpll = ti_clk_get("dpll_usb_m2_ck");
rc = clk_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ/2);
if (rc)
pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__);
--
1.7.9.5
next prev parent reply other threads:[~2016-04-14 11:08 UTC|newest]
Thread overview: 92+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-14 11:07 [PATCHv2 00/28] ARM: OMAP2+: hwmod module clock type support Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` [PATCHv2 02/28] clk: ti: dpll: use ti_clk_get to fetch ref/bypass clocks Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` [PATCHv2 03/28] ARM: OMAP2+: omap_device: create clock alias purely from DT data Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` [PATCHv2 04/28] ARM: OMAP2+: hwmod: use new ti_clk_get API to search for clock handles Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` [PATCHv2 06/28] ARM: OMAP2+: hwmod: fetch main_clk based on hwmod name Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` [PATCHv2 07/28] ARM: OMAP2+: timer: change order of hwmod data handling Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo [this message]
2016-04-14 11:08 ` [PATCHv2 15/28] clk: ti: omap5: transition to usage of ti_clk_get Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` [PATCHv2 16/28] clk: ti: dra7: " Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` [PATCHv2 17/28] clk: ti: dm814x: " Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` [PATCHv2 18/28] clk: ti: dm816x: cleanup any unnecessary clock aliases Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` [PATCHv2 19/28] clk: ti: remove un-used definitions from public clk_hw_omap struct Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo
[not found] ` <1460632097-25727-1-git-send-email-t-kristo-l0cyMroinI0@public.gmane.org>
2016-04-14 11:07 ` [PATCHv2 01/28] clk: ti: add ti_clk_get helper API Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` [PATCHv2 05/28] ARM: OMAP2+: clock: use the new ti_clk_get for fetching clocks Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` [PATCHv2 08/28] ARM: OMAP2+: clockdomain: add usecounting support to autoidle APIs Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` [PATCHv2 09/28] ARM: AM33xx: fix module_wait_ready without clkctrl register Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` [PATCHv2 10/28] clk: ti: omap2: transition to usage of ti_clk_get Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:07 ` Tero Kristo
2016-04-14 11:08 ` [PATCHv2 11/28] clk: ti: am33xx: " Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` [PATCHv2 12/28] clk: ti: omap3: " Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` [PATCHv2 13/28] clk: ti: am43xx: " Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` [PATCHv2 14/28] clk: ti: omap4: " Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` [PATCHv2 20/28] clk: ti: mux: export mux clock APIs locally Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` [PATCHv2 21/28] clk: ti: am33xx: fix timer3/6 init time setup for module clocks Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` [PATCHv2 24/28] ARM: dts: omap4: add hwmod " Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` [PATCHv2 26/28] ARM: dts: am43xx: " Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` [PATCHv2 27/28] ARM: dts: omap5: " Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` [PATCHv2 22/28] dt-bindings: clk: ti: Document module clock type Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` [PATCHv2 23/28] clk: ti: add support for omap4 module clocks Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` [PATCHv2 25/28] ARM: dts: am33xx: add hwmod " Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` [PATCHv2 28/28] ARM: dts: dra7: " Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-04-14 11:08 ` Tero Kristo
2016-05-12 23:39 ` [PATCHv2 00/28] ARM: OMAP2+: hwmod module clock type support Stephen Boyd
2016-05-12 23:39 ` Stephen Boyd
2016-05-13 10:58 ` Tero Kristo
2016-05-13 10:58 ` Tero Kristo
2016-05-13 10:58 ` Tero Kristo
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