From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: agraf@suse.de, qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
Thomas Huth <thuth@redhat.com>,
David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 3/3] ppc: Fix migration of the XER register
Date: Mon, 18 Apr 2016 15:17:47 +1000 [thread overview]
Message-ID: <1460956667-9520-4-git-send-email-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <1460956667-9520-1-git-send-email-david@gibson.dropbear.id.au>
From: Thomas Huth <thuth@redhat.com>
env->xer only holds the lower bits of the XER register nowadays, the
SO, OV and CA bits are stored in separate variables (see the function
cpu_write_xer() for details). Since the migration code currently only
reads the "xer" variable, the upper bits are lost during migration.
Fix it by using cpu_read_xer() instead.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target-ppc/machine.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-ppc/machine.c b/target-ppc/machine.c
index 692121e..46684fb 100644
--- a/target-ppc/machine.c
+++ b/target-ppc/machine.c
@@ -136,7 +136,7 @@ static void cpu_pre_save(void *opaque)
env->spr[SPR_LR] = env->lr;
env->spr[SPR_CTR] = env->ctr;
- env->spr[SPR_XER] = env->xer;
+ env->spr[SPR_XER] = cpu_read_xer(env);
#if defined(TARGET_PPC64)
env->spr[SPR_CFAR] = env->cfar;
#endif
--
2.5.5
next prev parent reply other threads:[~2016-04-18 5:16 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-18 5:17 [Qemu-devel] [PULL 0/3] ppc-for-2.6 queue 20160418 David Gibson
2016-04-18 5:17 ` [Qemu-devel] [PULL 1/3] ppc: Fix the range check in the LSWI instruction David Gibson
2016-04-18 5:17 ` [Qemu-devel] [PULL 2/3] ppc: Fix the bad exception NIP value and the range check in LSWX David Gibson
2016-04-18 5:17 ` David Gibson [this message]
2016-04-18 10:54 ` [Qemu-devel] [PULL 0/3] ppc-for-2.6 queue 20160418 Peter Maydell
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