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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org,
	Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Subject: [PATCH 2/9] drm/i915: Replace the pinned context address with its unique ID
Date: Tue, 19 Apr 2016 07:49:13 +0100	[thread overview]
Message-ID: <1461048560-31983-3-git-send-email-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <1461048560-31983-1-git-send-email-chris@chris-wilson.co.uk>

Rather than reuse the current location of the context in the global GTT,
use its unique ID assigned to it for the lifetime of that context.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 12 +++++-------
 drivers/gpu/drm/i915/intel_lrc.c    | 36 ++++++------------------------------
 drivers/gpu/drm/i915/intel_lrc.h    |  3 ---
 3 files changed, 11 insertions(+), 40 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index cacbe45b7938..bd409bfa6e61 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2056,15 +2056,13 @@ static void i915_dump_lrc_obj(struct seq_file *m,
 	struct drm_i915_gem_object *ctx_obj = ctx->engine[engine->id].state;
 	unsigned long ggtt_offset = 0;
 
+	seq_printf(m, "CONTEXT: %s %u\n", engine->name, ctx->hw_id);
+
 	if (ctx_obj == NULL) {
-		seq_printf(m, "Context on %s with no gem object\n",
-			   engine->name);
+		seq_printf(m, "\tNot allocated\n");
 		return;
 	}
 
-	seq_printf(m, "CONTEXT: %s %u\n", engine->name,
-		   intel_execlists_ctx_id(ctx, engine));
-
 	if (!i915_gem_obj_ggtt_bound(ctx_obj))
 		seq_puts(m, "\tNot bound in GGTT\n");
 	else
@@ -2183,8 +2181,8 @@ static int i915_execlists(struct seq_file *m, void *data)
 
 		seq_printf(m, "\t%d requests in queue\n", count);
 		if (head_req) {
-			seq_printf(m, "\tHead request id: %u\n",
-				   intel_execlists_ctx_id(head_req->ctx, engine));
+			seq_printf(m, "\tHead request context: %u\n",
+				   head_req->ctx->hw_id);
 			seq_printf(m, "\tHead request tail: %u\n",
 				   head_req->tail);
 		}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 72c72bd97568..cec112449b31 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -313,14 +313,12 @@ static void
 intel_lr_context_descriptor_update(struct intel_context *ctx,
 				   struct intel_engine_cs *engine)
 {
-	uint64_t lrca, desc;
+	u64 desc;
 
-	lrca = ctx->engine[engine->id].lrc_vma->node.start +
-	       LRC_PPHWSP_PN * PAGE_SIZE;
-
-	desc = engine->ctx_desc_template;			   /* bits  0-11 */
-	desc |= lrca;					   /* bits 12-31 */
-	desc |= (lrca >> PAGE_SHIFT) << GEN8_CTX_ID_SHIFT; /* bits 32-51 */
+	desc = engine->ctx_desc_template; /* bits  0-11 */
+	desc |= ctx->engine[engine->id].lrc_vma->node.start +
+	       LRC_PPHWSP_PN * PAGE_SIZE; /* bits 12-31 */
+	desc |= (u64)ctx->hw_id << GEN8_CTX_ID_SHIFT; /* bits 32-51 */
 
 	ctx->engine[engine->id].lrc_desc = desc;
 }
@@ -331,28 +329,6 @@ uint64_t intel_lr_context_descriptor(struct intel_context *ctx,
 	return ctx->engine[engine->id].lrc_desc;
 }
 
-/**
- * intel_execlists_ctx_id() - get the Execlists Context ID
- * @ctx: Context to get the ID for
- * @ring: Engine to get the ID for
- *
- * Do not confuse with ctx->id! Unfortunately we have a name overload
- * here: the old context ID we pass to userspace as a handler so that
- * they can refer to a context, and the new context ID we pass to the
- * ELSP so that the GPU can inform us of the context status via
- * interrupts.
- *
- * The context ID is a portion of the context descriptor, so we can
- * just extract the required part from the cached descriptor.
- *
- * Return: 20-bits globally unique context ID.
- */
-u32 intel_execlists_ctx_id(struct intel_context *ctx,
-			   struct intel_engine_cs *engine)
-{
-	return intel_lr_context_descriptor(ctx, engine) >> GEN8_CTX_ID_SHIFT;
-}
-
 static void execlists_elsp_write(struct drm_i915_gem_request *rq0,
 				 struct drm_i915_gem_request *rq1)
 {
@@ -496,7 +472,7 @@ execlists_check_remove_request(struct intel_engine_cs *engine, u32 request_id)
 	if (!head_req)
 		return 0;
 
-	if (unlikely(intel_execlists_ctx_id(head_req->ctx, engine) != request_id))
+	if (unlikely(head_req->ctx->hw_id != request_id))
 		return 0;
 
 	WARN(head_req->elsp_submitted == 0, "Never submitted head request\n");
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 461f1ef9b5c1..b17ab79333aa 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -114,9 +114,6 @@ void intel_lr_context_reset(struct drm_i915_private *dev_priv,
 uint64_t intel_lr_context_descriptor(struct intel_context *ctx,
 				     struct intel_engine_cs *engine);
 
-u32 intel_execlists_ctx_id(struct intel_context *ctx,
-			   struct intel_engine_cs *engine);
-
 /* Execlists */
 int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists);
 struct i915_execbuffer_params;
-- 
2.8.0.rc3

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  parent reply	other threads:[~2016-04-19  6:49 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-15 11:54 [PATCH 0/3] GuC premature LRC unpin Tvrtko Ursulin
2016-04-15 11:54 ` [PATCH 1/3] drm/i915: Refactor execlists default context pinning Tvrtko Ursulin
2016-04-15 12:16   ` Chris Wilson
2016-04-15 13:21     ` Tvrtko Ursulin
2016-04-15 11:54 ` [PATCH 2/3] drm/i915/guc: Keep the previous context pinned until the next one has been completed Tvrtko Ursulin
2016-04-15 12:12   ` Chris Wilson
2016-04-15 13:16     ` Tvrtko Ursulin
2016-04-15 11:54 ` [PATCH 3/3] DO NOT MERGE: drm/i915: Enable GuC submission Tvrtko Ursulin
2016-04-15 15:24 ` ✗ Fi.CI.BAT: warning for GuC premature LRC unpin Patchwork
2016-04-19  6:49 ` Premature " Chris Wilson
2016-04-19  6:49   ` [PATCH 1/9] drm/i915: Assign every HW context a unique ID Chris Wilson
2016-04-19  8:57     ` Tvrtko Ursulin
2016-04-19  9:04       ` Chris Wilson
2016-04-19  9:20         ` Tvrtko Ursulin
2016-04-19  6:49   ` Chris Wilson [this message]
2016-04-19  9:03     ` [PATCH 2/9] drm/i915: Replace the pinned context address with its " Tvrtko Ursulin
2016-04-19  6:49   ` [PATCH 3/9] drm/i915: Refactor execlists default context pinning Chris Wilson
2016-04-19  9:16     ` Tvrtko Ursulin
2016-04-19  9:55       ` [PATCH] " Chris Wilson
2016-04-19  6:49   ` [PATCH 4/9] drm/i915: Remove early l3-remap Chris Wilson
2016-04-19  9:41     ` Tvrtko Ursulin
2016-04-19 10:07       ` [PATCH 1/3] drm/i915: L3 cache remapping is part of context switching Chris Wilson
2016-04-19 10:07         ` [PATCH 2/3] drm/i915: Consolidate L3 remapping LRI Chris Wilson
2016-04-19 10:21           ` Tvrtko Ursulin
2016-04-19 10:07         ` [PATCH 3/3] drm/i915: Remove early l3-remap Chris Wilson
2016-04-19 10:23           ` Tvrtko Ursulin
2016-04-19 10:20         ` [PATCH 1/3] drm/i915: L3 cache remapping is part of context switching Tvrtko Ursulin
2016-04-19  6:49   ` [PATCH 5/9] drm/i915: Rearrange switch_context to load the aliasing ppgtt on first use Chris Wilson
2016-04-19  9:52     ` Tvrtko Ursulin
2016-04-19  6:49   ` [PATCH 6/9] drm/i915: Move context initialisation to first-use Chris Wilson
2016-04-19  9:57     ` Tvrtko Ursulin
2016-04-19 10:15     ` Tvrtko Ursulin
2016-04-19 10:55       ` Chris Wilson
2016-04-19  6:49   ` [PATCH 7/9] drm/i915: Move the magical deferred context allocation into the request Chris Wilson
2016-04-19 10:28     ` Tvrtko Ursulin
2016-04-19  6:49   ` [PATCH 8/9] drm/i915: Track the previous pinned context inside " Chris Wilson
2016-04-19 12:02     ` Tvrtko Ursulin
2016-04-19 12:14       ` Chris Wilson
2016-04-19  6:49   ` [PATCH 9/9] drm/i915: Move releasing of the GEM request from free to retire/cancel Chris Wilson
2016-04-19 12:16     ` Tvrtko Ursulin

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