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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 15/19] drm/i915: Move the magical deferred context allocation into the request
Date: Thu, 21 Apr 2016 09:59:04 +0100	[thread overview]
Message-ID: <1461229148-2939-15-git-send-email-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <1461229148-2939-1-git-send-email-chris@chris-wilson.co.uk>

We can hide more details of execlists from higher level code by removing
the explicit call to create an execlist context from execbuffer and
into its first use by execlists.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |  8 --------
 drivers/gpu/drm/i915/intel_lrc.c           | 23 +++++++++++++++--------
 drivers/gpu/drm/i915/intel_lrc.h           |  2 --
 3 files changed, 15 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 6f4f2a6cdf93..e0ee5d1ac372 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1085,14 +1085,6 @@ i915_gem_validate_context(struct drm_device *dev, struct drm_file *file,
 		return ERR_PTR(-EIO);
 	}
 
-	if (i915.enable_execlists && !ctx->engine[engine->id].state) {
-		int ret = intel_lr_context_deferred_alloc(ctx, engine);
-		if (ret) {
-			DRM_DEBUG("Could not create LRC %u: %d\n", ctx_id, ret);
-			return ERR_PTR(ret);
-		}
-	}
-
 	return ctx;
 }
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index eeb8be695288..23bc5fca6595 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -227,6 +227,8 @@ enum {
 #define GEN8_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT	0x17
 #define GEN9_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT	0x26
 
+static int execlists_context_deferred_alloc(struct intel_context *ctx,
+					    struct intel_engine_cs *engine);
 static int intel_lr_context_pin(struct intel_context *ctx,
 				struct intel_engine_cs *engine);
 
@@ -675,8 +677,6 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
 	struct intel_engine_cs *engine = request->engine;
 	int ret;
 
-	request->ringbuf = request->ctx->engine[engine->id].ringbuf;
-
 	if (i915.enable_guc_submission) {
 		/*
 		 * Check that the GuC has space for the request before
@@ -690,6 +690,14 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
 			return ret;
 	}
 
+	if (request->ctx->engine[engine->id].state == NULL) {
+		ret = execlists_context_deferred_alloc(request->ctx, engine);
+		if (ret)
+			return ret;
+	}
+
+	request->ringbuf = request->ctx->engine[engine->id].ringbuf;
+
 	ret = intel_lr_context_pin(request->ctx, engine);
 	if (ret)
 		return ret;
@@ -2134,7 +2142,7 @@ logical_ring_init(struct drm_device *dev, struct intel_engine_cs *engine)
 	if (ret)
 		goto error;
 
-	ret = intel_lr_context_deferred_alloc(dctx, engine);
+	ret = execlists_context_deferred_alloc(dctx, engine);
 	if (ret)
 		goto error;
 
@@ -2608,9 +2616,9 @@ uint32_t intel_lr_context_size(struct intel_engine_cs *engine)
 }
 
 /**
- * intel_lr_context_deferred_alloc() - create the LRC specific bits of a context
+ * execlists_context_deferred_alloc() - create the LRC specific bits of a context
  * @ctx: LR context to create.
- * @ring: engine to be used with the context.
+ * @engine: engine to be used with the context.
  *
  * This function can be called more than once, with different engines, if we plan
  * to use the context with them. The context backing objects and the ringbuffers
@@ -2620,9 +2628,8 @@ uint32_t intel_lr_context_size(struct intel_engine_cs *engine)
  *
  * Return: non-zero on error.
  */
-
-int intel_lr_context_deferred_alloc(struct intel_context *ctx,
-				    struct intel_engine_cs *engine)
+static int execlists_context_deferred_alloc(struct intel_context *ctx,
+					    struct intel_engine_cs *engine)
 {
 	struct drm_device *dev = engine->dev;
 	struct drm_i915_gem_object *ctx_obj;
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index b17ab79333aa..8bea937973f6 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -102,8 +102,6 @@ static inline void intel_logical_ring_emit_reg(struct intel_ringbuffer *ringbuf,
 
 void intel_lr_context_free(struct intel_context *ctx);
 uint32_t intel_lr_context_size(struct intel_engine_cs *engine);
-int intel_lr_context_deferred_alloc(struct intel_context *ctx,
-				    struct intel_engine_cs *engine);
 void intel_lr_context_unpin(struct intel_context *ctx,
 			    struct intel_engine_cs *engine);
 
-- 
2.8.1

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  parent reply	other threads:[~2016-04-21  8:59 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-21  8:58 [PATCH 01/19] drm/i915/overlay: Replace i915_gem_obj_ggtt_offset() with the known flip_addr Chris Wilson
2016-04-21  8:58 ` [PATCH 02/19] io-mapping: Specify mapping size for io_mapping_map_wc() Chris Wilson
2016-04-21  8:58 ` [PATCH 03/19] drm/i915: Introduce i915_vm_to_ggtt() Chris Wilson
2016-04-21  8:58 ` [PATCH 04/19] drm/i915: Move ioremap_wc tracking onto VMA Chris Wilson
2016-04-21  8:58 ` [PATCH 05/19] drm/i915: Use i915_vma_pin_iomap on the ringbuffer object Chris Wilson
2016-04-21  8:58 ` [PATCH 06/19] drm/i915: Mark the current context as lost on suspend Chris Wilson
2016-04-21  8:58 ` [PATCH 07/19] drm/i915: L3 cache remapping is part of context switching Chris Wilson
2016-04-21  8:58 ` [PATCH 08/19] drm/i915: Consolidate L3 remapping LRI Chris Wilson
2016-04-21  8:58 ` [PATCH 09/19] drm/i915: Remove early l3-remap Chris Wilson
2016-04-21  8:58 ` [PATCH 10/19] drm/i915: Rearrange switch_context to load the aliasing ppgtt on first use Chris Wilson
2016-04-21  8:59 ` [PATCH 11/19] drm/i915: Assign every HW context a unique ID Chris Wilson
2016-04-21  8:59 ` [PATCH 12/19] drm/i915: Replace the pinned context address with its " Chris Wilson
2016-04-21  8:59 ` [PATCH 13/19] drm/i915: Refactor execlists default context pinning Chris Wilson
2016-04-21  8:59 ` [PATCH 14/19] drm/i915: Move context initialisation to first-use Chris Wilson
2016-04-21  8:59 ` Chris Wilson [this message]
2016-04-21  8:59 ` [PATCH 16/19] drm/i915: Move releasing of the GEM request from free to retire/cancel Chris Wilson
2016-04-21  8:59 ` [PATCH 17/19] drm/i915: Track the previous pinned context inside the request Chris Wilson
2016-04-21  8:59 ` [PATCH 18/19] drm/i915: Store LRC hardware id in " Chris Wilson
2016-04-21  8:59 ` [PATCH 19/19] drm/i915: Stop tracking execlists retired requests Chris Wilson
2016-04-21 16:24 ` ✗ Fi.CI.BAT: failure for series starting with [01/19] drm/i915/overlay: Replace i915_gem_obj_ggtt_offset() with the known flip_addr Patchwork
2016-04-23 14:53 ` ✗ Fi.CI.BAT: warning " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2016-04-21 14:57 Final CI pass for premature Chris Wilson
2016-04-21 14:57 ` [PATCH 15/19] drm/i915: Move the magical deferred context allocation into the request Chris Wilson
2016-04-20 18:42 Premature unpinning at last Chris Wilson
2016-04-20 18:42 ` [PATCH 15/19] drm/i915: Move the magical deferred context allocation into the request Chris Wilson

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