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From: sourab.gupta@intel.com
To: intel-gfx@lists.freedesktop.org
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
	Sourab Gupta <sourab.gupta@intel.com>,
	Deepak S <deepak.s@intel.com>
Subject: [PATCH 01/16] drm/i915: Introduce global id for contexts
Date: Fri, 22 Apr 2016 17:03:50 +0530	[thread overview]
Message-ID: <1461324845-25755-2-git-send-email-sourab.gupta@intel.com> (raw)
In-Reply-To: <1461324845-25755-1-git-send-email-sourab.gupta@intel.com>

From: Sourab Gupta <sourab.gupta@intel.com>

The current context user handles are specific to drm file instance.
There are some usecases, which may require a global id for the contexts.
For e.g. a system level GPU profiler tool may lean upon the global context
ids to associate the performance snapshots with individual contexts.

This global id may also be used further in order to provide a unique
context id to hw.

In this patch, the global ids are allocated from a separate cyclic idr and
can be further utilized for any usecase described above.

v2: According to Chris' suggestion, implemented a separate idr for holding
global ids for contexts, as opposed to overloading the file specific
ctx->user_handle for this purpose. This global id can also further be used
wherever hw has to be programmed with ctx unique id, though this patch just
introduces the hw global id as such.

Signed-off-by: Sourab Gupta <sourab.gupta@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |  3 +++
 drivers/gpu/drm/i915/i915_gem_context.c | 21 +++++++++++++++++++++
 2 files changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2817a88..cfc135d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -848,6 +848,7 @@ struct i915_ctx_hang_stats {
 struct intel_context {
 	struct kref ref;
 	int user_handle;
+	int global_id;
 	uint8_t remap_slice;
 	struct drm_i915_private *i915;
 	int flags;
@@ -1890,6 +1891,8 @@ struct drm_i915_private {
 
 	bool preserve_bios_swizzle;
 
+	struct idr global_ctx_idr;
+
 	/* overlay */
 	struct intel_overlay *overlay;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index ca7a1c0..9cb124e 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -263,6 +263,18 @@ __create_hw_context(struct drm_device *dev,
 
 	ctx->file_priv = file_priv;
 	ctx->user_handle = ret;
+
+	/* TODO: If required, this global id can be used for programming the hw
+	 * fields too. In that case, we'll have take care of hw restrictions
+	 * while allocating idr. e.g. for some hw, we may not have full 32 bits
+	 * available.
+	 */
+	ret = idr_alloc_cyclic(&dev_priv->global_ctx_idr,
+				ctx, 0, 0, GFP_KERNEL);
+	if (ret < 0)
+		goto err_out;
+
+	ctx->global_id = ret;
 	/* NB: Mark all slices as needing a remap so that when the context first
 	 * loads it will restore whatever remap state already exists. If there
 	 * is no remap info, it will be a NOP. */
@@ -287,6 +299,7 @@ i915_gem_create_context(struct drm_device *dev,
 			struct drm_i915_file_private *file_priv)
 {
 	const bool is_global_default_ctx = file_priv == NULL;
+	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_context *ctx;
 	int ret = 0;
 
@@ -333,6 +346,7 @@ err_unpin:
 		i915_gem_object_ggtt_unpin(ctx->legacy_hw_ctx.rcs_state);
 err_destroy:
 	idr_remove(&file_priv->context_idr, ctx->user_handle);
+	idr_remove(&dev_priv->global_ctx_idr, ctx->global_id);
 	i915_gem_context_unreference(ctx);
 	return ERR_PTR(ret);
 }
@@ -403,6 +417,7 @@ int i915_gem_context_init(struct drm_device *dev)
 			dev_priv->hw_context_size = 0;
 		}
 	}
+	idr_init(&dev_priv->global_ctx_idr);
 
 	ctx = i915_gem_create_context(dev, NULL);
 	if (IS_ERR(ctx)) {
@@ -425,6 +440,8 @@ void i915_gem_context_fini(struct drm_device *dev)
 	struct intel_context *dctx = dev_priv->kernel_context;
 	int i;
 
+	idr_destroy(&dev_priv->global_ctx_idr);
+
 	if (dctx->legacy_hw_ctx.rcs_state) {
 		/* The only known way to stop the gpu from accessing the hw context is
 		 * to reset it. Do this as the very last operation to avoid confusing
@@ -480,6 +497,8 @@ static int context_idr_cleanup(int id, void *p, void *data)
 {
 	struct intel_context *ctx = p;
 
+	idr_remove(&ctx->i915->global_ctx_idr, ctx->global_id);
+
 	i915_gem_context_unreference(ctx);
 	return 0;
 }
@@ -906,6 +925,7 @@ int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
 {
 	struct drm_i915_gem_context_destroy *args = data;
 	struct drm_i915_file_private *file_priv = file->driver_priv;
+	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_context *ctx;
 	int ret;
 
@@ -926,6 +946,7 @@ int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
 	}
 
 	idr_remove(&ctx->file_priv->context_idr, ctx->user_handle);
+	idr_remove(&dev_priv->global_ctx_idr, ctx->global_id);
 	i915_gem_context_unreference(ctx);
 	mutex_unlock(&dev->struct_mutex);
 
-- 
1.9.1

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  reply	other threads:[~2016-04-22 11:32 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-22 11:33 [PATCH 00/16] Framework to collect command stream gpu metrics using i915 perf sourab.gupta
2016-04-22 11:33 ` sourab.gupta [this message]
2016-04-22 11:33 ` [PATCH 02/16] drm/i915: Constrain intel_context::global_id to 20 bits sourab.gupta
2016-04-22 11:33 ` [PATCH 03/16] drm/i915: return ctx->global_id from intel_execlists_ctx_id() sourab.gupta
2016-04-22 11:33 ` [PATCH 04/16] drm/i915: Add ctx getparam ioctl parameter to retrieve ctx global id sourab.gupta
2016-04-22 11:33 ` [PATCH 05/16] drm/i915: Expose OA sample source to userspace sourab.gupta
2016-04-22 11:33 ` [PATCH 06/16] drm/i915: Framework for capturing command stream based OA reports sourab.gupta
2016-04-22 11:33 ` [PATCH 07/16] drm/i915: flush periodic samples, in case of no pending CS sample requests sourab.gupta
2016-04-22 11:33 ` [PATCH 08/16] drm/i915: Handle the overflow condition for command stream buf sourab.gupta
2016-04-22 11:33 ` [PATCH 09/16] drm/i915: Populate ctx ID for periodic OA reports sourab.gupta
2016-04-22 11:33 ` [PATCH 10/16] drm/i915: Add support for having pid output with OA report sourab.gupta
2016-04-22 11:34 ` [PATCH 11/16] drm/i915: Add support for emitting execbuffer tags through OA counter reports sourab.gupta
2016-04-22 11:34 ` [PATCH 12/16] drm/i915: Extend i915 perf framework for collecting timestamps on all gpu engines sourab.gupta
2016-04-22 11:34 ` [PATCH 13/16] drm/i915: Extract raw GPU timestamps from OA reports to forward in perf samples sourab.gupta
2016-04-22 11:34 ` [PATCH 14/16] drm/i915: Support opening multiple concurrent perf streams sourab.gupta
2016-04-22 11:34 ` [PATCH 15/16] drm/i915: Mechanism to forward clock monotonic time in perf samples sourab.gupta
2016-04-22 19:49   ` Chris Wilson
2016-05-09  5:59     ` sourab gupta
2016-05-09  8:06       ` Chris Wilson
2016-04-22 11:34 ` [PATCH 16/16] drm/i915: Support for capturing MMIO register values sourab.gupta
2016-04-22 22:18   ` Chris Wilson

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