All of lore.kernel.org
 help / color / mirror / Atom feed
From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Subject: [PATCH v2 21/21] drm/i915: Unify GPU resets upon shutdown
Date: Sun, 24 Apr 2016 08:31:41 +0100	[thread overview]
Message-ID: <1461483101-10618-21-git-send-email-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <1461483101-10618-1-git-send-email-chris@chris-wilson.co.uk>

As we initialise engines, then contexts, ideally we want to unwind in
the opposite order: contexts then engines. Until now, the engines and
contexts were tightly coupled (the engine owned the default context)
preventing the "natural ordering" during shutdown. Now that execlists
merely holds a reference, as does the device for the kernel context, we
can relax the ordering constraint upon unload.

In doing so, we can reveal the true goal of this patch: always reset the GPU
back to its default starting condition before shutdown. It is known that
to disable the current legacy context we have to reset the GPU. The same
is true when the GPU has been enabled for execlists. However, we do each
reset separately, but functionally they are the same: Before shutting
down, we need to reset the GPU so that the next hardware user finds the
GPU in its expected default settings.

This unifies the resets added in a647828afc (drm/i915: Also perform gpu
reset under execlist mode) and 8e96d9c4d9 (drm/i915: reset the GPU on
context fini).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
CC: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: "Niu, Bing" <bing.niu@intel.com>
---
 drivers/gpu/drm/i915/i915_dma.c         | 37 ++++++++++++++++++++++++++-------
 drivers/gpu/drm/i915/i915_gem.c         |  8 -------
 drivers/gpu/drm/i915/i915_gem_context.c |  8 +------
 3 files changed, 30 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 5c7615041b31..9aa4346b111a 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -425,6 +425,33 @@ static const struct vga_switcheroo_client_ops i915_switcheroo_ops = {
 	.can_switch = i915_switcheroo_can_switch,
 };
 
+static void i915_gem_fini(struct drm_device *dev)
+{
+	/*
+	 * Neither the BIOS, ourselves or any other kernel
+	 * expects the system to be in execlists mode on startup,
+	 * so we need to reset the GPU back to legacy mode. And the only
+	 * known way to disable logical contexts is through a GPU reset.
+	 *
+	 * So in order to leave the system in a known default configuration,
+	 * always reset the GPU upon unload. In the future, this will also
+	 * cleans up the GEM state tracking, flushing off the requests and
+	 * leaving the system in a known idle state.
+	 *
+	 * Note that is of the upmost importance that the GPU is idle and
+	 * all stray writes are flushed *before* we dismantle the backing
+	 * storage for the pinned objects.
+	 */
+	intel_gpu_reset(dev, ALL_ENGINES);
+
+	mutex_lock(&dev->struct_mutex);
+	i915_gem_context_fini(dev);
+	i915_gem_cleanup_engines(dev);
+	mutex_unlock(&dev->struct_mutex);
+
+	WARN_ON(!list_empty(&to_i915(dev)->context_list));
+}
+
 static int i915_load_modeset_init(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -506,10 +533,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
 	return 0;
 
 cleanup_gem:
-	mutex_lock(&dev->struct_mutex);
-	i915_gem_cleanup_engines(dev);
-	i915_gem_context_fini(dev);
-	mutex_unlock(&dev->struct_mutex);
+	i915_gem_fini(dev);
 cleanup_irq:
 	intel_guc_ucode_fini(dev);
 	drm_irq_uninstall(dev);
@@ -1456,10 +1480,7 @@ int i915_driver_unload(struct drm_device *dev)
 	flush_workqueue(dev_priv->wq);
 
 	intel_guc_ucode_fini(dev);
-	mutex_lock(&dev->struct_mutex);
-	i915_gem_cleanup_engines(dev);
-	i915_gem_context_fini(dev);
-	mutex_unlock(&dev->struct_mutex);
+	i915_gem_fini(dev);
 	intel_fbc_cleanup_cfb(dev_priv);
 
 	intel_power_domains_fini(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index a88aa7f11a9c..82e41eeb36bb 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4970,14 +4970,6 @@ i915_gem_cleanup_engines(struct drm_device *dev)
 
 	for_each_engine(engine, dev_priv)
 		dev_priv->gt.cleanup_engine(engine);
-
-	if (i915.enable_execlists)
-		/*
-		 * Neither the BIOS, ourselves or any other kernel
-		 * expects the system to be in execlists mode on startup,
-		 * so we need to reset the GPU back to legacy mode.
-		 */
-		intel_gpu_reset(dev, ALL_ENGINES);
 }
 
 static void
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index fef33a3ce3b7..26122de365b2 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -452,14 +452,8 @@ void i915_gem_context_fini(struct drm_device *dev)
 
 	i915_gem_context_lost(dev_priv);
 
-	if (dctx->legacy_hw_ctx.rcs_state) {
-		/* The only known way to stop the gpu from accessing the hw context is
-		 * to reset it. Do this as the very last operation to avoid confusing
-		 * other code, leading to spurious errors. */
-		intel_gpu_reset(dev, ALL_ENGINES);
-
+	if (dctx->legacy_hw_ctx.rcs_state)
 		i915_gem_object_ggtt_unpin(dctx->legacy_hw_ctx.rcs_state);
-	}
 
 	i915_gem_context_unreference(dctx);
 	dev_priv->kernel_context = NULL;
-- 
2.8.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2016-04-24  7:32 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-24  7:31 [PATCH v2 01/21] drm/i915/fbdev: Call intel_unpin_fb_obj() on release Chris Wilson
2016-04-24  7:31 ` [PATCH v2 02/21] drm/i915/overlay: Replace i915_gem_obj_ggtt_offset() with the known flip_addr Chris Wilson
2016-04-24  7:31 ` [PATCH v2 03/21] io-mapping: Specify mapping size for io_mapping_map_wc() Chris Wilson
2016-04-24  7:31   ` Chris Wilson
2016-04-24  7:31   ` Chris Wilson
2016-04-24  7:31 ` [PATCH v2 04/21] drm/i915: Introduce i915_vm_to_ggtt() Chris Wilson
2016-04-24  7:31 ` [PATCH v2 05/21] drm/i915: Move ioremap_wc tracking onto VMA Chris Wilson
2016-04-24  7:31 ` [PATCH v2 06/21] drm/i915: Use i915_vma_pin_iomap on the ringbuffer object Chris Wilson
2016-04-24  7:31 ` [PATCH v2 07/21] drm/i915: Mark the current context as lost on suspend Chris Wilson
2016-04-24  7:31 ` [PATCH v2 08/21] drm/i915: L3 cache remapping is part of context switching Chris Wilson
2016-04-24  7:31 ` [PATCH v2 09/21] drm/i915: Consolidate L3 remapping LRI Chris Wilson
2016-04-24  7:31 ` [PATCH v2 10/21] drm/i915: Remove early l3-remap Chris Wilson
2016-04-24  7:31 ` [PATCH v2 11/21] drm/i915: Rearrange switch_context to load the aliasing ppgtt on first use Chris Wilson
2016-04-24  7:31 ` [PATCH v2 12/21] drm/i915: Assign every HW context a unique ID Chris Wilson
2016-04-24  7:31 ` [PATCH v2 13/21] drm/i915: Replace the pinned context address with its " Chris Wilson
2016-04-24  7:31 ` [PATCH v2 14/21] drm/i915: Refactor execlists default context pinning Chris Wilson
2016-04-24  7:31 ` [PATCH v2 15/21] drm/i915: Move context initialisation to first-use Chris Wilson
2016-04-24  7:31 ` [PATCH v2 16/21] drm/i915: Move the magical deferred context allocation into the request Chris Wilson
2016-04-24  7:31 ` [PATCH v2 17/21] drm/i915: Move releasing of the GEM request from free to retire/cancel Chris Wilson
2016-04-24  7:31 ` [PATCH v2 18/21] drm/i915: Track the previous pinned context inside the request Chris Wilson
2016-04-24  7:31 ` [PATCH v2 19/21] drm/i915: Store LRC hardware id in " Chris Wilson
2016-04-24  7:31 ` [PATCH v2 20/21] drm/i915: Stop tracking execlists retired requests Chris Wilson
2016-04-24  7:31 ` Chris Wilson [this message]
2016-04-24 11:51 ` ✗ Fi.CI.BAT: failure for series starting with [v2,01/21] drm/i915/fbdev: Call intel_unpin_fb_obj() on release Patchwork
2016-04-24 12:40   ` Chris Wilson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1461483101-10618-21-git-send-email-chris@chris-wilson.co.uk \
    --to=chris@chris-wilson.co.uk \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=mika.kuoppala@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.