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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 02/10] drm/i915: Fix ordering of sanitize ppgtt and sanitize execlists
Date: Thu, 28 Apr 2016 17:24:24 +0100	[thread overview]
Message-ID: <1461860672-12623-2-git-send-email-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <1461860672-12623-1-git-send-email-chris@chris-wilson.co.uk>

The i915.enable_ppgtt option depends upon the state of
i915.enable_execlists option - so we need to sanitize execlists first.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_dma.c     | 13 +++++++++++++
 drivers/gpu/drm/i915/i915_drv.h     |  2 ++
 drivers/gpu/drm/i915/i915_gem.c     |  3 ---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 16 +++++-----------
 drivers/gpu/drm/i915/intel_lrc.c    |  2 --
 5 files changed, 20 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index f69330cf0118..c91387f1aedd 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -968,6 +968,19 @@ static void intel_device_info_runtime_init(struct drm_device *dev)
 			 info->has_subslice_pg ? "y" : "n");
 	DRM_DEBUG_DRIVER("has EU power gating: %s\n",
 			 info->has_eu_pg ? "y" : "n");
+
+	i915.enable_execlists =
+		intel_sanitize_enable_execlists(dev, i915.enable_execlists);
+
+	/*
+	 * i915.enable_ppgtt is read-only, so do an early pass to validate the
+	 * user's requested state against the hardware/driver capabilities.  We
+	 * do this now so that we can print out any log messages once rather
+	 * than every time we check intel_enable_ppgtt().
+	 */
+	i915.enable_ppgtt =
+		intel_sanitize_enable_ppgtt(dev, i915.enable_ppgtt);
+	DRM_DEBUG_DRIVER("ppgtt mode: %i\n", i915.enable_ppgtt);
 }
 
 static void intel_init_dpio(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e2abbcc27f2c..17f22009f2b3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2753,6 +2753,8 @@ extern int i915_max_ioctl;
 extern int i915_suspend_switcheroo(struct drm_device *dev, pm_message_t state);
 extern int i915_resume_switcheroo(struct drm_device *dev);
 
+int intel_sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt);
+
 /* i915_dma.c */
 void __printf(3, 4)
 __i915_printk(struct drm_i915_private *dev_priv, const char *level,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 96fbc9ab4039..bd6061f177fe 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4901,9 +4901,6 @@ int i915_gem_init(struct drm_device *dev)
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	int ret;
 
-	i915.enable_execlists = intel_sanitize_enable_execlists(dev,
-			i915.enable_execlists);
-
 	mutex_lock(&dev->struct_mutex);
 
 	if (!i915.enable_execlists) {
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 59a78f760b6b..364cf8236021 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -110,7 +110,7 @@ const struct i915_ggtt_view i915_ggtt_view_rotated = {
 	.type = I915_GGTT_VIEW_ROTATED,
 };
 
-static int sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt)
+int intel_sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt)
 {
 	bool has_aliasing_ppgtt;
 	bool has_full_ppgtt;
@@ -123,12 +123,14 @@ static int sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt)
 	if (intel_vgpu_active(dev))
 		has_full_ppgtt = false; /* emulation is too hard */
 
+	if (!has_aliasing_ppgtt)
+		return 0;
+
 	/*
 	 * We don't allow disabling PPGTT for gen9+ as it's a requirement for
 	 * execlists, the sole mechanism available to submit work.
 	 */
-	if (INTEL_INFO(dev)->gen < 9 &&
-	    (enable_ppgtt == 0 || !has_aliasing_ppgtt))
+	if (enable_ppgtt == 0 && INTEL_INFO(dev)->gen < 9)
 		return 0;
 
 	if (enable_ppgtt == 1)
@@ -3219,14 +3221,6 @@ int i915_ggtt_init_hw(struct drm_device *dev)
 	if (intel_iommu_gfx_mapped)
 		DRM_INFO("VT-d active for gfx access\n");
 #endif
-	/*
-	 * i915.enable_ppgtt is read-only, so do an early pass to validate the
-	 * user's requested state against the hardware/driver capabilities.  We
-	 * do this now so that we can print out any log messages once rather
-	 * than every time we check intel_enable_ppgtt().
-	 */
-	i915.enable_ppgtt = sanitize_enable_ppgtt(dev, i915.enable_ppgtt);
-	DRM_DEBUG_DRIVER("ppgtt mode: %i\n", i915.enable_ppgtt);
 
 	return 0;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 874c2515f9d4..4c832f90fe49 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -245,8 +245,6 @@ static int intel_lr_context_pin(struct intel_context *ctx,
  */
 int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists)
 {
-	WARN_ON(i915.enable_ppgtt == -1);
-
 	/* On platforms with execlist available, vGPU will only
 	 * support execlist mode, no ring buffer mode.
 	 */
-- 
2.8.1

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  reply	other threads:[~2016-04-28 16:24 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-28 16:24 [PATCH 01/10] drm/i915: Apply strongly ordered RCS breadcrumb to gen8/legacy Chris Wilson
2016-04-28 16:24 ` Chris Wilson [this message]
2016-04-28 18:48   ` [PATCH 02/10] drm/i915: Fix ordering of sanitize ppgtt and sanitize execlists Dave Gordon
2016-04-29 10:59   ` Joonas Lahtinen
2016-04-28 16:24 ` [PATCH 03/10] drm/i915: Fix gen8 semaphores id for legacy mode Chris Wilson
2016-04-29  8:36   ` Tvrtko Ursulin
2016-04-29  8:49     ` Chris Wilson
2016-05-04 11:35       ` Dave Gordon
2016-05-04 11:44         ` Chris Wilson
2016-04-28 16:24 ` [PATCH 04/10] drm/i915: Fix serialisation of pipecontrol write vs semaphore signal Chris Wilson
2016-04-28 16:24 ` [PATCH 05/10] drm/i915: Reload PD tables after semaphore wait on gen8 Chris Wilson
2016-04-28 16:24 ` [PATCH 06/10] drm/i915: Bump reserved size for legacy gen8 semaphore emission Chris Wilson
2016-04-29  7:40   ` Joonas Lahtinen
2016-04-28 16:24 ` [PATCH 07/10] drm/i915: Trim the flush for the legacy request emission Chris Wilson
2016-04-29  7:43   ` Joonas Lahtinen
2016-04-28 16:24 ` [PATCH 08/10] drm/i915: Trim the flush for the execlists " Chris Wilson
2016-04-29  7:49   ` Joonas Lahtinen
2016-04-28 16:24 ` [PATCH 09/10] drm/i915: Enable semaphores for legacy submission on gen8 Chris Wilson
2016-05-02  8:56   ` Daniel Vetter
2016-04-28 16:24 ` [PATCH 10/10] drm/i915: Enable legacy/semaphores for CI Chris Wilson
2016-04-28 16:56 ` ✗ Fi.CI.BAT: failure for series starting with [01/10] drm/i915: Apply strongly ordered RCS breadcrumb to gen8/legacy Patchwork
2016-04-29  8:30 ` [PATCH 01/10] " Joonas Lahtinen

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