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From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: qemu-devel@nongnu.org, peter.maydell@linaro.org
Cc: alex.bennee@linaro.org, serge.fdrv@gmail.com, rth@twiddle.net,
	qemu-arm@nongnu.org, edgar.iglesias@xilinx.com
Subject: [Qemu-devel] [PATCH v3 3/7] target-arm: Add the IL flag to syn_data_abort
Date: Fri, 29 Apr 2016 14:08:00 +0200	[thread overview]
Message-ID: <1461931684-1867-4-git-send-email-edgar.iglesias@gmail.com> (raw)
In-Reply-To: <1461931684-1867-1-git-send-email-edgar.iglesias@gmail.com>

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Add the IL flag to syn_data_abort(). Since we at the moment
never set ISV, the IL flag is always set to one.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 target-arm/internals.h | 4 +++-
 target-arm/op_helper.c | 6 ++++--
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/target-arm/internals.h b/target-arm/internals.h
index 2e70272..34e2688 100644
--- a/target-arm/internals.h
+++ b/target-arm/internals.h
@@ -384,9 +384,11 @@ static inline uint32_t syn_insn_abort(int same_el, int ea, int s1ptw, int fsc)
 }
 
 static inline uint32_t syn_data_abort(int same_el, int ea, int cm, int s1ptw,
-                                      int wnr, int fsc)
+                                      int wnr, int fsc,
+                                      bool is_16bit)
 {
     return (EC_DATAABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT)
+        | (is_16bit ? 0 : ARM_EL_IL)
         | (ea << 9) | (cm << 8) | (s1ptw << 7) | (wnr << 6) | fsc;
 }
 
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index d626ff1..e69c1de 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -115,7 +115,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
             syn = syn_insn_abort(same_el, 0, fi.s1ptw, syn);
             exc = EXCP_PREFETCH_ABORT;
         } else {
-            syn = syn_data_abort(same_el, 0, 0, fi.s1ptw, is_write == 1, syn);
+            syn = syn_data_abort(same_el, 0, 0, fi.s1ptw, is_write == 1, syn,
+                                 1);
             if (is_write == 1 && arm_feature(env, ARM_FEATURE_V6)) {
                 fsr |= (1 << 11);
             }
@@ -161,7 +162,8 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, int is_write,
     }
 
     raise_exception(env, EXCP_DATA_ABORT,
-                    syn_data_abort(same_el, 0, 0, 0, is_write == 1, 0x21),
+                    syn_data_abort(same_el, 0, 0, 0, is_write == 1, 0x21,
+                                   1),
                     target_el);
 }
 
-- 
2.5.0

  parent reply	other threads:[~2016-04-29 12:09 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-29 12:07 [Qemu-devel] [PATCH v3 0/7] arm: Steps towards EL2 support round 6 Edgar E. Iglesias
2016-04-29 12:07 ` [Qemu-devel] [PATCH v3 1/7] tcg: Add tcg_set_insn_param Edgar E. Iglesias
2016-04-29 12:07 ` [Qemu-devel] [PATCH v3 2/7] gen-icount: Use tcg_set_insn_param Edgar E. Iglesias
2016-04-29 12:08 ` Edgar E. Iglesias [this message]
2016-05-04 17:06   ` [Qemu-devel] [PATCH v3 3/7] target-arm: Add the IL flag to syn_data_abort Peter Maydell
2016-05-04 17:21     ` Edgar E. Iglesias
2016-04-29 12:08 ` [Qemu-devel] [PATCH v3 4/7] target-arm: Split data abort syndrome generator Edgar E. Iglesias
2016-04-29 12:08 ` [Qemu-devel] [PATCH v3 5/7] target-arm/translate-a64.c: Use extract32 in disas_ldst_reg_imm9 Edgar E. Iglesias
2016-04-29 12:08 ` [Qemu-devel] [PATCH v3 6/7] target-arm/translate-a64.c: Unify some of the ldst_reg decoding Edgar E. Iglesias
2016-04-29 12:08 ` [Qemu-devel] [PATCH v3 7/7] target-arm: A64: Create Instruction Syndromes for Data Aborts Edgar E. Iglesias
2016-05-04 17:38   ` Peter Maydell
2016-05-05 15:56     ` Edgar E. Iglesias
2016-05-04 17:45 ` [Qemu-devel] [PATCH v3 0/7] arm: Steps towards EL2 support round 6 Peter Maydell

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