From: Krzysztof Kozlowski <k.kozlowski@samsung.com> To: Sylwester Nawrocki <s.nawrocki@samsung.com>, Tomasz Figa <tomasz.figa@gmail.com>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@codeaurora.org>, Kukjin Kim <kgene@kernel.org>, Krzysztof Kozlowski <k.kozlowski@samsung.com>, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Subject: [PATCH 16/18] clk: samsung: exynos5420: Move sleep init function and PLL rates data to init section Date: Wed, 11 May 2016 14:02:12 +0200 [thread overview] Message-ID: <1462968134-6085-16-git-send-email-k.kozlowski@samsung.com> (raw) In-Reply-To: <1462968134-6085-1-git-send-email-k.kozlowski@samsung.com> The exynos5420_clk_sleep_init() function and arrays with initialization data of PLLs can be moved to init section because they are referenced only from other init-level symbols. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> --- drivers/clk/samsung/clk-exynos5420.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index adb0ae4efb7a..79fb8557bcf3 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -306,7 +306,7 @@ static struct syscore_ops exynos5420_clk_syscore_ops = { .resume = exynos5420_clk_resume, }; -static void exynos5420_clk_sleep_init(void) +static void __init exynos5420_clk_sleep_init(void) { exynos5x_save = samsung_clk_alloc_reg_dump(exynos5x_clk_regs, ARRAY_SIZE(exynos5x_clk_regs)); @@ -333,7 +333,7 @@ err_soc: return; } #else -static void exynos5420_clk_sleep_init(void) {} +static void __init exynos5420_clk_sleep_init(void) {} #endif /* list of all parent clocks */ @@ -1219,7 +1219,7 @@ static const struct samsung_gate_clock exynos5x_gate_clks[] __initconst = { GATE(CLK_G3D, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9, 0, 0), }; -static const struct samsung_pll_rate_table exynos5420_pll2550x_24mhz_tbl[] = { +static const struct samsung_pll_rate_table exynos5420_pll2550x_24mhz_tbl[] __initconst = { PLL_35XX_RATE(2000000000, 250, 3, 0), PLL_35XX_RATE(1900000000, 475, 6, 0), PLL_35XX_RATE(1800000000, 225, 3, 0), -- 1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: k.kozlowski@samsung.com (Krzysztof Kozlowski) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 16/18] clk: samsung: exynos5420: Move sleep init function and PLL rates data to init section Date: Wed, 11 May 2016 14:02:12 +0200 [thread overview] Message-ID: <1462968134-6085-16-git-send-email-k.kozlowski@samsung.com> (raw) In-Reply-To: <1462968134-6085-1-git-send-email-k.kozlowski@samsung.com> The exynos5420_clk_sleep_init() function and arrays with initialization data of PLLs can be moved to init section because they are referenced only from other init-level symbols. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> --- drivers/clk/samsung/clk-exynos5420.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index adb0ae4efb7a..79fb8557bcf3 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -306,7 +306,7 @@ static struct syscore_ops exynos5420_clk_syscore_ops = { .resume = exynos5420_clk_resume, }; -static void exynos5420_clk_sleep_init(void) +static void __init exynos5420_clk_sleep_init(void) { exynos5x_save = samsung_clk_alloc_reg_dump(exynos5x_clk_regs, ARRAY_SIZE(exynos5x_clk_regs)); @@ -333,7 +333,7 @@ err_soc: return; } #else -static void exynos5420_clk_sleep_init(void) {} +static void __init exynos5420_clk_sleep_init(void) {} #endif /* list of all parent clocks */ @@ -1219,7 +1219,7 @@ static const struct samsung_gate_clock exynos5x_gate_clks[] __initconst = { GATE(CLK_G3D, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9, 0, 0), }; -static const struct samsung_pll_rate_table exynos5420_pll2550x_24mhz_tbl[] = { +static const struct samsung_pll_rate_table exynos5420_pll2550x_24mhz_tbl[] __initconst = { PLL_35XX_RATE(2000000000, 250, 3, 0), PLL_35XX_RATE(1900000000, 475, 6, 0), PLL_35XX_RATE(1800000000, 225, 3, 0), -- 1.9.1
next prev parent reply other threads:[~2016-05-11 12:02 UTC|newest] Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-05-11 12:01 [PATCH 01/18] clk: samsung: Constify clock init data with clock arrays Krzysztof Kozlowski 2016-05-11 12:01 ` Krzysztof Kozlowski 2016-05-11 12:01 ` [PATCH 02/18] clk: samsung: exynos3250: Move platform driver and of_device_id to init section Krzysztof Kozlowski 2016-05-11 12:01 ` Krzysztof Kozlowski 2016-05-11 12:01 ` [PATCH 03/18] clk: samsung: exynos3250: Constify all clock initializers Krzysztof Kozlowski 2016-05-11 12:01 ` Krzysztof Kozlowski 2016-05-11 12:02 ` [PATCH 04/18] clk: samsung: exynos4: Move local function to init section Krzysztof Kozlowski 2016-05-11 12:02 ` Krzysztof Kozlowski 2016-05-11 12:02 ` [PATCH 05/18] clk: samsung: exynos4: Constify all clock initializers Krzysztof Kozlowski 2016-05-11 12:02 ` Krzysztof Kozlowski 2016-05-11 12:02 ` [PATCH 06/18] clk: samsung: exynos4415: " Krzysztof Kozlowski 2016-05-11 12:02 ` Krzysztof Kozlowski 2016-05-11 12:02 ` [PATCH 07/18] clk: samsung: exynos4415: Move PLL rates data to init section Krzysztof Kozlowski 2016-05-11 12:02 ` Krzysztof Kozlowski 2016-05-11 12:02 ` [PATCH 08/18] clk: samsung: exynos5250: Constify all clock initializers Krzysztof Kozlowski 2016-05-11 12:02 ` Krzysztof Kozlowski 2016-05-11 12:02 ` [PATCH 09/18] clk: samsung: exynos5260: " Krzysztof Kozlowski 2016-05-11 12:02 ` Krzysztof Kozlowski 2016-05-11 12:02 ` [PATCH 10/18] clk: samsung: exynos5410: " Krzysztof Kozlowski 2016-05-11 12:02 ` Krzysztof Kozlowski 2016-05-11 12:02 ` [PATCH 11/18] clk: samsung: exynos5420: " Krzysztof Kozlowski 2016-05-11 12:02 ` Krzysztof Kozlowski 2016-05-11 12:02 ` [PATCH 12/18] clk: samsung: exynos5440: " Krzysztof Kozlowski 2016-05-11 12:02 ` Krzysztof Kozlowski 2016-05-11 12:02 ` [PATCH 13/18] clk: samsung: exynos7: " Krzysztof Kozlowski 2016-05-11 12:02 ` Krzysztof Kozlowski 2016-05-11 12:02 ` [PATCH 14/18] clk: samsung: exynos5433: " Krzysztof Kozlowski 2016-05-11 12:02 ` Krzysztof Kozlowski 2016-05-11 12:02 ` [PATCH 15/18] clk: samsung: exynos5433: Move PLL rates data to init section Krzysztof Kozlowski 2016-05-11 12:02 ` Krzysztof Kozlowski 2016-05-11 12:02 ` Krzysztof Kozlowski [this message] 2016-05-11 12:02 ` [PATCH 16/18] clk: samsung: exynos5420: Move sleep init function and " Krzysztof Kozlowski 2016-05-11 12:02 ` [PATCH 17/18] clk: samsung: exynos5250: Move sleep init function " Krzysztof Kozlowski 2016-05-11 12:02 ` Krzysztof Kozlowski 2016-05-11 12:02 ` [PATCH 18/18] clk: samsung: Fully constify mux parent names Krzysztof Kozlowski 2016-05-11 12:02 ` Krzysztof Kozlowski 2016-05-11 12:12 ` [PATCH] clk: samsung: exynos3250: Move PLL rates data to init section Krzysztof Kozlowski 2016-05-11 12:12 ` Krzysztof Kozlowski 2016-06-18 14:35 ` Tomasz Figa 2016-06-18 14:35 ` Tomasz Figa 2016-06-18 14:35 ` Tomasz Figa
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