All of lore.kernel.org
 help / color / mirror / Atom feed
From: minyard@acm.org
To: Igor Mammedov <imammedo@redhat.com>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	qemu-devel@nongnu.org, minyard@acm.org, cminyard@mvista.com
Subject: [Qemu-devel] [PATCH v2 7/7] pc: Add an SMB0 ACPI device to q35
Date: Wed,  1 Jun 2016 11:27:00 -0500	[thread overview]
Message-ID: <1464798420-12018-8-git-send-email-minyard@acm.org> (raw)
In-Reply-To: <1464798420-12018-1-git-send-email-minyard@acm.org>

From: Corey Minyard <cminyard@mvista.com>

This is so I2C devices can be found in the ACPI namespace.  Currently
that's only IPMI, but devices can be easily added now.

Adding the devices required some PCI information, and the bus itself
to be added to the PCMachineState structure.

Note that this only works on Q35, the ACPI for PIIX4 is not capable
of handling an SMBus device.

Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
 hw/i386/acpi-build.c                 |  16 ++++++++++++++++
 hw/i386/pc_piix.c                    |  13 +++++++------
 hw/i386/pc_q35.c                     |  10 ++++++----
 include/hw/i386/pc.h                 |   2 ++
 tests/acpi-test-data/q35/DSDT        | Bin 8357 -> 8395 bytes
 tests/acpi-test-data/q35/DSDT.bridge | Bin 8374 -> 8412 bytes
 tests/acpi-test-data/q35/DSDT.ipmibt | Bin 8432 -> 8470 bytes
 7 files changed, 31 insertions(+), 10 deletions(-)

diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index b11fd3b..cbc922d 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1990,6 +1990,18 @@ static Aml *build_q35_osc_method(void)
     return method;
 }
 
+static void build_smb0(Aml *table, I2CBus *smbus, int devnr, int func)
+{
+    Aml *scope = aml_scope("_SB.PCI0");
+    Aml *dev = aml_device("SMB0");
+
+    aml_append(dev, aml_name_decl("_HID", aml_eisaid("APP0005")));
+    aml_append(dev, aml_name_decl("_ADR", aml_int(devnr << 16 | func)));
+    build_acpi_ipmi_devices(dev, BUS(smbus), "\\_SB.PCI0.SMB0");
+    aml_append(scope, dev);
+    aml_append(table, scope);
+}
+
 static void
 build_dsdt(GArray *table_data, GArray *linker,
            AcpiPmInfo *pm, AcpiMiscInfo *misc,
@@ -2000,6 +2012,7 @@ build_dsdt(GArray *table_data, GArray *linker,
     GPtrArray *mem_ranges = g_ptr_array_new_with_free_func(crs_range_free);
     GPtrArray *io_ranges = g_ptr_array_new_with_free_func(crs_range_free);
     PCMachineState *pcms = PC_MACHINE(machine);
+    PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
     uint32_t nr_mem = machine->ram_slots;
     int root_bus_limit = 0xFF;
     PCIBus *bus = NULL;
@@ -2053,6 +2066,9 @@ build_dsdt(GArray *table_data, GArray *linker,
         build_q35_isa_bridge(dsdt);
         build_isa_devices_aml(dsdt);
         build_q35_pci0_int(dsdt);
+        if (pcms->smbus && !pcmc->do_not_add_smb_acpi) {
+            build_smb0(dsdt, pcms->smbus, ICH9_SMB_DEV, ICH9_SMB_FUNC);
+        }
     }
 
     build_cpu_hotplug_aml(dsdt);
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index bf44093..4e0ed1f 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -252,15 +252,14 @@ static void pc_init1(MachineState *machine,
 
     if (pcmc->pci_enabled && acpi_enabled) {
         DeviceState *piix4_pm;
-        I2CBus *smbus;
 
         smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
         /* TODO: Populate SPD eeprom data.  */
-        smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
-                              gsi[9], smi_irq,
-                              pc_machine_is_smm_enabled(pcms),
-                              &piix4_pm);
-        smbus_eeprom_init(smbus, 8, NULL, 0);
+        pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
+                                    gsi[9], smi_irq,
+                                    pc_machine_is_smm_enabled(pcms),
+                                    &piix4_pm);
+        smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
 
         object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
                                  TYPE_HOTPLUG_HANDLER,
@@ -429,9 +428,11 @@ DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL,
 
 static void pc_i440fx_2_6_machine_options(MachineClass *m)
 {
+    PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
     pc_i440fx_2_7_machine_options(m);
     m->alias = NULL;
     m->is_default = 0;
+    pcmc->do_not_add_smb_acpi = true;
     SET_MACHINE_COMPAT(m, PC_COMPAT_2_6);
 }
 
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 4787df1..2742bb2 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -240,10 +240,10 @@ static void pc_q35_init(MachineState *machine)
     }
 
     /* TODO: Populate SPD eeprom data.  */
-    smbus_eeprom_init(ich9_smb_init(host_bus,
-                                    PCI_DEVFN(ICH9_SMB_DEV, ICH9_SMB_FUNC),
-                                    0xb100),
-                      8, NULL, 0);
+    pcms->smbus = ich9_smb_init(host_bus,
+                                PCI_DEVFN(ICH9_SMB_DEV, ICH9_SMB_FUNC),
+                                0xb100);
+    smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
 
     pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
 
@@ -294,8 +294,10 @@ DEFINE_Q35_MACHINE(v2_7, "pc-q35-2.7", NULL,
 
 static void pc_q35_2_6_machine_options(MachineClass *m)
 {
+    PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
     pc_q35_2_7_machine_options(m);
     m->alias = NULL;
+    pcmc->do_not_add_smb_acpi = true;
     SET_MACHINE_COMPAT(m, PC_COMPAT_2_6);
 }
 
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index dd6d644..6737efc 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -51,6 +51,7 @@ struct PCMachineState {
     HotplugHandler *acpi_dev;
     ISADevice *rtc;
     PCIBus *bus;
+    I2CBus *smbus;
     FWCfgState *fw_cfg;
 
     /* Configuration options: */
@@ -122,6 +123,7 @@ struct PCMachineClass {
     bool rsdp_in_ram;
     int legacy_acpi_table_size;
     unsigned acpi_data_size;
+    bool do_not_add_smb_acpi;
 
     /* SMBIOS compat: */
     bool smbios_defaults;
diff --git a/tests/acpi-test-data/q35/DSDT b/tests/acpi-test-data/q35/DSDT
index 1c089c34b06c9f2ea9fe67abb45498021319303c..9f3d165c756f6efc875e5364a157051e4ac929a5 100644
GIT binary patch
delta 62
zcmZ4Lc-oQ6CD<k8v;qSIW8p@wMoCpwz4&0K_yA{5gXkv7U|%N#j(87G7aleN23C%E
RN0%TTW(IkN&0Uhx>;M`y4+H=J

delta 24
fcmX@@xYUu$CD<iosR9E7qrpb5M#;?^C8gK_V66ug

diff --git a/tests/acpi-test-data/q35/DSDT.bridge b/tests/acpi-test-data/q35/DSDT.bridge
index b29fcda0bb1717ff708668c6e98f3ded3f34a96c..11ce6a8ddc7042ac7079549a8502467514d49ff8 100644
GIT binary patch
delta 62
zcmdnyc*l{;CD<k8jsgP%qu@raMoCpwz4&0K_yA{5gXkv7U|%N#j(87G7aleN23C%E
RN0%TTW(IkN&0Uf@>;Mz?4(I>?

delta 24
gcmccPxXqEvCD<ion*sv^<Ase}jgp%;N@}wM0Balv`2YX_

diff --git a/tests/acpi-test-data/q35/DSDT.ipmibt b/tests/acpi-test-data/q35/DSDT.ipmibt
index 74fc9b69204df80de3855657d3a4ff74e0eb964c..a25bd8c11d074a3b96513768987da5d1d40f9249 100644
GIT binary patch
delta 62
zcmez1IL(R6CD<iIOp$?saq32{Gm@&Rdhx+d@d3`B2GLED!M;ug9Pu8WE<9`k46GdS
SjxIqw%nb4jo3BbrvjYGS1P>tq

delta 24
gcmbQ{^udwKCD<k8g8~BsW9UY%Gm@MCNJ_B-0BcSNG5`Po

-- 
2.7.4

      parent reply	other threads:[~2016-06-01 16:27 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-01 16:26 [Qemu-devel] [PATCH v2 0/7] An IPMI over SMBus device minyard
2016-06-01 16:26 ` [Qemu-devel] [PATCH v2 1/7] i2c: Fix the PM SMBus driver so it actually works correctly minyard
2016-06-01 16:26 ` [Qemu-devel] [PATCH v2 2/7] pm_smbus: Add the ability to force block transfer enable minyard
2016-06-01 16:26 ` [Qemu-devel] [PATCH v2 3/7] ipmi: Add an SMBus IPMI interface minyard
2016-06-01 16:26 ` [Qemu-devel] [PATCH v2 4/7] acpi: Add i2c serial bus CRS handling minyard
2016-06-01 16:26 ` [Qemu-devel] [PATCH v2 5/7] ipmi: Fix SSIF ACPI handling to use the right CRS minyard
2016-06-01 16:26 ` [Qemu-devel] [PATCH v2 6/7] pc: Add 2.7 machine options minyard
2016-06-01 16:27 ` minyard [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1464798420-12018-8-git-send-email-minyard@acm.org \
    --to=minyard@acm.org \
    --cc=cminyard@mvista.com \
    --cc=imammedo@redhat.com \
    --cc=mst@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.