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From: Juri Lelli <juri.lelli@arm.com>
To: linux-kernel@vger.kernel.org
Cc: linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	devicetree@vger.kernel.org, peterz@infradead.org,
	vincent.guittot@linaro.org, robh+dt@kernel.org,
	mark.rutland@arm.com, linux@arm.linux.org.uk,
	sudeep.holla@arm.com, lorenzo.pieralisi@arm.com,
	catalin.marinas@arm.com, will.deacon@arm.com,
	morten.rasmussen@arm.com, dietmar.eggemann@arm.com,
	juri.lelli@arm.com, broonie@kernel.org, sgurrappadi@nvidia.com,
	Liviu Dudau <liviu.dudau@arm.com>,
	Pawel Moll <pawel.moll@arm.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Kumar Gala <galak@codeaurora.org>
Subject: [PATCH v5 3/8] arm, dts: add TC2 cpu capacity-dmips-mhz information
Date: Wed, 15 Jun 2016 11:17:52 +0100	[thread overview]
Message-ID: <1465985877-18271-4-git-send-email-juri.lelli@arm.com> (raw)
In-Reply-To: <1465985877-18271-1-git-send-email-juri.lelli@arm.com>

Add TC2 cpu capacity binding information.

Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: devicetree@vger.kernel.org
Signed-off-by: Juri Lelli <juri.lelli@arm.com>
---

Changes from v1:
  - capacity-scale removed

Changes from v4:
  - binding changed to capacity-dmips-mhz
---
 arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index 0205c97..45d08cc 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -39,6 +39,7 @@
 			reg = <0>;
 			cci-control-port = <&cci_control1>;
 			cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
+			capacity-dmips-mhz = <1024>;
 		};
 
 		cpu1: cpu@1 {
@@ -47,6 +48,7 @@
 			reg = <1>;
 			cci-control-port = <&cci_control1>;
 			cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
+			capacity-dmips-mhz = <1024>;
 		};
 
 		cpu2: cpu@2 {
@@ -55,6 +57,7 @@
 			reg = <0x100>;
 			cci-control-port = <&cci_control2>;
 			cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
+			capacity-dmips-mhz = <516>;
 		};
 
 		cpu3: cpu@3 {
@@ -63,6 +66,7 @@
 			reg = <0x101>;
 			cci-control-port = <&cci_control2>;
 			cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
+			capacity-dmips-mhz = <516>;
 		};
 
 		cpu4: cpu@4 {
@@ -71,6 +75,7 @@
 			reg = <0x102>;
 			cci-control-port = <&cci_control2>;
 			cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
+			capacity-dmips-mhz = <516>;
 		};
 
 		idle-states {
-- 
2.7.0

WARNING: multiple messages have this Message-ID (diff)
From: juri.lelli@arm.com (Juri Lelli)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 3/8] arm, dts: add TC2 cpu capacity-dmips-mhz information
Date: Wed, 15 Jun 2016 11:17:52 +0100	[thread overview]
Message-ID: <1465985877-18271-4-git-send-email-juri.lelli@arm.com> (raw)
In-Reply-To: <1465985877-18271-1-git-send-email-juri.lelli@arm.com>

Add TC2 cpu capacity binding information.

Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: devicetree at vger.kernel.org
Signed-off-by: Juri Lelli <juri.lelli@arm.com>
---

Changes from v1:
  - capacity-scale removed

Changes from v4:
  - binding changed to capacity-dmips-mhz
---
 arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index 0205c97..45d08cc 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -39,6 +39,7 @@
 			reg = <0>;
 			cci-control-port = <&cci_control1>;
 			cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
+			capacity-dmips-mhz = <1024>;
 		};
 
 		cpu1: cpu at 1 {
@@ -47,6 +48,7 @@
 			reg = <1>;
 			cci-control-port = <&cci_control1>;
 			cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
+			capacity-dmips-mhz = <1024>;
 		};
 
 		cpu2: cpu at 2 {
@@ -55,6 +57,7 @@
 			reg = <0x100>;
 			cci-control-port = <&cci_control2>;
 			cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
+			capacity-dmips-mhz = <516>;
 		};
 
 		cpu3: cpu at 3 {
@@ -63,6 +66,7 @@
 			reg = <0x101>;
 			cci-control-port = <&cci_control2>;
 			cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
+			capacity-dmips-mhz = <516>;
 		};
 
 		cpu4: cpu at 4 {
@@ -71,6 +75,7 @@
 			reg = <0x102>;
 			cci-control-port = <&cci_control2>;
 			cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
+			capacity-dmips-mhz = <516>;
 		};
 
 		idle-states {
-- 
2.7.0

  parent reply	other threads:[~2016-06-15 10:18 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-15 10:17 [PATCH v5 0/8] CPUs capacity information for heterogeneous systems Juri Lelli
2016-06-15 10:17 ` Juri Lelli
2016-06-15 10:17 ` [PATCH v5 1/8] Documentation: arm: define DT cpu capacity-dmips-mhz bindings Juri Lelli
2016-06-15 10:17   ` Juri Lelli
2016-06-15 12:51   ` Vincent Guittot
2016-06-15 12:51     ` Vincent Guittot
2016-06-15 12:51     ` Vincent Guittot
2016-06-15 14:24     ` Juri Lelli
2016-06-15 14:24       ` Juri Lelli
2016-06-15 14:24       ` Juri Lelli
2016-06-15 14:04   ` Mark Brown
2016-06-15 14:04     ` Mark Brown
2016-06-15 14:22     ` Juri Lelli
2016-06-15 14:22       ` Juri Lelli
2016-06-15 14:22       ` Juri Lelli
2016-06-15 22:11   ` Rob Herring
2016-06-15 22:11     ` Rob Herring
2016-06-15 22:11     ` Rob Herring
2016-06-16  8:20     ` Juri Lelli
2016-06-16  8:20       ` Juri Lelli
2016-06-16  8:20       ` Juri Lelli
2016-06-22 16:51       ` Juri Lelli
2016-06-22 16:51         ` Juri Lelli
2016-06-22 16:51         ` Juri Lelli
2016-06-15 10:17 ` [PATCH v5 2/8] arm: parse cpu capacity-dmips-mhz from DT Juri Lelli
2016-06-15 10:17   ` Juri Lelli
2016-06-15 10:17   ` Juri Lelli
2016-06-15 10:17 ` Juri Lelli [this message]
2016-06-15 10:17   ` [PATCH v5 3/8] arm, dts: add TC2 cpu capacity-dmips-mhz information Juri Lelli
2016-06-15 10:17 ` [PATCH v5 4/8] arm64: parse cpu capacity-dmips-mhz from DT Juri Lelli
2016-06-15 10:17   ` Juri Lelli
2016-06-15 10:20   ` Mark Brown
2016-06-15 10:25     ` Juri Lelli
2016-06-15 10:25       ` Juri Lelli
2016-06-15 10:25       ` Juri Lelli
2016-06-15 13:49   ` Mark Brown
2016-06-15 13:49     ` Mark Brown
2016-06-15 14:48     ` Juri Lelli
2016-06-15 14:48       ` Juri Lelli
2016-06-15 10:17 ` [PATCH v5 5/8] arm64, dts: add Juno cpu capacity-dmips-mhz information Juri Lelli
2016-06-15 10:17   ` Juri Lelli
2016-06-15 10:17 ` [PATCH v5 6/8] arm64, dts: add Juno r2 " Juri Lelli
2016-06-15 10:17   ` Juri Lelli
2016-06-15 10:17 ` [PATCH v5 7/8] arm: add sysfs cpu_capacity attribute Juri Lelli
2016-06-15 10:17   ` Juri Lelli
2016-06-15 10:17 ` [PATCH v5 8/8] arm64: " Juri Lelli
2016-06-15 10:17   ` Juri Lelli
2016-06-15 10:17   ` Juri Lelli

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