From: Ben Dooks <ben.dooks@codethink.co.uk> To: matthew.leach@codethink.co.uk, k.kozlowski@samsung.com, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: linux-kernel@lists.codethink.co.uk, Ben Dooks <ben.dooks@codethink.co.uk> Subject: [[PATCH v2] 03/11] ARM: EXYNOS: fixups for big-endian operation Date: Tue, 21 Jun 2016 11:20:24 +0100 [thread overview] Message-ID: <1466504432-24187-4-git-send-email-ben.dooks@codethink.co.uk> (raw) In-Reply-To: <1466504432-24187-1-git-send-email-ben.dooks@codethink.co.uk> If the kernel is built big endian, then using the __raw read and write IO accessors is not going to work as they end up writing big-endian data to little-endian IO registers. Fix this by using the readl and writel relaxed versions which ensure little endian IO. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> --- arch/arm/mach-exynos/firmware.c | 16 ++++++++-------- arch/arm/mach-exynos/headsmp.S | 3 +++ arch/arm/mach-exynos/platsmp.c | 4 ++-- 3 files changed, 13 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c index 1bfd1b0..96b5e92 100644 --- a/arch/arm/mach-exynos/firmware.c +++ b/arch/arm/mach-exynos/firmware.c @@ -41,9 +41,9 @@ static int exynos_do_idle(unsigned long mode) case FW_DO_IDLE_AFTR: if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) exynos_save_cp15(); - __raw_writel(virt_to_phys(exynos_cpu_resume_ns), + writel_relaxed(virt_to_phys(exynos_cpu_resume_ns), sysram_ns_base_addr + 0x24); - __raw_writel(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20); + writel_relaxed(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20); if (soc_is_exynos3250()) { flush_cache_all(); exynos_smc(SMC_CMD_SAVE, OP_TYPE_CORE, @@ -97,7 +97,7 @@ static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr) if (soc_is_exynos4412()) boot_reg += 4 * cpu; - __raw_writel(boot_addr, boot_reg); + writel_relaxed(boot_addr, boot_reg); return 0; } @@ -113,7 +113,7 @@ static int exynos_get_cpu_boot_addr(int cpu, unsigned long *boot_addr) if (soc_is_exynos4412()) boot_reg += 4 * cpu; - *boot_addr = __raw_readl(boot_reg); + *boot_addr = readl_relaxed(boot_reg); return 0; } @@ -234,20 +234,20 @@ void exynos_set_boot_flag(unsigned int cpu, unsigned int mode) { unsigned int tmp; - tmp = __raw_readl(REG_CPU_STATE_ADDR + cpu * 4); + tmp = readl_relaxed(REG_CPU_STATE_ADDR + cpu * 4); if (mode & BOOT_MODE_MASK) tmp &= ~BOOT_MODE_MASK; tmp |= mode; - __raw_writel(tmp, REG_CPU_STATE_ADDR + cpu * 4); + writel_relaxed(tmp, REG_CPU_STATE_ADDR + cpu * 4); } void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode) { unsigned int tmp; - tmp = __raw_readl(REG_CPU_STATE_ADDR + cpu * 4); + tmp = readl_relaxed(REG_CPU_STATE_ADDR + cpu * 4); tmp &= ~mode; - __raw_writel(tmp, REG_CPU_STATE_ADDR + cpu * 4); + writel_relaxed(tmp, REG_CPU_STATE_ADDR + cpu * 4); } diff --git a/arch/arm/mach-exynos/headsmp.S b/arch/arm/mach-exynos/headsmp.S index b54f970..d3d24ab 100644 --- a/arch/arm/mach-exynos/headsmp.S +++ b/arch/arm/mach-exynos/headsmp.S @@ -12,12 +12,15 @@ #include <linux/linkage.h> #include <linux/init.h> +#include <asm/assembler.h> + /* * exynos4 specific entry point for secondary CPUs. This provides * a "holding pen" into which all secondary cores are held until we're * ready for them to initialise. */ ENTRY(exynos4_secondary_startup) +ARM_BE8(setend be) mrc p15, 0, r0, c0, c0, 5 and r0, r0, #15 adr r4, 1f diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 85c3be6..98ffe1e 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -264,7 +264,7 @@ int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr) ret = PTR_ERR(boot_reg); goto fail; } - __raw_writel(boot_addr, boot_reg); + writel_relaxed(boot_addr, boot_reg); ret = 0; } fail: @@ -289,7 +289,7 @@ int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr) ret = PTR_ERR(boot_reg); goto fail; } - *boot_addr = __raw_readl(boot_reg); + *boot_addr = readl_relaxed(boot_reg); ret = 0; } fail: -- 2.8.1
WARNING: multiple messages have this Message-ID (diff)
From: ben.dooks@codethink.co.uk (Ben Dooks) To: linux-arm-kernel@lists.infradead.org Subject: [[PATCH v2] 03/11] ARM: EXYNOS: fixups for big-endian operation Date: Tue, 21 Jun 2016 11:20:24 +0100 [thread overview] Message-ID: <1466504432-24187-4-git-send-email-ben.dooks@codethink.co.uk> (raw) In-Reply-To: <1466504432-24187-1-git-send-email-ben.dooks@codethink.co.uk> If the kernel is built big endian, then using the __raw read and write IO accessors is not going to work as they end up writing big-endian data to little-endian IO registers. Fix this by using the readl and writel relaxed versions which ensure little endian IO. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> --- arch/arm/mach-exynos/firmware.c | 16 ++++++++-------- arch/arm/mach-exynos/headsmp.S | 3 +++ arch/arm/mach-exynos/platsmp.c | 4 ++-- 3 files changed, 13 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c index 1bfd1b0..96b5e92 100644 --- a/arch/arm/mach-exynos/firmware.c +++ b/arch/arm/mach-exynos/firmware.c @@ -41,9 +41,9 @@ static int exynos_do_idle(unsigned long mode) case FW_DO_IDLE_AFTR: if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) exynos_save_cp15(); - __raw_writel(virt_to_phys(exynos_cpu_resume_ns), + writel_relaxed(virt_to_phys(exynos_cpu_resume_ns), sysram_ns_base_addr + 0x24); - __raw_writel(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20); + writel_relaxed(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20); if (soc_is_exynos3250()) { flush_cache_all(); exynos_smc(SMC_CMD_SAVE, OP_TYPE_CORE, @@ -97,7 +97,7 @@ static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr) if (soc_is_exynos4412()) boot_reg += 4 * cpu; - __raw_writel(boot_addr, boot_reg); + writel_relaxed(boot_addr, boot_reg); return 0; } @@ -113,7 +113,7 @@ static int exynos_get_cpu_boot_addr(int cpu, unsigned long *boot_addr) if (soc_is_exynos4412()) boot_reg += 4 * cpu; - *boot_addr = __raw_readl(boot_reg); + *boot_addr = readl_relaxed(boot_reg); return 0; } @@ -234,20 +234,20 @@ void exynos_set_boot_flag(unsigned int cpu, unsigned int mode) { unsigned int tmp; - tmp = __raw_readl(REG_CPU_STATE_ADDR + cpu * 4); + tmp = readl_relaxed(REG_CPU_STATE_ADDR + cpu * 4); if (mode & BOOT_MODE_MASK) tmp &= ~BOOT_MODE_MASK; tmp |= mode; - __raw_writel(tmp, REG_CPU_STATE_ADDR + cpu * 4); + writel_relaxed(tmp, REG_CPU_STATE_ADDR + cpu * 4); } void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode) { unsigned int tmp; - tmp = __raw_readl(REG_CPU_STATE_ADDR + cpu * 4); + tmp = readl_relaxed(REG_CPU_STATE_ADDR + cpu * 4); tmp &= ~mode; - __raw_writel(tmp, REG_CPU_STATE_ADDR + cpu * 4); + writel_relaxed(tmp, REG_CPU_STATE_ADDR + cpu * 4); } diff --git a/arch/arm/mach-exynos/headsmp.S b/arch/arm/mach-exynos/headsmp.S index b54f970..d3d24ab 100644 --- a/arch/arm/mach-exynos/headsmp.S +++ b/arch/arm/mach-exynos/headsmp.S @@ -12,12 +12,15 @@ #include <linux/linkage.h> #include <linux/init.h> +#include <asm/assembler.h> + /* * exynos4 specific entry point for secondary CPUs. This provides * a "holding pen" into which all secondary cores are held until we're * ready for them to initialise. */ ENTRY(exynos4_secondary_startup) +ARM_BE8(setend be) mrc p15, 0, r0, c0, c0, 5 and r0, r0, #15 adr r4, 1f diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 85c3be6..98ffe1e 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -264,7 +264,7 @@ int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr) ret = PTR_ERR(boot_reg); goto fail; } - __raw_writel(boot_addr, boot_reg); + writel_relaxed(boot_addr, boot_reg); ret = 0; } fail: @@ -289,7 +289,7 @@ int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr) ret = PTR_ERR(boot_reg); goto fail; } - *boot_addr = __raw_readl(boot_reg); + *boot_addr = readl_relaxed(boot_reg); ret = 0; } fail: -- 2.8.1
next prev parent reply other threads:[~2016-06-21 10:20 UTC|newest] Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-06-21 10:20 Exynos big-endian repost Ben Dooks 2016-06-21 10:20 ` Ben Dooks 2016-06-21 10:20 ` [[PATCH v2] 01/11] ARM: EXYNOS: fixup debug macros for big-endian Ben Dooks 2016-06-21 10:20 ` Ben Dooks 2016-06-21 11:15 ` Krzysztof Kozlowski 2016-06-21 11:15 ` Krzysztof Kozlowski 2016-06-21 10:20 ` [[PATCH v2] 02/11] ARM: Samsung: fixup endian issues in cpu detection Ben Dooks 2016-06-21 10:20 ` Ben Dooks 2016-06-21 11:16 ` Krzysztof Kozlowski 2016-06-21 11:16 ` Krzysztof Kozlowski 2016-06-21 10:20 ` Ben Dooks [this message] 2016-06-21 10:20 ` [[PATCH v2] 03/11] ARM: EXYNOS: fixups for big-endian operation Ben Dooks 2016-06-21 11:16 ` Krzysztof Kozlowski 2016-06-21 11:16 ` Krzysztof Kozlowski 2016-06-21 10:20 ` [[PATCH v2] 04/11] ARM: EXYNOS: fixup endian in pm/pmu Ben Dooks 2016-06-21 10:20 ` Ben Dooks 2016-06-21 11:16 ` Krzysztof Kozlowski 2016-06-21 11:16 ` Krzysztof Kozlowski 2016-06-21 10:20 ` [[PATCH v2] 05/11] ARM: EXYNOS: Enable ARCH_SUPPORTS_BIG_ENDIAN explicitly Ben Dooks 2016-06-21 10:20 ` Ben Dooks 2016-06-21 11:17 ` Krzysztof Kozlowski 2016-06-21 11:17 ` Krzysztof Kozlowski 2016-08-10 14:02 ` Krzysztof Kozlowski 2016-08-10 14:02 ` Krzysztof Kozlowski 2016-06-21 10:20 ` [[PATCH v2] 06/11] ARM: Samsung: fixup usage of __raw IO Ben Dooks 2016-06-21 10:20 ` Ben Dooks 2016-06-21 11:17 ` Krzysztof Kozlowski 2016-06-21 11:17 ` Krzysztof Kozlowski 2016-06-21 10:20 ` [[PATCH v2] 07/11] ARM: EXYNOS: fixup for __raw operations in suspend.c Ben Dooks 2016-06-21 10:20 ` Ben Dooks 2016-06-21 11:17 ` Krzysztof Kozlowski 2016-06-21 11:17 ` Krzysztof Kozlowski 2016-06-21 10:20 ` [[PATCH v2] 08/11] irqchip: exynos: fix usage of __raw IO Ben Dooks 2016-06-21 10:20 ` Ben Dooks 2016-06-23 18:53 ` Jason Cooper 2016-06-23 18:53 ` Jason Cooper 2016-06-21 10:20 ` [[PATCH v2] 09/11] irqchip/s3c24xx: fixup IO accessors for big endian Ben Dooks 2016-06-21 10:20 ` Ben Dooks 2016-06-21 10:20 ` Ben Dooks 2016-06-21 10:20 ` [[PATCH v2] 10/11] [V2] memory: samsung: endian fixes for IO Ben Dooks 2016-06-21 10:20 ` Ben Dooks 2016-06-21 10:20 ` [[PATCH v2] 11/11] hwrng: exynos - fixup IO accesors Ben Dooks 2016-06-21 10:20 ` Ben Dooks 2016-06-22 10:37 ` Herbert Xu 2016-06-22 10:37 ` Herbert Xu 2016-06-22 10:37 ` Herbert Xu 2016-06-22 11:53 ` Ben Dooks 2016-06-22 11:53 ` Ben Dooks
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