From: Tai Nguyen <ttnguyen@apm.com> To: mark.rutland@arm.com, will.deacon@arm.com, catalin.marinas@arm.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, patches@apm.com, Tai Nguyen <ttnguyen@apm.com> Subject: [PATCH v4 2/4] Documentation: Add documentation for APM X-Gene SoC PMU DTS binding Date: Wed, 22 Jun 2016 11:06:57 -0700 [thread overview] Message-ID: <1466618819-2697-3-git-send-email-ttnguyen@apm.com> (raw) In-Reply-To: <1466618819-2697-1-git-send-email-ttnguyen@apm.com> Signed-off-by: Tai Nguyen <ttnguyen@apm.com> Acked-by: Rob Herring <robh@kernel.org> --- .../devicetree/bindings/perf/apm-xgene-pmu.txt | 112 +++++++++++++++++++++ 1 file changed, 112 insertions(+) create mode 100644 Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt diff --git a/Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt b/Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt new file mode 100644 index 0000000..afb11cf --- /dev/null +++ b/Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt @@ -0,0 +1,112 @@ +* APM X-Gene SoC PMU bindings + +This is APM X-Gene SoC PMU (Performance Monitoring Unit) module. +The following PMU devices are supported: + + L3C - L3 cache controller + IOB - IO bridge + MCB - Memory controller bridge + MC - Memory controller + +The following section describes the SoC PMU DT node binding. + +Required properties: +- compatible : Shall be "apm,xgene-pmu" for revision 1 or + "apm,xgene-pmu-v2" for revision 2. +- regmap-csw : Regmap of the CPU switch fabric (CSW) resource. +- regmap-mcba : Regmap of the MCB-A (memory bridge) resource. +- regmap-mcbb : Regmap of the MCB-B (memory bridge) resource. +- reg : First resource shall be the CPU bus PMU resource. +- interrupts : Interrupt-specifier for PMU IRQ. + +Required properties for L3C subnode: +- compatible : Shall be "apm,xgene-pmu-l3c". +- reg : First resource shall be the L3C PMU resource. + +Required properties for IOB subnode: +- compatible : Shall be "apm,xgene-pmu-iob". +- reg : First resource shall be the IOB PMU resource. + +Required properties for MCB subnode: +- compatible : Shall be "apm,xgene-pmu-mcb". +- reg : First resource shall be the MCB PMU resource. +- enable-bit-index : The bit indicates if the according MCB is enabled. + +Required properties for MC subnode: +- compatible : Shall be "apm,xgene-pmu-mc". +- reg : First resource shall be the MC PMU resource. +- enable-bit-index : The bit indicates if the according MC is enabled. + +Example: + csw: csw@7e200000 { + compatible = "apm,xgene-csw", "syscon"; + reg = <0x0 0x7e200000 0x0 0x1000>; + }; + + mcba: mcba@7e700000 { + compatible = "apm,xgene-mcb", "syscon"; + reg = <0x0 0x7e700000 0x0 0x1000>; + }; + + mcbb: mcbb@7e720000 { + compatible = "apm,xgene-mcb", "syscon"; + reg = <0x0 0x7e720000 0x0 0x1000>; + }; + + pmu: pmu@78810000 { + compatible = "apm,xgene-pmu-v2"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + regmap-csw = <&csw>; + regmap-mcba = <&mcba>; + regmap-mcbb = <&mcbb>; + reg = <0x0 0x78810000 0x0 0x1000>; + interrupts = <0x0 0x22 0x4>; + + pmul3c@7e610000 { + compatible = "apm,xgene-pmu-l3c"; + reg = <0x0 0x7e610000 0x0 0x1000>; + }; + + pmuiob@7e940000 { + compatible = "apm,xgene-pmu-iob"; + reg = <0x0 0x7e940000 0x0 0x1000>; + }; + + pmucmcb@7e710000 { + compatible = "apm,xgene-pmu-mcb"; + reg = <0x0 0x7e710000 0x0 0x1000>; + enable-bit-index = <0>; + }; + + pmucmcb@7e730000 { + compatible = "apm,xgene-pmu-mcb"; + reg = <0x0 0x7e730000 0x0 0x1000>; + enable-bit-index = <1>; + }; + + pmucmc@7e810000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e810000 0x0 0x1000>; + enable-bit-index = <0>; + }; + + pmucmc@7e850000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e850000 0x0 0x1000>; + enable-bit-index = <1>; + }; + + pmucmc@7e890000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e890000 0x0 0x1000>; + enable-bit-index = <2>; + }; + + pmucmc@7e8d0000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e8d0000 0x0 0x1000>; + enable-bit-index = <3>; + }; + }; -- 1.9.1
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From: ttnguyen@apm.com (Tai Nguyen) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 2/4] Documentation: Add documentation for APM X-Gene SoC PMU DTS binding Date: Wed, 22 Jun 2016 11:06:57 -0700 [thread overview] Message-ID: <1466618819-2697-3-git-send-email-ttnguyen@apm.com> (raw) In-Reply-To: <1466618819-2697-1-git-send-email-ttnguyen@apm.com> Signed-off-by: Tai Nguyen <ttnguyen@apm.com> Acked-by: Rob Herring <robh@kernel.org> --- .../devicetree/bindings/perf/apm-xgene-pmu.txt | 112 +++++++++++++++++++++ 1 file changed, 112 insertions(+) create mode 100644 Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt diff --git a/Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt b/Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt new file mode 100644 index 0000000..afb11cf --- /dev/null +++ b/Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt @@ -0,0 +1,112 @@ +* APM X-Gene SoC PMU bindings + +This is APM X-Gene SoC PMU (Performance Monitoring Unit) module. +The following PMU devices are supported: + + L3C - L3 cache controller + IOB - IO bridge + MCB - Memory controller bridge + MC - Memory controller + +The following section describes the SoC PMU DT node binding. + +Required properties: +- compatible : Shall be "apm,xgene-pmu" for revision 1 or + "apm,xgene-pmu-v2" for revision 2. +- regmap-csw : Regmap of the CPU switch fabric (CSW) resource. +- regmap-mcba : Regmap of the MCB-A (memory bridge) resource. +- regmap-mcbb : Regmap of the MCB-B (memory bridge) resource. +- reg : First resource shall be the CPU bus PMU resource. +- interrupts : Interrupt-specifier for PMU IRQ. + +Required properties for L3C subnode: +- compatible : Shall be "apm,xgene-pmu-l3c". +- reg : First resource shall be the L3C PMU resource. + +Required properties for IOB subnode: +- compatible : Shall be "apm,xgene-pmu-iob". +- reg : First resource shall be the IOB PMU resource. + +Required properties for MCB subnode: +- compatible : Shall be "apm,xgene-pmu-mcb". +- reg : First resource shall be the MCB PMU resource. +- enable-bit-index : The bit indicates if the according MCB is enabled. + +Required properties for MC subnode: +- compatible : Shall be "apm,xgene-pmu-mc". +- reg : First resource shall be the MC PMU resource. +- enable-bit-index : The bit indicates if the according MC is enabled. + +Example: + csw: csw at 7e200000 { + compatible = "apm,xgene-csw", "syscon"; + reg = <0x0 0x7e200000 0x0 0x1000>; + }; + + mcba: mcba at 7e700000 { + compatible = "apm,xgene-mcb", "syscon"; + reg = <0x0 0x7e700000 0x0 0x1000>; + }; + + mcbb: mcbb at 7e720000 { + compatible = "apm,xgene-mcb", "syscon"; + reg = <0x0 0x7e720000 0x0 0x1000>; + }; + + pmu: pmu at 78810000 { + compatible = "apm,xgene-pmu-v2"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + regmap-csw = <&csw>; + regmap-mcba = <&mcba>; + regmap-mcbb = <&mcbb>; + reg = <0x0 0x78810000 0x0 0x1000>; + interrupts = <0x0 0x22 0x4>; + + pmul3c at 7e610000 { + compatible = "apm,xgene-pmu-l3c"; + reg = <0x0 0x7e610000 0x0 0x1000>; + }; + + pmuiob at 7e940000 { + compatible = "apm,xgene-pmu-iob"; + reg = <0x0 0x7e940000 0x0 0x1000>; + }; + + pmucmcb at 7e710000 { + compatible = "apm,xgene-pmu-mcb"; + reg = <0x0 0x7e710000 0x0 0x1000>; + enable-bit-index = <0>; + }; + + pmucmcb at 7e730000 { + compatible = "apm,xgene-pmu-mcb"; + reg = <0x0 0x7e730000 0x0 0x1000>; + enable-bit-index = <1>; + }; + + pmucmc at 7e810000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e810000 0x0 0x1000>; + enable-bit-index = <0>; + }; + + pmucmc at 7e850000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e850000 0x0 0x1000>; + enable-bit-index = <1>; + }; + + pmucmc at 7e890000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e890000 0x0 0x1000>; + enable-bit-index = <2>; + }; + + pmucmc at 7e8d0000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e8d0000 0x0 0x1000>; + enable-bit-index = <3>; + }; + }; -- 1.9.1
next prev parent reply other threads:[~2016-06-22 18:10 UTC|newest] Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-06-22 18:06 [PATCH v4 0/4] perf: Add APM X-Gene SoC Performance Monitoring Unit driver Tai Nguyen 2016-06-22 18:06 ` Tai Nguyen 2016-06-22 18:06 ` Tai Nguyen 2016-06-22 18:06 ` [PATCH v4 1/4] MAINTAINERS: Add entry for APM X-Gene SoC PMU driver Tai Nguyen 2016-06-22 18:06 ` Tai Nguyen 2016-06-22 18:06 ` Tai Nguyen [this message] 2016-06-22 18:06 ` [PATCH v4 2/4] Documentation: Add documentation for APM X-Gene SoC PMU DTS binding Tai Nguyen 2016-06-22 18:06 ` [PATCH v4 3/4] perf: xgene: Add APM X-Gene SoC Performance Monitoring Unit driver Tai Nguyen 2016-06-22 18:06 ` Tai Nguyen 2016-06-23 14:32 ` Mark Rutland 2016-06-23 14:32 ` Mark Rutland 2016-06-25 17:54 ` Tai Tri Nguyen 2016-06-25 17:54 ` Tai Tri Nguyen 2016-06-27 16:00 ` Mark Rutland 2016-06-27 16:00 ` Mark Rutland 2016-06-27 16:00 ` Mark Rutland 2016-06-27 17:54 ` Tai Tri Nguyen 2016-06-27 17:54 ` Tai Tri Nguyen 2016-06-28 11:13 ` Mark Rutland 2016-06-28 11:13 ` Mark Rutland 2016-06-28 11:13 ` Mark Rutland 2016-06-28 13:21 ` Marc Zyngier 2016-06-28 13:21 ` Marc Zyngier 2016-06-28 13:21 ` Marc Zyngier 2016-06-28 14:14 ` Mark Rutland 2016-06-28 14:14 ` Mark Rutland 2016-06-28 16:39 ` Tai Tri Nguyen 2016-06-28 16:39 ` Tai Tri Nguyen 2016-06-28 16:39 ` Tai Tri Nguyen 2016-06-28 16:59 ` Mark Rutland 2016-06-28 16:59 ` Mark Rutland 2016-06-28 16:59 ` Mark Rutland 2016-06-28 18:05 ` Tai Tri Nguyen 2016-06-28 18:05 ` Tai Tri Nguyen 2016-06-28 18:05 ` Tai Tri Nguyen 2016-06-22 18:06 ` [PATCH v4 4/4] arm64: dts: apm: Add APM X-Gene SoC PMU DTS entries Tai Nguyen 2016-06-22 18:06 ` Tai Nguyen
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