From: Dong Aisheng <aisheng.dong@nxp.com> To: <linux-clk@vger.kernel.org> Cc: <linux-kernel@vger.kernel.org>, <sboyd@codeaurora.org>, <mturquette@baylibre.com>, <shawnguo@kernel.org>, <linux-arm-kernel@lists.infradead.org>, <aisheng.dong@nxp.com>, <anson.huang@nxp.com> Subject: [PATCH V3 8/8] clk: imx7d: only enable minimum required clocks Date: Thu, 30 Jun 2016 17:31:18 +0800 [thread overview] Message-ID: <1467279078-2330-9-git-send-email-aisheng.dong@nxp.com> (raw) In-Reply-To: <1467279078-2330-1-git-send-email-aisheng.dong@nxp.com> Formerly clk core does not support imx7d clock type well that all its clock operations requires the parent clock on. Therefore we enabled all clocks by default in clock driver initialization for other module clocks operate well. After patch 'clk: imx7d: using api with flag CLK_OPS_PARENT_ENABLE', clk core can handle such clock type well, so we don't have to enable them all by default anymore. Instead, we only enable a minimum required set of clocks. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> --- drivers/clk/imx/clk-imx7d.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c index bb5affae0850..7b46ed0677a5 100644 --- a/drivers/clk/imx/clk-imx7d.c +++ b/drivers/clk/imx/clk-imx7d.c @@ -361,6 +361,14 @@ static const char *pll_enet_bypass_sel[] = { "pll_enet_main", "pll_enet_main_src static const char *pll_audio_bypass_sel[] = { "pll_audio_main", "pll_audio_main_src", }; static const char *pll_video_bypass_sel[] = { "pll_video_main", "pll_video_main_src", }; +static int const clks_init_on[] __initconst = { + IMX7D_ARM_A7_ROOT_CLK, IMX7D_MAIN_AXI_ROOT_CLK, + IMX7D_PLL_SYS_MAIN_480M_CLK, IMX7D_NAND_USDHC_BUS_ROOT_CLK, + IMX7D_DRAM_PHYM_ROOT_CLK, IMX7D_DRAM_ROOT_CLK, + IMX7D_DRAM_PHYM_ALT_ROOT_CLK, IMX7D_DRAM_ALT_ROOT_CLK, + IMX7D_AHB_CHANNEL_ROOT_CLK, +}; + static struct clk_onecell_data clk_data; static struct clk ** const uart_clks[] __initconst = { @@ -846,14 +854,8 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) clk_data.clk_num = ARRAY_SIZE(clks); of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); - /* TO BE FIXED LATER - * Enable all clock to bring up imx7, otherwise system will be halt and block - * the other part upstream Because imx7d clock design changed, clock framework - * need do a little modify. - * Dong Aisheng is working on this. After that, this part need be changed. - */ - for (i = 0; i < IMX7D_CLK_END; i++) - clk_prepare_enable(clks[i]); + for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) + clk_prepare_enable(clks[clks_init_on[i]]); /* use old gpt clk setting, gpt1 root clk must be twice as gpt counter freq */ clk_set_parent(clks[IMX7D_GPT1_ROOT_SRC], clks[IMX7D_OSC_24M_CLK]); -- 1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: aisheng.dong@nxp.com (Dong Aisheng) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH V3 8/8] clk: imx7d: only enable minimum required clocks Date: Thu, 30 Jun 2016 17:31:18 +0800 [thread overview] Message-ID: <1467279078-2330-9-git-send-email-aisheng.dong@nxp.com> (raw) In-Reply-To: <1467279078-2330-1-git-send-email-aisheng.dong@nxp.com> Formerly clk core does not support imx7d clock type well that all its clock operations requires the parent clock on. Therefore we enabled all clocks by default in clock driver initialization for other module clocks operate well. After patch 'clk: imx7d: using api with flag CLK_OPS_PARENT_ENABLE', clk core can handle such clock type well, so we don't have to enable them all by default anymore. Instead, we only enable a minimum required set of clocks. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> --- drivers/clk/imx/clk-imx7d.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c index bb5affae0850..7b46ed0677a5 100644 --- a/drivers/clk/imx/clk-imx7d.c +++ b/drivers/clk/imx/clk-imx7d.c @@ -361,6 +361,14 @@ static const char *pll_enet_bypass_sel[] = { "pll_enet_main", "pll_enet_main_src static const char *pll_audio_bypass_sel[] = { "pll_audio_main", "pll_audio_main_src", }; static const char *pll_video_bypass_sel[] = { "pll_video_main", "pll_video_main_src", }; +static int const clks_init_on[] __initconst = { + IMX7D_ARM_A7_ROOT_CLK, IMX7D_MAIN_AXI_ROOT_CLK, + IMX7D_PLL_SYS_MAIN_480M_CLK, IMX7D_NAND_USDHC_BUS_ROOT_CLK, + IMX7D_DRAM_PHYM_ROOT_CLK, IMX7D_DRAM_ROOT_CLK, + IMX7D_DRAM_PHYM_ALT_ROOT_CLK, IMX7D_DRAM_ALT_ROOT_CLK, + IMX7D_AHB_CHANNEL_ROOT_CLK, +}; + static struct clk_onecell_data clk_data; static struct clk ** const uart_clks[] __initconst = { @@ -846,14 +854,8 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) clk_data.clk_num = ARRAY_SIZE(clks); of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); - /* TO BE FIXED LATER - * Enable all clock to bring up imx7, otherwise system will be halt and block - * the other part upstream Because imx7d clock design changed, clock framework - * need do a little modify. - * Dong Aisheng is working on this. After that, this part need be changed. - */ - for (i = 0; i < IMX7D_CLK_END; i++) - clk_prepare_enable(clks[i]); + for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) + clk_prepare_enable(clks[clks_init_on[i]]); /* use old gpt clk setting, gpt1 root clk must be twice as gpt counter freq */ clk_set_parent(clks[IMX7D_GPT1_ROOT_SRC], clks[IMX7D_OSC_24M_CLK]); -- 1.9.1
next prev parent reply other threads:[~2016-06-30 9:38 UTC|newest] Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-06-30 9:31 [PATCH V3 0/8] clk: core: support clocks which requires parents enable Dong Aisheng 2016-06-30 9:31 ` Dong Aisheng 2016-06-30 9:31 ` [PATCH V3 1/8] clk: introduce clk_core_enable_lock and clk_core_disable_lock functions Dong Aisheng 2016-06-30 9:31 ` Dong Aisheng 2016-07-02 0:44 ` Stephen Boyd 2016-07-02 0:44 ` Stephen Boyd 2016-06-30 9:31 ` [PATCH V3 2/8] clk: move clk_disable_unused after clk_core_disable_unprepare function Dong Aisheng 2016-06-30 9:31 ` Dong Aisheng 2016-07-02 0:44 ` Stephen Boyd 2016-07-02 0:44 ` Stephen Boyd 2016-06-30 9:31 ` [PATCH V3 3/8] clk: core: support clocks which requires parents enable (part 1) Dong Aisheng 2016-06-30 9:31 ` Dong Aisheng 2016-07-02 0:44 ` Stephen Boyd 2016-07-02 0:44 ` Stephen Boyd 2016-06-30 9:31 ` [PATCH V3 4/8] clk: core: support clocks which requires parents enable (part 2) Dong Aisheng 2016-06-30 9:31 ` Dong Aisheng 2016-07-02 0:45 ` Stephen Boyd 2016-07-02 0:45 ` Stephen Boyd 2016-06-30 9:31 ` [PATCH V3 5/8] clk: imx: re-order and concentrate the same type of clk api Dong Aisheng 2016-06-30 9:31 ` Dong Aisheng 2016-07-02 0:45 ` Stephen Boyd 2016-07-02 0:45 ` Stephen Boyd 2016-06-30 9:31 ` [PATCH V3 6/8] clk: imx: add clk api for supporting CLK_OPS_PARENT_ENABLE clocks Dong Aisheng 2016-06-30 9:31 ` Dong Aisheng 2016-07-02 0:45 ` Stephen Boyd 2016-07-02 0:45 ` Stephen Boyd 2016-06-30 9:31 ` [PATCH V3 7/8] clk: imx7d: using api with flag CLK_OPS_PARENT_ENABLE Dong Aisheng 2016-06-30 9:31 ` Dong Aisheng 2016-07-02 0:45 ` Stephen Boyd 2016-07-02 0:45 ` Stephen Boyd 2016-06-30 9:31 ` Dong Aisheng [this message] 2016-06-30 9:31 ` [PATCH V3 8/8] clk: imx7d: only enable minimum required clocks Dong Aisheng 2016-07-02 0:45 ` Stephen Boyd 2016-07-02 0:45 ` Stephen Boyd
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