From: Philipp Zabel <p.zabel@pengutronix.de>
To: Ying Liu <gnuiyl@gmail.com>
Cc: dri-devel@lists.freedesktop.org
Subject: [RFC 2/2] gpu: ipu-v3: reset DMFC memory when disabling
Date: Mon, 29 Aug 2016 12:33:51 +0200 [thread overview]
Message-ID: <1472466831-21348-2-git-send-email-p.zabel@pengutronix.de> (raw)
In-Reply-To: <1472466831-21348-1-git-send-email-p.zabel@pengutronix.de>
Reset the write FIFO memories after disabling the DMFC
to make sure no stale data is kept around.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
drivers/gpu/ipu-v3/ipu-dmfc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/ipu-v3/ipu-dmfc.c b/drivers/gpu/ipu-v3/ipu-dmfc.c
index a40f211..e1e5506 100644
--- a/drivers/gpu/ipu-v3/ipu-dmfc.c
+++ b/drivers/gpu/ipu-v3/ipu-dmfc.c
@@ -131,8 +131,10 @@ void ipu_dmfc_disable_channel(struct dmfc_channel *dmfc)
priv->use_count--;
- if (!priv->use_count)
+ if (!priv->use_count) {
ipu_module_disable(priv->ipu, IPU_CONF_DMFC_EN);
+ ipu_memory_reset(priv->ipu, IPU_RST_MEM_DMFC_WR);
+ }
if (priv->use_count < 0)
priv->use_count = 0;
--
2.8.1
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next prev parent reply other threads:[~2016-08-29 10:34 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-29 10:33 [RFC 1/2] gpu: ipu-v3: export memory reset function Philipp Zabel
2016-08-29 10:33 ` Philipp Zabel [this message]
2016-08-30 2:33 ` [RFC 2/2] gpu: ipu-v3: reset DMFC memory when disabling Ying Liu
2016-08-30 2:57 ` [RFC 1/2] gpu: ipu-v3: export memory reset function Ying Liu
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