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From: Chris Zhong <zyw@rock-chips.com>
To: heiko@sntech.de, dianders@chromium.org
Cc: linux-rockchip@lists.infradead.org, zhengxing@rock-chips.com,
	ykk@rock-chips.com, Chris Zhong <zyw@rock-chips.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [v2 PATCH 3/3] clk: rockchip: use the dclk_vop_frac clock ids
Date: Thu,  1 Sep 2016 20:26:25 -0700	[thread overview]
Message-ID: <1472786785-2393-3-git-send-email-zyw@rock-chips.com> (raw)
In-Reply-To: <1472786785-2393-1-git-send-email-zyw@rock-chips.com>

From: Yakir Yang <ykk@rock-chips.com>

Export the dclk_vop_frac out, so we can set the dclk_vop as the
child of dclk_vop_frac, and then we can start to take use of
the fractional dividers.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---

 drivers/clk/rockchip/clk-rk3399.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index 59417c5..2c7cba7 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -1168,7 +1168,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 			RK3399_CLKSEL_CON(49), 8, 2, MFLAGS, 0, 8, DFLAGS,
 			RK3399_CLKGATE_CON(10), 12, GFLAGS),
 
-	COMPOSITE_FRACMUX_NOGATE(0, "dclk_vop0_frac", "dclk_vop0_div", 0,
+	COMPOSITE_FRACMUX_NOGATE(DCLK_VOP0_FRAC, "dclk_vop0_frac", "dclk_vop0_div", 0,
 			RK3399_CLKSEL_CON(106), 0,
 			&rk3399_dclk_vop0_fracmux),
 
@@ -1198,7 +1198,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 			RK3399_CLKSEL_CON(50), 8, 2, MFLAGS, 0, 8, DFLAGS,
 			RK3399_CLKGATE_CON(10), 13, GFLAGS),
 
-	COMPOSITE_FRACMUX_NOGATE(0, "dclk_vop1_frac", "dclk_vop1_div", 0,
+	COMPOSITE_FRACMUX_NOGATE(DCLK_VOP1_FRAC, "dclk_vop1_frac", "dclk_vop1_div", 0,
 			RK3399_CLKSEL_CON(107), 0,
 			&rk3399_dclk_vop1_fracmux),
 
-- 
1.9.1

WARNING: multiple messages have this Message-ID (diff)
From: zyw@rock-chips.com (Chris Zhong)
To: linux-arm-kernel@lists.infradead.org
Subject: [v2 PATCH 3/3] clk: rockchip: use the dclk_vop_frac clock ids
Date: Thu,  1 Sep 2016 20:26:25 -0700	[thread overview]
Message-ID: <1472786785-2393-3-git-send-email-zyw@rock-chips.com> (raw)
In-Reply-To: <1472786785-2393-1-git-send-email-zyw@rock-chips.com>

From: Yakir Yang <ykk@rock-chips.com>

Export the dclk_vop_frac out, so we can set the dclk_vop as the
child of dclk_vop_frac, and then we can start to take use of
the fractional dividers.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---

 drivers/clk/rockchip/clk-rk3399.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index 59417c5..2c7cba7 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -1168,7 +1168,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 			RK3399_CLKSEL_CON(49), 8, 2, MFLAGS, 0, 8, DFLAGS,
 			RK3399_CLKGATE_CON(10), 12, GFLAGS),
 
-	COMPOSITE_FRACMUX_NOGATE(0, "dclk_vop0_frac", "dclk_vop0_div", 0,
+	COMPOSITE_FRACMUX_NOGATE(DCLK_VOP0_FRAC, "dclk_vop0_frac", "dclk_vop0_div", 0,
 			RK3399_CLKSEL_CON(106), 0,
 			&rk3399_dclk_vop0_fracmux),
 
@@ -1198,7 +1198,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 			RK3399_CLKSEL_CON(50), 8, 2, MFLAGS, 0, 8, DFLAGS,
 			RK3399_CLKGATE_CON(10), 13, GFLAGS),
 
-	COMPOSITE_FRACMUX_NOGATE(0, "dclk_vop1_frac", "dclk_vop1_div", 0,
+	COMPOSITE_FRACMUX_NOGATE(DCLK_VOP1_FRAC, "dclk_vop1_frac", "dclk_vop1_div", 0,
 			RK3399_CLKSEL_CON(107), 0,
 			&rk3399_dclk_vop1_fracmux),
 
-- 
1.9.1

  parent reply	other threads:[~2016-09-02  3:26 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-02  3:26 [v2 PATCH 1/3] clk: rockchip: Fractional dividers can't set parent rates Chris Zhong
2016-09-02  3:26 ` Chris Zhong
2016-09-02  3:26 ` [v2 PATCH 2/3] clk: rockchip: add dclk_vop_frac ids for vop Chris Zhong
2016-09-02 20:43   ` Heiko Stübner
2016-09-02 20:58     ` Chris Zhong
2016-09-02 20:58       ` Chris Zhong
2016-09-02 21:14       ` Heiko Stübner
2016-09-02 21:14         ` Heiko Stübner
2016-09-04 21:50   ` Heiko Stuebner
2016-09-04 21:50     ` Heiko Stuebner
2016-09-02  3:26 ` Chris Zhong [this message]
2016-09-02  3:26   ` [v2 PATCH 3/3] clk: rockchip: use the dclk_vop_frac clock ids Chris Zhong
2016-09-04 21:51   ` Heiko Stuebner
2016-09-04 21:51     ` Heiko Stuebner
2016-09-04 21:50 ` [v2 PATCH 1/3] clk: rockchip: Fractional dividers can't set parent rates Heiko Stuebner
2016-09-04 21:50   ` Heiko Stuebner

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