From: fu.wei@linaro.org To: rjw@rjwysocki.net, lenb@kernel.org, daniel.lezcano@linaro.org, tglx@linutronix.de, marc.zyngier@arm.com, mark.rutland@arm.com, lorenzo.pieralisi@arm.com, sudeep.holla@arm.com, hanjun.guo@linaro.org Cc: linux-arm-kernel@lists.infradead.org, linaro-acpi@lists.linaro.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, rruigrok@codeaurora.org, harba@codeaurora.org, cov@codeaurora.org, timur@codeaurora.org, graeme.gregory@linaro.org, al.stone@linaro.org, jcm@redhat.com, wei@redhat.com, arnd@arndb.de, catalin.marinas@arm.com, will.deacon@arm.com, Suravee.Suthikulpanit@amd.com, leo.duran@amd.com, wim@iguana.be, linux@roeck-us.net, linux-watchdog@vger.kernel.org, tn@semihalf.com, christoffer.dall@linaro.org, julien.grall@arm.com, Fu Wei <fu.wei@linaro.org> Subject: [PATCH v12 7/8] clocksource/drivers/arm_arch_timer: Add GTDT support for memory-mapped timer Date: Tue, 13 Sep 2016 18:39:03 +0800 [thread overview] Message-ID: <1473763144-5653-8-git-send-email-fu.wei@linaro.org> (raw) In-Reply-To: <1473763144-5653-1-git-send-email-fu.wei@linaro.org> From: Fu Wei <fu.wei@linaro.org> The patch add memory-mapped timer register support by using the information provided by the new GTDT driver of ACPI. Signed-off-by: Fu Wei <fu.wei@linaro.org> --- drivers/clocksource/arm_arch_timer.c | 127 ++++++++++++++++++++++++++++++++++- 1 file changed, 124 insertions(+), 3 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 0197ef9..d33802b 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -888,7 +888,128 @@ CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", arch_timer_mem_init); #ifdef CONFIG_ACPI_GTDT -/* Initialize per-processor generic timer */ +static struct gt_timer_data __init *arch_timer_mem_get_timer( + struct gt_block_data *gt_blocks) +{ + struct gt_block_data *gt_block = gt_blocks; + struct gt_timer_data *best_frame = NULL; + void __iomem *cntctlbase; + u32 cnttidr; + int i; + + /* + * According to ARMv8 Architecture Reference Manual(ARM), + * the size of CNTCTLBase frame of memory-mapped timer + * is SZ_4K(Offset 0x000 – 0xFFF). + */ + cntctlbase = ioremap(gt_block->cntctlbase_phy, SZ_4K); + if (!cntctlbase) { + pr_err("Failed to map mem timer control frame base address\n"); + return NULL; + } + cnttidr = readl_relaxed(cntctlbase + CNTTIDR); + + /* + * Try to find a virtual capable frame. Otherwise fall back to a + * physical capable frame. + */ + for (i = 0; i < gt_block->timer_count; i++) { + int n; + u32 cntacr; + + n = gt_block->timer[i].frame_nr; + + /* Try enabling everything, and see what sticks */ + cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT | + CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT; + writel_relaxed(cntacr, cntctlbase + CNTACR(n)); + cntacr = readl_relaxed(cntctlbase + CNTACR(n)); + + if ((cnttidr & CNTTIDR_VIRT(n)) && + !(~cntacr & (CNTACR_RWVT | CNTACR_RVCT))) { + best_frame = >_block->timer[i]; + arch_timer_mem_use_virtual = true; + break; + } + + if (~cntacr & (CNTACR_RWPT | CNTACR_RPCT)) + continue; + + best_frame = >_block->timer[i]; + } + iounmap(cntctlbase); + + return best_frame; +} + +static int __init arch_timer_mem_acpi_init(size_t timer_count) +{ + struct gt_block_data *gt_blocks; + struct gt_timer_data *gt_timer; + void __iomem *timer_cntbase; + int ret = -EINVAL; + int timer_irq; + + /* + * If we don't have any Platform Timer Structures, just return. + */ + if (!timer_count) + return 0; + + /* + * before really check all the Platform Timer Structures, + * we assume they are GT block, and allocate memory for them. + * We will free these memory once we finish the initialization. + */ + gt_blocks = kcalloc(timer_count, sizeof(*gt_blocks), GFP_KERNEL); + if (!gt_blocks) + return -ENOMEM; + + if (gtdt_arch_timer_mem_init(gt_blocks) > 0) { + gt_timer = arch_timer_mem_get_timer(gt_blocks); + if (!gt_timer) { + pr_err("Failed to get mem timer info.\n"); + goto error; + } + + if (arch_timer_mem_use_virtual) + timer_irq = gt_timer->virtual_irq; + else + timer_irq = gt_timer->irq; + if (!timer_irq) { + pr_err("Failed to get %s irq for mem timer.", + arch_timer_mem_use_virtual ? "virt" : "phys"); + goto error; + } + + /* + * According to ARMv8 Architecture Reference Manual(ARM), + * the size of CNTBaseN frames of memory-mapped timer + * is SZ_4K(Offset 0x000 – 0xFFF). + */ + timer_cntbase = ioremap(gt_timer->cntbase_phy, SZ_4K); + if (!timer_cntbase) { + pr_err("Failed to map mem timer base address.\n"); + goto error; + } + + ret = arch_timer_mem_register(timer_cntbase, timer_irq); + if (ret) { + iounmap(timer_cntbase); + pr_err("Failed to register mem timer.\n"); + goto error; + } + + arch_counter_base = timer_cntbase; + arch_timers_present |= ARCH_MEM_TIMER; + } + +error: + kfree(gt_blocks); + return ret; +} + +/* Initialize per-processor generic timer and memory-mapped timer(if present) */ static int __init arch_timer_acpi_init(struct acpi_table_header *table) { int timer_count; @@ -912,8 +1033,8 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) /* Get the frequency from CNTFRQ */ arch_timer_detect_rate(NULL, NULL); - if (timer_count < 0) - pr_err("Failed to get platform timer info.\n"); + if (timer_count < 0 || arch_timer_mem_acpi_init((size_t)timer_count)) + pr_err("Failed to initialize memory-mapped timer.\n"); return arch_timer_init(); } -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: fu.wei@linaro.org (fu.wei at linaro.org) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v12 7/8] clocksource/drivers/arm_arch_timer: Add GTDT support for memory-mapped timer Date: Tue, 13 Sep 2016 18:39:03 +0800 [thread overview] Message-ID: <1473763144-5653-8-git-send-email-fu.wei@linaro.org> (raw) In-Reply-To: <1473763144-5653-1-git-send-email-fu.wei@linaro.org> From: Fu Wei <fu.wei@linaro.org> The patch add memory-mapped timer register support by using the information provided by the new GTDT driver of ACPI. Signed-off-by: Fu Wei <fu.wei@linaro.org> --- drivers/clocksource/arm_arch_timer.c | 127 ++++++++++++++++++++++++++++++++++- 1 file changed, 124 insertions(+), 3 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 0197ef9..d33802b 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -888,7 +888,128 @@ CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", arch_timer_mem_init); #ifdef CONFIG_ACPI_GTDT -/* Initialize per-processor generic timer */ +static struct gt_timer_data __init *arch_timer_mem_get_timer( + struct gt_block_data *gt_blocks) +{ + struct gt_block_data *gt_block = gt_blocks; + struct gt_timer_data *best_frame = NULL; + void __iomem *cntctlbase; + u32 cnttidr; + int i; + + /* + * According to ARMv8 Architecture Reference Manual(ARM), + * the size of CNTCTLBase frame of memory-mapped timer + * is SZ_4K(Offset 0x000 ? 0xFFF). + */ + cntctlbase = ioremap(gt_block->cntctlbase_phy, SZ_4K); + if (!cntctlbase) { + pr_err("Failed to map mem timer control frame base address\n"); + return NULL; + } + cnttidr = readl_relaxed(cntctlbase + CNTTIDR); + + /* + * Try to find a virtual capable frame. Otherwise fall back to a + * physical capable frame. + */ + for (i = 0; i < gt_block->timer_count; i++) { + int n; + u32 cntacr; + + n = gt_block->timer[i].frame_nr; + + /* Try enabling everything, and see what sticks */ + cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT | + CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT; + writel_relaxed(cntacr, cntctlbase + CNTACR(n)); + cntacr = readl_relaxed(cntctlbase + CNTACR(n)); + + if ((cnttidr & CNTTIDR_VIRT(n)) && + !(~cntacr & (CNTACR_RWVT | CNTACR_RVCT))) { + best_frame = >_block->timer[i]; + arch_timer_mem_use_virtual = true; + break; + } + + if (~cntacr & (CNTACR_RWPT | CNTACR_RPCT)) + continue; + + best_frame = >_block->timer[i]; + } + iounmap(cntctlbase); + + return best_frame; +} + +static int __init arch_timer_mem_acpi_init(size_t timer_count) +{ + struct gt_block_data *gt_blocks; + struct gt_timer_data *gt_timer; + void __iomem *timer_cntbase; + int ret = -EINVAL; + int timer_irq; + + /* + * If we don't have any Platform Timer Structures, just return. + */ + if (!timer_count) + return 0; + + /* + * before really check all the Platform Timer Structures, + * we assume they are GT block, and allocate memory for them. + * We will free these memory once we finish the initialization. + */ + gt_blocks = kcalloc(timer_count, sizeof(*gt_blocks), GFP_KERNEL); + if (!gt_blocks) + return -ENOMEM; + + if (gtdt_arch_timer_mem_init(gt_blocks) > 0) { + gt_timer = arch_timer_mem_get_timer(gt_blocks); + if (!gt_timer) { + pr_err("Failed to get mem timer info.\n"); + goto error; + } + + if (arch_timer_mem_use_virtual) + timer_irq = gt_timer->virtual_irq; + else + timer_irq = gt_timer->irq; + if (!timer_irq) { + pr_err("Failed to get %s irq for mem timer.", + arch_timer_mem_use_virtual ? "virt" : "phys"); + goto error; + } + + /* + * According to ARMv8 Architecture Reference Manual(ARM), + * the size of CNTBaseN frames of memory-mapped timer + * is SZ_4K(Offset 0x000 ? 0xFFF). + */ + timer_cntbase = ioremap(gt_timer->cntbase_phy, SZ_4K); + if (!timer_cntbase) { + pr_err("Failed to map mem timer base address.\n"); + goto error; + } + + ret = arch_timer_mem_register(timer_cntbase, timer_irq); + if (ret) { + iounmap(timer_cntbase); + pr_err("Failed to register mem timer.\n"); + goto error; + } + + arch_counter_base = timer_cntbase; + arch_timers_present |= ARCH_MEM_TIMER; + } + +error: + kfree(gt_blocks); + return ret; +} + +/* Initialize per-processor generic timer and memory-mapped timer(if present) */ static int __init arch_timer_acpi_init(struct acpi_table_header *table) { int timer_count; @@ -912,8 +1033,8 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) /* Get the frequency from CNTFRQ */ arch_timer_detect_rate(NULL, NULL); - if (timer_count < 0) - pr_err("Failed to get platform timer info.\n"); + if (timer_count < 0 || arch_timer_mem_acpi_init((size_t)timer_count)) + pr_err("Failed to initialize memory-mapped timer.\n"); return arch_timer_init(); } -- 2.7.4
next prev parent reply other threads:[~2016-09-13 10:39 UTC|newest] Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-09-13 10:38 [PATCH v12 0/8] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer fu.wei-QSEj5FYQhm4dnm+yROfE0A 2016-09-13 10:38 ` fu.wei at linaro.org 2016-09-13 10:38 ` fu.wei [not found] ` <1473763144-5653-1-git-send-email-fu.wei-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> 2016-09-13 10:38 ` [PATCH v12 1/8] clocksource/drivers/arm_arch_timer: Move enums and defines to header file fu.wei-QSEj5FYQhm4dnm+yROfE0A 2016-09-13 10:38 ` fu.wei at linaro.org 2016-09-13 10:38 ` fu.wei 2016-09-13 10:38 ` [PATCH v12 2/8] clocksource/drivers/arm_arch_timer: Add a new enum for spi type fu.wei 2016-09-13 10:38 ` fu.wei at linaro.org 2016-09-13 10:38 ` [PATCH v12 3/8] clocksource/drivers/arm_arch_timer: Improve printk relevant code fu.wei 2016-09-13 10:38 ` fu.wei at linaro.org 2016-09-13 10:39 ` [PATCH v12 4/8] acpi/arm64: Add GTDT table parse driver fu.wei 2016-09-13 10:39 ` fu.wei at linaro.org 2016-09-13 10:39 ` [PATCH v12 5/8] clocksource/drivers/arm_arch_timer: Simplify ACPI support code fu.wei 2016-09-13 10:39 ` fu.wei at linaro.org 2016-09-13 10:39 ` [PATCH v12 6/8] acpi/arm64: Add memory-mapped timer support in GTDT driver fu.wei 2016-09-13 10:39 ` fu.wei at linaro.org 2016-09-13 10:39 ` fu.wei [this message] 2016-09-13 10:39 ` [PATCH v12 7/8] clocksource/drivers/arm_arch_timer: Add GTDT support for memory-mapped timer fu.wei at linaro.org 2016-09-13 11:00 ` Marc Zyngier 2016-09-13 11:00 ` Marc Zyngier [not found] ` <57D7DC59.6000705-5wv7dgnIgG8@public.gmane.org> 2016-09-13 11:31 ` Fu Wei 2016-09-13 11:31 ` Fu Wei 2016-09-13 11:31 ` Fu Wei 2016-09-13 10:39 ` [PATCH v12 8/8] acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver fu.wei 2016-09-13 10:39 ` fu.wei at linaro.org 2016-09-29 8:33 ` [PATCH v12 0/8] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer wangxiongfeng (C) 2016-09-29 8:33 ` wangxiongfeng (C) 2016-09-29 8:33 ` wangxiongfeng (C) 2016-09-29 16:53 ` Fu Wei 2016-09-29 16:53 ` Fu Wei 2016-09-29 16:53 ` Fu Wei
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