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From: Jerome Brunet <jbrunet@baylibre.com>
To: Carlo Caione <carlo@caione.org>,
	Kevin Hilman <khilman@baylibre.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Rob Herring <robh+dt@kernel.org>
Cc: Jerome Brunet <jbrunet@baylibre.com>,
	linux-amlogic@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	Linus Walleij <linus.walleij@linaro.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Russell King <linux@armlinux.org.uk>
Subject: [PATCH v2 2/9] dt-bindings: interrupt-controller: add DT binding for meson GPIO interrupt controller
Date: Wed, 19 Oct 2016 17:21:13 +0200	[thread overview]
Message-ID: <1476890480-8884-3-git-send-email-jbrunet@baylibre.com> (raw)
In-Reply-To: <1476890480-8884-1-git-send-email-jbrunet@baylibre.com>


This commit adds the device tree bindings description for Amlogic's GPIO
interrupt controller available on the meson8, meson8b and gxbb SoC families

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
Rob, I did not include the Ack you gave for the RFC as bindings have slightly
changed. Only the interrupt property has be removed following a discussion I
had with Marc

 .../amlogic,meson-gpio-intc.txt                    | 31 ++++++++++++++++++++++
 1 file changed, 31 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt

diff --git a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt
new file mode 100644
index 000000000000..2464d9a0865d
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt
@@ -0,0 +1,31 @@
+Amlogic meson GPIO interrupt controller
+
+Meson SoCs contains an interrupt controller which is able watch the SoC pads
+and generate an interrupt on edges or level. The controller is essentially a
+256 pads to 8 GIC interrupt multiplexer, with a filter block to select edge
+or level and polarity. We don’t expose all 256 mux inputs because the
+documentation shows that upper part is not mapped to any pad. The actual number
+of interrupt exposed depends on the SoC.
+
+Required properties:
+
+- compatible : should be either
+   "amlogic,meson8-gpio-intc” for meson8 SoCs (AML7826MX) or
+   “amlogic,meson8b-gpio-intc” for meson8b SoCs (S805) or
+   “amlogic,meson-gxbb-gpio-intc” for GXBB SoCs (S905)
+- interrupt-parent : a phandle to the GIC the interrupts are routed to.
+   Usually this is provided at the root level of the device tree as it is
+   common to most of the SoC
+- reg : Specifies base physical address and size of the registers.
+- interrupt-controller : Identifies the node as an interrupt controller.
+- #interrupt-cells : Specifies the number of cells needed to encode an
+   interrupt source. The value must be 2.
+
+Example:
+
+gpio_interrupt: interrupt-controller@9880 {
+	compatible = "amlogic,meson-gxbb-gpio-intc";
+	reg = <0x0 0x9880 0x0 0x10>;
+	interrupt-controller;
+	#interrupt-cells = <2>;
+};
-- 
2.7.4

WARNING: multiple messages have this Message-ID (diff)
From: jbrunet@baylibre.com (Jerome Brunet)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/9] dt-bindings: interrupt-controller: add DT binding for meson GPIO interrupt controller
Date: Wed, 19 Oct 2016 17:21:13 +0200	[thread overview]
Message-ID: <1476890480-8884-3-git-send-email-jbrunet@baylibre.com> (raw)
In-Reply-To: <1476890480-8884-1-git-send-email-jbrunet@baylibre.com>


This commit adds the device tree bindings description for Amlogic's GPIO
interrupt controller available on the meson8, meson8b and gxbb SoC families

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
Rob, I did not include the Ack you gave for the RFC as bindings have slightly
changed. Only the interrupt property has be removed following a discussion I
had with Marc

 .../amlogic,meson-gpio-intc.txt                    | 31 ++++++++++++++++++++++
 1 file changed, 31 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt

diff --git a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt
new file mode 100644
index 000000000000..2464d9a0865d
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt
@@ -0,0 +1,31 @@
+Amlogic meson GPIO interrupt controller
+
+Meson SoCs contains an interrupt controller which is able watch the SoC pads
+and generate an interrupt on edges or level. The controller is essentially a
+256 pads to 8 GIC interrupt multiplexer, with a filter block to select edge
+or level and polarity. We don?t expose all 256 mux inputs because the
+documentation shows that upper part is not mapped to any pad. The actual number
+of interrupt exposed depends on the SoC.
+
+Required properties:
+
+- compatible : should be either
+   "amlogic,meson8-gpio-intc? for meson8 SoCs (AML7826MX) or
+   ?amlogic,meson8b-gpio-intc? for meson8b SoCs (S805) or
+   ?amlogic,meson-gxbb-gpio-intc? for GXBB SoCs (S905)
+- interrupt-parent : a phandle to the GIC the interrupts are routed to.
+   Usually this is provided at the root level of the device tree as it is
+   common to most of the SoC
+- reg : Specifies base physical address and size of the registers.
+- interrupt-controller : Identifies the node as an interrupt controller.
+- #interrupt-cells : Specifies the number of cells needed to encode an
+   interrupt source. The value must be 2.
+
+Example:
+
+gpio_interrupt: interrupt-controller at 9880 {
+	compatible = "amlogic,meson-gxbb-gpio-intc";
+	reg = <0x0 0x9880 0x0 0x10>;
+	interrupt-controller;
+	#interrupt-cells = <2>;
+};
-- 
2.7.4

WARNING: multiple messages have this Message-ID (diff)
From: jbrunet@baylibre.com (Jerome Brunet)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH v2 2/9] dt-bindings: interrupt-controller: add DT binding for meson GPIO interrupt controller
Date: Wed, 19 Oct 2016 17:21:13 +0200	[thread overview]
Message-ID: <1476890480-8884-3-git-send-email-jbrunet@baylibre.com> (raw)
In-Reply-To: <1476890480-8884-1-git-send-email-jbrunet@baylibre.com>


This commit adds the device tree bindings description for Amlogic's GPIO
interrupt controller available on the meson8, meson8b and gxbb SoC families

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
Rob, I did not include the Ack you gave for the RFC as bindings have slightly
changed. Only the interrupt property has be removed following a discussion I
had with Marc

 .../amlogic,meson-gpio-intc.txt                    | 31 ++++++++++++++++++++++
 1 file changed, 31 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt

diff --git a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt
new file mode 100644
index 000000000000..2464d9a0865d
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt
@@ -0,0 +1,31 @@
+Amlogic meson GPIO interrupt controller
+
+Meson SoCs contains an interrupt controller which is able watch the SoC pads
+and generate an interrupt on edges or level. The controller is essentially a
+256 pads to 8 GIC interrupt multiplexer, with a filter block to select edge
+or level and polarity. We don?t expose all 256 mux inputs because the
+documentation shows that upper part is not mapped to any pad. The actual number
+of interrupt exposed depends on the SoC.
+
+Required properties:
+
+- compatible : should be either
+   "amlogic,meson8-gpio-intc? for meson8 SoCs (AML7826MX) or
+   ?amlogic,meson8b-gpio-intc? for meson8b SoCs (S805) or
+   ?amlogic,meson-gxbb-gpio-intc? for GXBB SoCs (S905)
+- interrupt-parent : a phandle to the GIC the interrupts are routed to.
+   Usually this is provided at the root level of the device tree as it is
+   common to most of the SoC
+- reg : Specifies base physical address and size of the registers.
+- interrupt-controller : Identifies the node as an interrupt controller.
+- #interrupt-cells : Specifies the number of cells needed to encode an
+   interrupt source. The value must be 2.
+
+Example:
+
+gpio_interrupt: interrupt-controller at 9880 {
+	compatible = "amlogic,meson-gxbb-gpio-intc";
+	reg = <0x0 0x9880 0x0 0x10>;
+	interrupt-controller;
+	#interrupt-cells = <2>;
+};
-- 
2.7.4

  parent reply	other threads:[~2016-10-19 15:21 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-19 15:21 [PATCH v2 0/9] irqchip: meson: add support for the gpio interrupt controller Jerome Brunet
2016-10-19 15:21 ` Jerome Brunet
2016-10-19 15:21 ` Jerome Brunet
2016-10-19 15:21 ` Jerome Brunet
2016-10-19 15:21 ` [PATCH v2 1/9] irqchip: meson: add support for " Jerome Brunet
2016-10-19 15:21   ` Jerome Brunet
2016-10-19 15:21   ` Jerome Brunet
2016-10-19 15:21   ` Jerome Brunet
     [not found]   ` <1476890480-8884-2-git-send-email-jbrunet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
2016-10-20 16:33     ` Marc Zyngier
2016-10-20 16:33       ` Marc Zyngier
2016-10-20 16:33       ` Marc Zyngier
2016-10-20 16:33       ` Marc Zyngier
2016-10-21  8:49       ` Jerome Brunet
2016-10-21  8:49         ` Jerome Brunet
2016-10-21  8:49         ` Jerome Brunet
     [not found]         ` <1477039751.15560.88.camel-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
2016-10-21 10:10           ` Mark Rutland
2016-10-21 10:10             ` Mark Rutland
2016-10-21 10:10             ` Mark Rutland
2016-10-21 10:10             ` Mark Rutland
2016-10-21 10:17             ` Jerome Brunet
2016-10-21 10:17               ` Jerome Brunet
2016-10-21 10:17               ` Jerome Brunet
2016-10-21 10:17               ` Jerome Brunet
2016-10-21 10:28         ` Marc Zyngier
2016-10-21 10:28           ` Marc Zyngier
2016-10-21 10:28           ` Marc Zyngier
2016-10-19 15:21 ` Jerome Brunet [this message]
2016-10-19 15:21   ` [PATCH v2 2/9] dt-bindings: interrupt-controller: add DT binding for meson GPIO " Jerome Brunet
2016-10-19 15:21   ` Jerome Brunet
2016-10-26 21:42   ` Rob Herring
2016-10-26 21:42     ` Rob Herring
2016-10-26 21:42     ` Rob Herring
2016-10-27  9:32     ` Mark Rutland
2016-10-27  9:32       ` Mark Rutland
2016-10-27  9:32       ` Mark Rutland
2016-10-27  9:32       ` Mark Rutland
2016-10-27  9:40       ` Jerome Brunet
2016-10-27  9:40         ` Jerome Brunet
2016-10-27  9:40         ` Jerome Brunet
2016-10-27  9:40         ` Jerome Brunet
2016-10-19 15:21 ` [PATCH v2 3/9] pinctrl: meson: update pinctrl data with gpio irq data Jerome Brunet
2016-10-19 15:21   ` Jerome Brunet
2016-10-19 15:21   ` Jerome Brunet
2016-10-19 15:21 ` [PATCH v2 4/9] pinctrl: meson: allow gpio to request irq Jerome Brunet
2016-10-19 15:21   ` Jerome Brunet
2016-10-19 15:21   ` Jerome Brunet
     [not found]   ` <1476890480-8884-5-git-send-email-jbrunet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
2016-10-19 15:37     ` [RESEND PATCH " Jerome Brunet
2016-10-19 15:37       ` Jerome Brunet
2016-10-19 15:37       ` Jerome Brunet
2016-10-19 15:37       ` Jerome Brunet
2016-10-19 15:21 ` [PATCH v2 7/9] ARM: meson: enable MESON_IRQ_GPIO in Kconfig for meson8 Jerome Brunet
2016-10-19 15:21   ` Jerome Brunet
2016-10-19 15:21   ` Jerome Brunet
     [not found] ` <1476890480-8884-1-git-send-email-jbrunet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
2016-10-19 15:21   ` [PATCH v2 5/9] dt-bindings: pinctrl: meson: update gpio dt-bindings Jerome Brunet
2016-10-19 15:21     ` Jerome Brunet
2016-10-19 15:21     ` Jerome Brunet
2016-10-19 15:21     ` Jerome Brunet
2016-10-19 15:21   ` [PATCH v2 6/9] ARM64: meson: enable MESON_IRQ_GPIO in Kconfig Jerome Brunet
2016-10-19 15:21     ` Jerome Brunet
2016-10-19 15:21     ` Jerome Brunet
2016-10-19 15:21     ` Jerome Brunet
2016-10-20 16:34     ` Marc Zyngier
2016-10-20 16:34       ` Marc Zyngier
2016-10-20 16:34       ` Marc Zyngier
2016-10-19 15:21   ` [PATCH v2 8/9] ARM64: dts: amlogic: enable gpio interrupt controller on gxbb Jerome Brunet
2016-10-19 15:21     ` Jerome Brunet
2016-10-19 15:21     ` Jerome Brunet
2016-10-19 15:21     ` Jerome Brunet
2016-10-19 15:21 ` [PATCH v2 9/9] ARM: dts: amlogic: enable gpio interrupt controller on meson8 Jerome Brunet
2016-10-19 15:21   ` Jerome Brunet
2016-10-19 15:21   ` Jerome Brunet
2016-10-20 10:08 ` [PATCH v2 0/9] irqchip: meson: add support for the gpio interrupt controller Neil Armstrong

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