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From: Laurent Vivier <laurent@vivier.eu>
To: qemu-devel@nongnu.org
Cc: schwab@linux-m68k.org, agraf@suse.de,
	Richard Henderson <rth@twiddle.net>,
	gerg@uclinux.org, Laurent Vivier <laurent@vivier.eu>
Subject: [Qemu-devel] [PULL 07/18] target-m68k: add addressing modes to not
Date: Fri, 28 Oct 2016 10:48:21 +0200	[thread overview]
Message-ID: <1477644512-21716-8-git-send-email-laurent@vivier.eu> (raw)
In-Reply-To: <1477644512-21716-1-git-send-email-laurent@vivier.eu>

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <rth@twiddle.net>
---
 target-m68k/translate.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index fd6631d..031f7eb 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -1673,11 +1673,17 @@ DISAS_INSN(move_to_ccr)
 
 DISAS_INSN(not)
 {
-    TCGv reg;
+    TCGv src1;
+    TCGv dest;
+    TCGv addr;
+    int opsize;
 
-    reg = DREG(insn, 0);
-    tcg_gen_not_i32(reg, reg);
-    gen_logic_cc(s, reg, OS_LONG);
+    opsize = insn_opsize(insn);
+    SRC_EA(env, src1, opsize, 1, &addr);
+    dest = tcg_temp_new();
+    tcg_gen_not_i32(dest, src1);
+    DEST_EA(env, insn, opsize, dest, &addr);
+    gen_logic_cc(s, dest, opsize);
 }
 
 DISAS_INSN(swap)
-- 
2.7.4

  parent reply	other threads:[~2016-10-28  8:49 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-28  8:48 [Qemu-devel] [PULL 00/18] M68k part2 patches Laurent Vivier
2016-10-28  8:48 ` [Qemu-devel] [PULL 01/18] target-m68k: add bkpt instruction Laurent Vivier
2016-10-28  8:48 ` [Qemu-devel] [PULL 02/18] target-m68k: add linkl Laurent Vivier
2016-10-28  8:48 ` [Qemu-devel] [PULL 03/18] target-m68k: add exg ops Laurent Vivier
2016-10-28  8:48 ` [Qemu-devel] [PULL 04/18] target-m68k: add addressing modes to scc Laurent Vivier
2016-10-28  8:48 ` [Qemu-devel] [PULL 05/18] target-m68k: add dbcc Laurent Vivier
2016-10-28  8:48 ` [Qemu-devel] [PULL 06/18] target-m68k: Inline addx, subx, negx Laurent Vivier
2016-10-28  8:48 ` Laurent Vivier [this message]
2016-10-28  8:48 ` [Qemu-devel] [PULL 08/18] target-m68k: eor can manage word and byte operands Laurent Vivier
2016-10-28  8:48 ` [Qemu-devel] [PULL 09/18] target-m68k: or " Laurent Vivier
2016-10-28  8:48 ` [Qemu-devel] [PULL 10/18] target-m68k: and " Laurent Vivier
2016-10-28  8:48 ` [Qemu-devel] [PULL 11/18] target-m68k: suba/adda can manage word operand Laurent Vivier
2016-10-28  8:48 ` [Qemu-devel] [PULL 12/18] target-m68k: some bit ops cleanup Laurent Vivier
2016-10-28  8:48 ` [Qemu-devel] [PULL 13/18] target-m68k: introduce byte and word cc_ops Laurent Vivier
2016-10-28  8:48 ` [Qemu-devel] [PULL 14/18] target-m68k: add addressing modes to neg Laurent Vivier
2016-10-28  8:48 ` [Qemu-devel] [PULL 15/18] target-m68k: add/sub manage word and byte operands Laurent Vivier
2016-10-28  8:48 ` [Qemu-devel] [PULL 16/18] target-m68k: cmp manages word and bytes operands Laurent Vivier
2016-10-28  8:48 ` [Qemu-devel] [PULL 17/18] target-m68k: immediate ops manage word and byte operands Laurent Vivier
2016-10-28  8:48 ` [Qemu-devel] [PULL 18/18] MAINTAINERS: update M68K entry Laurent Vivier
2016-10-28 16:57 ` [Qemu-devel] [PULL 00/18] M68k part2 patches Peter Maydell

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