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From: Jordan Crouse <jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: [PATCH 05/16] drm/msm: gpu: Return error on hw_init failure
Date: Fri,  4 Nov 2016 16:44:46 -0600	[thread overview]
Message-ID: <1478299497-9729-6-git-send-email-jcrouse@codeaurora.org> (raw)
In-Reply-To: <1478299497-9729-1-git-send-email-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>

When the GPU hardware init function fails (like say, ME_INIT timed
out) return error instead of blindly continuing on. This gives us
a small chance of saving the system before it goes boom.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
 drivers/gpu/drm/msm/adreno/a3xx_gpu.c   | 21 ++++++++++++---------
 drivers/gpu/drm/msm/adreno/a4xx_gpu.c   | 20 +++++++++++---------
 drivers/gpu/drm/msm/adreno/adreno_gpu.c | 11 +++++------
 drivers/gpu/drm/msm/adreno/adreno_gpu.h |  2 +-
 drivers/gpu/drm/msm/msm_gpu.h           |  2 +-
 5 files changed, 30 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index 5eda847..13989d9 100644
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
@@ -41,7 +41,7 @@ extern bool hang_debug;
 
 static void a3xx_dump(struct msm_gpu *gpu);
 
-static void a3xx_me_init(struct msm_gpu *gpu)
+static bool a3xx_me_init(struct msm_gpu *gpu)
 {
 	struct msm_ringbuffer *ring = gpu->rb;
 
@@ -65,7 +65,7 @@ static void a3xx_me_init(struct msm_gpu *gpu)
 	OUT_RING(ring, 0x00000000);
 
 	gpu->funcs->flush(gpu);
-	gpu->funcs->idle(gpu);
+	return gpu->funcs->idle(gpu);
 }
 
 static int a3xx_hw_init(struct msm_gpu *gpu)
@@ -294,9 +294,7 @@ static int a3xx_hw_init(struct msm_gpu *gpu)
 	/* clear ME_HALT to start micro engine */
 	gpu_write(gpu, REG_AXXX_CP_ME_CNTL, 0);
 
-	a3xx_me_init(gpu);
-
-	return 0;
+	return a3xx_me_init(gpu) ? 0 : -EINVAL;
 }
 
 static void a3xx_recover(struct msm_gpu *gpu)
@@ -330,17 +328,22 @@ static void a3xx_destroy(struct msm_gpu *gpu)
 	kfree(a3xx_gpu);
 }
 
-static void a3xx_idle(struct msm_gpu *gpu)
+static bool a3xx_idle(struct msm_gpu *gpu)
 {
 	/* wait for ringbuffer to drain: */
-	adreno_idle(gpu);
+	if (!adreno_idle(gpu))
+		return false;
 
 	/* then wait for GPU to finish: */
 	if (spin_until(!(gpu_read(gpu, REG_A3XX_RBBM_STATUS) &
-			A3XX_RBBM_STATUS_GPU_BUSY)))
+			A3XX_RBBM_STATUS_GPU_BUSY))) {
 		DRM_ERROR("%s: timeout waiting for GPU to idle!\n", gpu->name);
 
-	/* TODO maybe we need to reset GPU here to recover from hang? */
+		/* TODO maybe we need to reset GPU here to recover from hang? */
+		return false;
+	}
+
+	return true;
 }
 
 static irqreturn_t a3xx_irq(struct msm_gpu *gpu)
diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
index 0354be2..ba16507 100644
--- a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
@@ -113,7 +113,7 @@ static void a4xx_enable_hwcg(struct msm_gpu *gpu)
 }
 
 
-static void a4xx_me_init(struct msm_gpu *gpu)
+static bool a4xx_me_init(struct msm_gpu *gpu)
 {
 	struct msm_ringbuffer *ring = gpu->rb;
 
@@ -137,7 +137,7 @@ static void a4xx_me_init(struct msm_gpu *gpu)
 	OUT_RING(ring, 0x00000000);
 
 	gpu->funcs->flush(gpu);
-	gpu->funcs->idle(gpu);
+	return gpu->funcs->idle(gpu);
 }
 
 static int a4xx_hw_init(struct msm_gpu *gpu)
@@ -292,9 +292,7 @@ static int a4xx_hw_init(struct msm_gpu *gpu)
 	/* clear ME_HALT to start micro engine */
 	gpu_write(gpu, REG_A4XX_CP_ME_CNTL, 0);
 
-	a4xx_me_init(gpu);
-
-	return 0;
+	return a4xx_me_init(gpu) ? 0 : -EINVAL;
 }
 
 static void a4xx_recover(struct msm_gpu *gpu)
@@ -328,17 +326,21 @@ static void a4xx_destroy(struct msm_gpu *gpu)
 	kfree(a4xx_gpu);
 }
 
-static void a4xx_idle(struct msm_gpu *gpu)
+static bool a4xx_idle(struct msm_gpu *gpu)
 {
 	/* wait for ringbuffer to drain: */
-	adreno_idle(gpu);
+	if (!adreno_idle(gpu))
+		return false;
 
 	/* then wait for GPU to finish: */
 	if (spin_until(!(gpu_read(gpu, REG_A4XX_RBBM_STATUS) &
-					A4XX_RBBM_STATUS_GPU_BUSY)))
+					A4XX_RBBM_STATUS_GPU_BUSY))) {
 		DRM_ERROR("%s: timeout waiting for GPU to idle!\n", gpu->name);
+		/* TODO maybe we need to reset GPU here to recover from hang? */
+		return false;
+	}
 
-	/* TODO maybe we need to reset GPU here to recover from hang? */
+	return true;
 }
 
 static irqreturn_t a4xx_irq(struct msm_gpu *gpu)
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index f386f46..8b2201c 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -218,19 +218,18 @@ void adreno_flush(struct msm_gpu *gpu)
 	adreno_gpu_write(adreno_gpu, REG_ADRENO_CP_RB_WPTR, wptr);
 }
 
-void adreno_idle(struct msm_gpu *gpu)
+bool adreno_idle(struct msm_gpu *gpu)
 {
 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
 	uint32_t wptr = get_wptr(gpu->rb);
-	int ret;
 
 	/* wait for CP to drain ringbuffer: */
-	ret = spin_until(get_rptr(adreno_gpu) == wptr);
-
-	if (ret)
-		DRM_ERROR("%s: timeout waiting to drain ringbuffer!\n", gpu->name);
+	if (!spin_until(get_rptr(adreno_gpu) == wptr))
+		return true;
 
 	/* TODO maybe we need to reset GPU here to recover from hang? */
+	DRM_ERROR("%s: timeout waiting to drain ringbuffer!\n", gpu->name);
+	return false;
 }
 
 #ifdef CONFIG_DEBUG_FS
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index fd976e8..30c2956 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -182,7 +182,7 @@ void adreno_recover(struct msm_gpu *gpu);
 void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
 		struct msm_file_private *ctx);
 void adreno_flush(struct msm_gpu *gpu);
-void adreno_idle(struct msm_gpu *gpu);
+bool adreno_idle(struct msm_gpu *gpu);
 #ifdef CONFIG_DEBUG_FS
 void adreno_show(struct msm_gpu *gpu, struct seq_file *m);
 #endif
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index c902283..4ee95ca 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -50,7 +50,7 @@ struct msm_gpu_funcs {
 	void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit,
 			struct msm_file_private *ctx);
 	void (*flush)(struct msm_gpu *gpu);
-	void (*idle)(struct msm_gpu *gpu);
+	bool (*idle)(struct msm_gpu *gpu);
 	irqreturn_t (*irq)(struct msm_gpu *irq);
 	uint32_t (*last_fence)(struct msm_gpu *gpu);
 	void (*recover)(struct msm_gpu *gpu);
-- 
1.9.1

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  parent reply	other threads:[~2016-11-04 22:44 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-04 22:44 [RFC] Initial support for the Adreno A5XX Jordan Crouse
     [not found] ` <1478299497-9729-1-git-send-email-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-04 22:44   ` [PATCH 01/16] drm/msm: Remove dependency on COMMON_CLK Jordan Crouse
2016-11-04 22:44   ` [PATCH 02/16] drm/msm: Rename the MSM driver so it doesn't conflict with other drivers Jordan Crouse
2016-11-04 22:44   ` [PATCH 03/16] drm/msm: gpu: Cut down the list of "generic" registers to the ones we use Jordan Crouse
2016-11-04 22:44   ` [PATCH 04/16] drm: msm: Flush the cache immediately after allocating pages Jordan Crouse
2016-11-06 14:15     ` [Freedreno] " Rob Clark
     [not found]       ` <CAF6AEGtDv8tRZi82Eno5RF6a58qSRpjYcUo-J8dDDioDLLJqmg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-11-07  8:35         ` Archit Taneja
     [not found]           ` <99a66f0f-ec84-a26e-0108-60367362c29e-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-07 12:19             ` Rob Clark
2016-11-07 18:01               ` [Freedreno] " Jordan Crouse
2016-11-04 22:44   ` Jordan Crouse [this message]
     [not found]     ` <1478299497-9729-6-git-send-email-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-07 18:54       ` [PATCH 05/16] drm/msm: gpu: Return error on hw_init failure Rob Clark
2016-11-04 22:44   ` [PATCH 06/16] drm/msm: gpu: Add OUT_TYPE4 and OUT_TYPE7 Jordan Crouse
2016-11-04 22:44   ` [PATCH 07/16] drm/msm: Add adreno_gpu_write64() Jordan Crouse
2016-11-07 19:19     ` [Freedreno] " Rob Clark
2016-11-04 22:44   ` [PATCH 08/16] drm/msm: Remove 'src_clk' from adreno configuration Jordan Crouse
2016-11-04 22:44   ` [PATCH 09/16] drm/msm: gpu Add new gpu register read/write functions Jordan Crouse
     [not found]     ` <1478299497-9729-10-git-send-email-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-07 19:17       ` Rob Clark
2016-11-04 22:44   ` [PATCH 10/16] drm/msm: Disable interrupts during init Jordan Crouse
2016-11-04 22:44   ` [PATCH 13/16] drm/msm: gpu: Add support for the GPMU Jordan Crouse
     [not found]     ` <1478299497-9729-14-git-send-email-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-07 12:58       ` Stanimir Varbanov
2016-11-07 13:02         ` [Freedreno] " Rob Clark
     [not found]           ` <CAF6AEGuW6ThJM-+X-=XGtqTCY_hcq8DghJHRf38OWjy4Z3R=DQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-11-07 14:47             ` Stanimir Varbanov
     [not found]         ` <740c4fda-dfd6-7a70-9cb7-3eec6a5781ca-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-11-07 18:09           ` Jordan Crouse
2016-11-04 22:44   ` [PATCH 15/16] drm/msm: Add a quick and dirty PIL loader Jordan Crouse
2016-11-04 22:44   ` [PATCH 16/16] drm/msm: gpu: Use the zap shader on 5XX if we can Jordan Crouse
2016-11-04 22:44 ` [PATCH 11/16] arm64: dts: Add Adreno GPU and GPU smmu definitions Jordan Crouse
2016-11-04 22:44 ` [PATCH 12/16] drm/msm: gpu: Add A5XX target support Jordan Crouse
2016-11-04 22:44 ` [PATCH 14/16] firmware: qcom_scm: Add qcom_scm_gpu_zap_resume() Jordan Crouse
2016-11-08 17:12 ` [Freedreno] [RFC] Initial support for the Adreno A5XX Jordan Crouse

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