From: Wei Huang <wei@redhat.com> To: cov@codeaurora.org Cc: alindsay@codeaurora.org, kvm@vger.kernel.org, croberts@codeaurora.org, qemu-devel@nongnu.org, alistair.francis@xilinx.com, shannon.zhao@linaro.org, kvmarm@lists.cs.columbia.edu Subject: [kvm-unit-tests PATCH v8 1/3] arm: Add PMU test Date: Tue, 8 Nov 2016 12:17:13 -0600 [thread overview] Message-ID: <1478629035-12938-2-git-send-email-wei@redhat.com> (raw) In-Reply-To: <1478629035-12938-1-git-send-email-wei@redhat.com> From: Christopher Covington <cov@codeaurora.org> Beginning with a simple sanity check of the control register, add a unit test for the ARM Performance Monitors Unit (PMU). Signed-off-by: Christopher Covington <cov@codeaurora.org> Signed-off-by: Wei Huang <wei@redhat.com> --- arm/Makefile.common | 3 ++- arm/pmu.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++++++++ arm/unittests.cfg | 5 ++++ 3 files changed, 80 insertions(+), 1 deletion(-) create mode 100644 arm/pmu.c diff --git a/arm/Makefile.common b/arm/Makefile.common index ccb554d..f98f422 100644 --- a/arm/Makefile.common +++ b/arm/Makefile.common @@ -11,7 +11,8 @@ endif tests-common = \ $(TEST_DIR)/selftest.flat \ - $(TEST_DIR)/spinlock-test.flat + $(TEST_DIR)/spinlock-test.flat \ + $(TEST_DIR)/pmu.flat all: test_cases diff --git a/arm/pmu.c b/arm/pmu.c new file mode 100644 index 0000000..0b29088 --- /dev/null +++ b/arm/pmu.c @@ -0,0 +1,73 @@ +/* + * Test the ARM Performance Monitors Unit (PMU). + * + * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU Lesser General Public License version 2.1 and + * only version 2.1 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License + * for more details. + */ +#include "libcflat.h" + +#define PMU_PMCR_N_SHIFT 11 +#define PMU_PMCR_N_MASK 0x1f +#define PMU_PMCR_ID_SHIFT 16 +#define PMU_PMCR_ID_MASK 0xff +#define PMU_PMCR_IMP_SHIFT 24 +#define PMU_PMCR_IMP_MASK 0xff + +#if defined(__arm__) +static inline uint32_t pmcr_read(void) +{ + uint32_t ret; + + asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (ret)); + return ret; +} +#elif defined(__aarch64__) +static inline uint32_t pmcr_read(void) +{ + uint32_t ret; + + asm volatile("mrs %0, pmcr_el0" : "=r" (ret)); + return ret; +} +#endif + +/* + * As a simple sanity check on the PMCR_EL0, ensure the implementer field isn't + * null. Also print out a couple other interesting fields for diagnostic + * purposes. For example, as of fall 2016, QEMU TCG mode doesn't implement + * event counters and therefore reports zero event counters, but hopefully + * support for at least the instructions event will be added in the future and + * the reported number of event counters will become nonzero. + */ +static bool check_pmcr(void) +{ + uint32_t pmcr; + + pmcr = pmcr_read(); + + printf("PMU implementer: %c\n", + (pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK); + printf("Identification code: 0x%x\n", + (pmcr >> PMU_PMCR_ID_SHIFT) & PMU_PMCR_ID_MASK); + printf("Event counters: %d\n", + (pmcr >> PMU_PMCR_N_SHIFT) & PMU_PMCR_N_MASK); + + return ((pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK) != 0; +} + +int main(void) +{ + report_prefix_push("pmu"); + + report("Control register", check_pmcr()); + + return report_summary(); +} diff --git a/arm/unittests.cfg b/arm/unittests.cfg index 3f6fa45..7645180 100644 --- a/arm/unittests.cfg +++ b/arm/unittests.cfg @@ -54,3 +54,8 @@ file = selftest.flat smp = $MAX_SMP extra_params = -append 'smp' groups = selftest + +# Test PMU support +[pmu] +file = pmu.flat +groups = pmu -- 1.8.3.1
WARNING: multiple messages have this Message-ID (diff)
From: Wei Huang <wei@redhat.com> To: cov@codeaurora.org Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, shannon.zhao@linaro.org, alistair.francis@xilinx.com, croberts@codeaurora.org, alindsay@codeaurora.org, drjones@redhat.com Subject: [Qemu-devel] [kvm-unit-tests PATCH v8 1/3] arm: Add PMU test Date: Tue, 8 Nov 2016 12:17:13 -0600 [thread overview] Message-ID: <1478629035-12938-2-git-send-email-wei@redhat.com> (raw) In-Reply-To: <1478629035-12938-1-git-send-email-wei@redhat.com> From: Christopher Covington <cov@codeaurora.org> Beginning with a simple sanity check of the control register, add a unit test for the ARM Performance Monitors Unit (PMU). Signed-off-by: Christopher Covington <cov@codeaurora.org> Signed-off-by: Wei Huang <wei@redhat.com> --- arm/Makefile.common | 3 ++- arm/pmu.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++++++++ arm/unittests.cfg | 5 ++++ 3 files changed, 80 insertions(+), 1 deletion(-) create mode 100644 arm/pmu.c diff --git a/arm/Makefile.common b/arm/Makefile.common index ccb554d..f98f422 100644 --- a/arm/Makefile.common +++ b/arm/Makefile.common @@ -11,7 +11,8 @@ endif tests-common = \ $(TEST_DIR)/selftest.flat \ - $(TEST_DIR)/spinlock-test.flat + $(TEST_DIR)/spinlock-test.flat \ + $(TEST_DIR)/pmu.flat all: test_cases diff --git a/arm/pmu.c b/arm/pmu.c new file mode 100644 index 0000000..0b29088 --- /dev/null +++ b/arm/pmu.c @@ -0,0 +1,73 @@ +/* + * Test the ARM Performance Monitors Unit (PMU). + * + * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU Lesser General Public License version 2.1 and + * only version 2.1 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License + * for more details. + */ +#include "libcflat.h" + +#define PMU_PMCR_N_SHIFT 11 +#define PMU_PMCR_N_MASK 0x1f +#define PMU_PMCR_ID_SHIFT 16 +#define PMU_PMCR_ID_MASK 0xff +#define PMU_PMCR_IMP_SHIFT 24 +#define PMU_PMCR_IMP_MASK 0xff + +#if defined(__arm__) +static inline uint32_t pmcr_read(void) +{ + uint32_t ret; + + asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (ret)); + return ret; +} +#elif defined(__aarch64__) +static inline uint32_t pmcr_read(void) +{ + uint32_t ret; + + asm volatile("mrs %0, pmcr_el0" : "=r" (ret)); + return ret; +} +#endif + +/* + * As a simple sanity check on the PMCR_EL0, ensure the implementer field isn't + * null. Also print out a couple other interesting fields for diagnostic + * purposes. For example, as of fall 2016, QEMU TCG mode doesn't implement + * event counters and therefore reports zero event counters, but hopefully + * support for at least the instructions event will be added in the future and + * the reported number of event counters will become nonzero. + */ +static bool check_pmcr(void) +{ + uint32_t pmcr; + + pmcr = pmcr_read(); + + printf("PMU implementer: %c\n", + (pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK); + printf("Identification code: 0x%x\n", + (pmcr >> PMU_PMCR_ID_SHIFT) & PMU_PMCR_ID_MASK); + printf("Event counters: %d\n", + (pmcr >> PMU_PMCR_N_SHIFT) & PMU_PMCR_N_MASK); + + return ((pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK) != 0; +} + +int main(void) +{ + report_prefix_push("pmu"); + + report("Control register", check_pmcr()); + + return report_summary(); +} diff --git a/arm/unittests.cfg b/arm/unittests.cfg index 3f6fa45..7645180 100644 --- a/arm/unittests.cfg +++ b/arm/unittests.cfg @@ -54,3 +54,8 @@ file = selftest.flat smp = $MAX_SMP extra_params = -append 'smp' groups = selftest + +# Test PMU support +[pmu] +file = pmu.flat +groups = pmu -- 1.8.3.1
next prev parent reply other threads:[~2016-11-08 18:17 UTC|newest] Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-11-08 18:17 [kvm-unit-tests PATCH v8 0/3] ARM PMU tests Wei Huang 2016-11-08 18:17 ` [Qemu-devel] " Wei Huang 2016-11-08 18:17 ` Wei Huang [this message] 2016-11-08 18:17 ` [Qemu-devel] [kvm-unit-tests PATCH v8 1/3] arm: Add PMU test Wei Huang 2016-11-11 7:37 ` Andrew Jones 2016-11-08 18:17 ` [kvm-unit-tests PATCH v8 2/3] arm: pmu: Check cycle count increases Wei Huang 2016-11-08 18:17 ` [Qemu-devel] " Wei Huang 2016-11-11 7:43 ` Andrew Jones 2016-11-11 19:55 ` Wei Huang 2016-11-14 10:05 ` Andrew Jones 2016-11-14 15:12 ` Christopher Covington 2016-11-15 22:50 ` Wei Huang 2016-11-16 13:01 ` Andrew Jones 2016-11-16 16:08 ` Christopher Covington 2016-11-16 16:25 ` Andrew Jones 2016-11-16 16:41 ` Christopher Covington 2016-11-16 16:41 ` Christopher Covington 2016-11-16 15:40 ` Andrew Jones 2016-11-08 18:17 ` [kvm-unit-tests PATCH v8 3/3] arm: pmu: Add CPI checking Wei Huang 2016-11-08 18:17 ` [Qemu-devel] " Wei Huang 2016-11-11 8:08 ` Andrew Jones 2016-11-11 16:10 ` Wei Huang 2016-11-16 15:45 ` Andrew Jones
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