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From: Brian Norris <briannorris@chromium.org>
To: Heiko Stuebner <heiko@sntech.de>
Cc: linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	Caesar Wang <wxt@rock-chips.com>,
	Doug Anderson <dianders@chromium.org>,
	<devicetree@vger.kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Stephen Barber <smbarber@chromium.org>,
	linux-arm-kernel@lists.infradead.org,
	Chris Zhong <zyw@rock-chips.com>,
	Brian Norris <briannorris@chromium.org>
Subject: [PATCH 4/9] arm64: dts: rockchip: support dwc3 USB for rk3399
Date: Thu,  1 Dec 2016 18:27:28 -0800	[thread overview]
Message-ID: <1480645653-36943-5-git-send-email-briannorris@chromium.org> (raw)
In-Reply-To: <1480645653-36943-1-git-send-email-briannorris@chromium.org>

Add the dwc3 usb needed node information for rk3399.

Signed-off-by: Brian Norris <briannorris@chromium.org>
---
Somewhat rewritten from Caesar's reposting (v2) of my patch.

Changes:
 * Include USB2 PHY (which is now in -next)
 * Don't include USB3 PHY, as extcon support is not ready yet
 * Drop non-upstream properties
 * Fixup whitespace a bit
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 60 ++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 4ca8f9a7601c..1e97fb8c6415 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -316,6 +316,66 @@
 		};
 	};
 
+	usbdrd3_0: usb@fe800000 {
+		compatible = "rockchip,rk3399-dwc3";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
+			 <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
+			 <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>;
+		clock-names = "clk_usb3otg0_ref", "clk_usb3otg0_suspend",
+			      "aclk_usb3otg0", "aclk_usb3_rksoc_axi_perf",
+			      "aclk_usb3", "aclk_usb3_grf";
+		resets = <&cru SRST_A_USB3_OTG0>;
+		reset-names = "usb3-otg";
+		status = "disabled";
+
+		usbdrd_dwc3_0: dwc3 {
+			compatible = "snps,dwc3";
+			reg = <0x0 0xfe800000 0x0 0x100000>;
+			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
+			dr_mode = "otg";
+			phys = <&u2phy0_otg>;
+			phy-names = "usb2-phy";
+			snps,dis_enblslpm_quirk;
+			snps,dis-u2-freeclk-exists-quirk;
+			snps,dis_u2_susphy_quirk;
+			snps,dis-del-phy-power-chg-quirk;
+			status = "disabled";
+		};
+	};
+
+	usbdrd3_1: usb@fe900000 {
+		compatible = "rockchip,rk3399-dwc3";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>,
+			 <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
+			 <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>;
+		clock-names = "clk_usb3otg1_ref", "clk_usb3otg1_suspend",
+			      "aclk_usb3otg1", "aclk_usb3_rksoc_axi_perf",
+			      "aclk_usb3", "aclk_usb3_grf";
+		resets = <&cru SRST_A_USB3_OTG1>;
+		reset-names = "usb3-otg";
+		status = "disabled";
+
+		usbdrd_dwc3_1: dwc3 {
+			compatible = "snps,dwc3";
+			reg = <0x0 0xfe900000 0x0 0x100000>;
+			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
+			dr_mode = "otg";
+			phys = <&u2phy1_otg>;
+			phy-names = "usb2-phy";
+			snps,dis_enblslpm_quirk;
+			snps,dis-u2-freeclk-exists-quirk;
+			snps,dis_u2_susphy_quirk;
+			snps,dis-del-phy-power-chg-quirk;
+			status = "disabled";
+		};
+	};
+
 	usb_host0_ehci: usb@fe380000 {
 		compatible = "generic-ehci";
 		reg = <0x0 0xfe380000 0x0 0x20000>;
-- 
2.8.0.rc3.226.g39d4020

WARNING: multiple messages have this Message-ID (diff)
From: Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
To: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Brian Norris
	<briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
	Stephen Barber <smbarber-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Subject: [PATCH 4/9] arm64: dts: rockchip: support dwc3 USB for rk3399
Date: Thu,  1 Dec 2016 18:27:28 -0800	[thread overview]
Message-ID: <1480645653-36943-5-git-send-email-briannorris@chromium.org> (raw)
In-Reply-To: <1480645653-36943-1-git-send-email-briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>

Add the dwc3 usb needed node information for rk3399.

Signed-off-by: Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
Somewhat rewritten from Caesar's reposting (v2) of my patch.

Changes:
 * Include USB2 PHY (which is now in -next)
 * Don't include USB3 PHY, as extcon support is not ready yet
 * Drop non-upstream properties
 * Fixup whitespace a bit
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 60 ++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 4ca8f9a7601c..1e97fb8c6415 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -316,6 +316,66 @@
 		};
 	};
 
+	usbdrd3_0: usb@fe800000 {
+		compatible = "rockchip,rk3399-dwc3";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
+			 <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
+			 <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>;
+		clock-names = "clk_usb3otg0_ref", "clk_usb3otg0_suspend",
+			      "aclk_usb3otg0", "aclk_usb3_rksoc_axi_perf",
+			      "aclk_usb3", "aclk_usb3_grf";
+		resets = <&cru SRST_A_USB3_OTG0>;
+		reset-names = "usb3-otg";
+		status = "disabled";
+
+		usbdrd_dwc3_0: dwc3 {
+			compatible = "snps,dwc3";
+			reg = <0x0 0xfe800000 0x0 0x100000>;
+			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
+			dr_mode = "otg";
+			phys = <&u2phy0_otg>;
+			phy-names = "usb2-phy";
+			snps,dis_enblslpm_quirk;
+			snps,dis-u2-freeclk-exists-quirk;
+			snps,dis_u2_susphy_quirk;
+			snps,dis-del-phy-power-chg-quirk;
+			status = "disabled";
+		};
+	};
+
+	usbdrd3_1: usb@fe900000 {
+		compatible = "rockchip,rk3399-dwc3";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>,
+			 <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
+			 <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>;
+		clock-names = "clk_usb3otg1_ref", "clk_usb3otg1_suspend",
+			      "aclk_usb3otg1", "aclk_usb3_rksoc_axi_perf",
+			      "aclk_usb3", "aclk_usb3_grf";
+		resets = <&cru SRST_A_USB3_OTG1>;
+		reset-names = "usb3-otg";
+		status = "disabled";
+
+		usbdrd_dwc3_1: dwc3 {
+			compatible = "snps,dwc3";
+			reg = <0x0 0xfe900000 0x0 0x100000>;
+			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
+			dr_mode = "otg";
+			phys = <&u2phy1_otg>;
+			phy-names = "usb2-phy";
+			snps,dis_enblslpm_quirk;
+			snps,dis-u2-freeclk-exists-quirk;
+			snps,dis_u2_susphy_quirk;
+			snps,dis-del-phy-power-chg-quirk;
+			status = "disabled";
+		};
+	};
+
 	usb_host0_ehci: usb@fe380000 {
 		compatible = "generic-ehci";
 		reg = <0x0 0xfe380000 0x0 0x20000>;
-- 
2.8.0.rc3.226.g39d4020

WARNING: multiple messages have this Message-ID (diff)
From: briannorris@chromium.org (Brian Norris)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/9] arm64: dts: rockchip: support dwc3 USB for rk3399
Date: Thu,  1 Dec 2016 18:27:28 -0800	[thread overview]
Message-ID: <1480645653-36943-5-git-send-email-briannorris@chromium.org> (raw)
In-Reply-To: <1480645653-36943-1-git-send-email-briannorris@chromium.org>

Add the dwc3 usb needed node information for rk3399.

Signed-off-by: Brian Norris <briannorris@chromium.org>
---
Somewhat rewritten from Caesar's reposting (v2) of my patch.

Changes:
 * Include USB2 PHY (which is now in -next)
 * Don't include USB3 PHY, as extcon support is not ready yet
 * Drop non-upstream properties
 * Fixup whitespace a bit
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 60 ++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 4ca8f9a7601c..1e97fb8c6415 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -316,6 +316,66 @@
 		};
 	};
 
+	usbdrd3_0: usb at fe800000 {
+		compatible = "rockchip,rk3399-dwc3";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
+			 <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
+			 <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>;
+		clock-names = "clk_usb3otg0_ref", "clk_usb3otg0_suspend",
+			      "aclk_usb3otg0", "aclk_usb3_rksoc_axi_perf",
+			      "aclk_usb3", "aclk_usb3_grf";
+		resets = <&cru SRST_A_USB3_OTG0>;
+		reset-names = "usb3-otg";
+		status = "disabled";
+
+		usbdrd_dwc3_0: dwc3 {
+			compatible = "snps,dwc3";
+			reg = <0x0 0xfe800000 0x0 0x100000>;
+			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
+			dr_mode = "otg";
+			phys = <&u2phy0_otg>;
+			phy-names = "usb2-phy";
+			snps,dis_enblslpm_quirk;
+			snps,dis-u2-freeclk-exists-quirk;
+			snps,dis_u2_susphy_quirk;
+			snps,dis-del-phy-power-chg-quirk;
+			status = "disabled";
+		};
+	};
+
+	usbdrd3_1: usb at fe900000 {
+		compatible = "rockchip,rk3399-dwc3";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>,
+			 <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
+			 <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>;
+		clock-names = "clk_usb3otg1_ref", "clk_usb3otg1_suspend",
+			      "aclk_usb3otg1", "aclk_usb3_rksoc_axi_perf",
+			      "aclk_usb3", "aclk_usb3_grf";
+		resets = <&cru SRST_A_USB3_OTG1>;
+		reset-names = "usb3-otg";
+		status = "disabled";
+
+		usbdrd_dwc3_1: dwc3 {
+			compatible = "snps,dwc3";
+			reg = <0x0 0xfe900000 0x0 0x100000>;
+			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
+			dr_mode = "otg";
+			phys = <&u2phy1_otg>;
+			phy-names = "usb2-phy";
+			snps,dis_enblslpm_quirk;
+			snps,dis-u2-freeclk-exists-quirk;
+			snps,dis_u2_susphy_quirk;
+			snps,dis-del-phy-power-chg-quirk;
+			status = "disabled";
+		};
+	};
+
 	usb_host0_ehci: usb at fe380000 {
 		compatible = "generic-ehci";
 		reg = <0x0 0xfe380000 0x0 0x20000>;
-- 
2.8.0.rc3.226.g39d4020

  parent reply	other threads:[~2016-12-02  2:35 UTC|newest]

Thread overview: 79+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-02  2:27 [PATCH 0/9] arm64: dts: rockchip: support Google Kevin Brian Norris
2016-12-02  2:27 ` Brian Norris
2016-12-02  2:27 ` Brian Norris
2016-12-02  2:27 ` [PATCH 1/9] arm64: dts: Add symlinks for cros-ec-keyboard and cros-ec-sbs Brian Norris
2016-12-02  2:27   ` Brian Norris
2016-12-02  2:27   ` Brian Norris
2016-12-02  2:27 ` [PATCH 2/9] arm64: dts: rockchip: add rk3399 thermal_zones phandle Brian Norris
2016-12-02  2:27   ` Brian Norris
2016-12-02  2:27   ` Brian Norris
2016-12-07 16:55   ` Heiko Stuebner
2016-12-07 16:55     ` Heiko Stuebner
2016-12-02  2:27 ` [PATCH 3/9] arm64: dts: rockchip: add rk3399 eDP HPD pinctrl Brian Norris
2016-12-02  2:27   ` Brian Norris
2016-12-02  2:27   ` Brian Norris
2016-12-07 16:56   ` Heiko Stuebner
2016-12-07 16:56     ` Heiko Stuebner
2016-12-02  2:27 ` Brian Norris [this message]
2016-12-02  2:27   ` [PATCH 4/9] arm64: dts: rockchip: support dwc3 USB for rk3399 Brian Norris
2016-12-02  2:27   ` Brian Norris
2016-12-07 17:09   ` Heiko Stuebner
2016-12-07 17:09     ` Heiko Stuebner
2016-12-07 17:52     ` Brian Norris
2016-12-07 17:52       ` Brian Norris
2016-12-07 17:52       ` Brian Norris
2016-12-07 19:01       ` Heiko Stuebner
2016-12-07 19:01         ` Heiko Stuebner
2016-12-07 19:01         ` Heiko Stuebner
2016-12-07 19:03         ` Brian Norris
2016-12-07 19:03           ` Brian Norris
2016-12-07 19:03           ` Brian Norris
2016-12-07 19:09           ` Heiko Stuebner
2016-12-07 19:09             ` Heiko Stuebner
2016-12-02  2:27 ` [PATCH 5/9] arm64: dts: rockchip: add rk3399 OPPs Brian Norris
2016-12-02  2:27   ` Brian Norris
2016-12-02  2:27   ` Brian Norris
2016-12-02  2:27 ` [PATCH 6/9] dt-bindings: Document rk3399 Gru/Kevin Brian Norris
2016-12-02  2:27   ` Brian Norris
2016-12-02  2:27   ` Brian Norris
2016-12-07 17:12   ` Heiko Stuebner
2016-12-07 17:12     ` Heiko Stuebner
2016-12-07 17:12     ` Heiko Stuebner
2016-12-07 17:41     ` Brian Norris
2016-12-07 17:41       ` Brian Norris
2016-12-07 17:41       ` Brian Norris
2016-12-07 19:15       ` Heiko Stuebner
2016-12-07 19:15         ` Heiko Stuebner
2016-12-09 17:54   ` Rob Herring
2016-12-09 17:54     ` Rob Herring
2016-12-09 18:28     ` Heiko Stuebner
2016-12-09 18:28       ` Heiko Stuebner
2016-12-09 18:28       ` Heiko Stuebner
2016-12-02  2:27 ` [PATCH 7/9] arm64: dts: rockchip: add Gru/Kevin DTS Brian Norris
2016-12-02  2:27   ` Brian Norris
2016-12-02  2:27   ` Brian Norris
2016-12-02  2:27 ` [PATCH 8/9] arm64: dts: rockchip: partially describe PWM regulators for Gru Brian Norris
2016-12-02  2:27   ` Brian Norris
2016-12-02  2:27   ` Brian Norris
2016-12-07 16:48   ` Heiko Stuebner
2016-12-07 16:48     ` Heiko Stuebner
2016-12-07 16:48     ` Heiko Stuebner
2016-12-07 17:09     ` Brian Norris
2016-12-07 17:09       ` Brian Norris
2016-12-13 17:48       ` Heiko Stuebner
2016-12-13 17:48         ` Heiko Stuebner
2016-12-22 16:09         ` Heiko Stübner
2016-12-22 16:09           ` Heiko Stübner
2016-12-22 16:09           ` Heiko Stübner
2016-12-02  2:27 ` [PATCH 9/9] arm64: dts: rockchip: add regulator info for Kevin digitizer Brian Norris
2016-12-02  2:27   ` Brian Norris
2016-12-02  2:27   ` Brian Norris
2016-12-13 17:36   ` Heiko Stuebner
2016-12-13 17:36     ` Heiko Stuebner
2016-12-13 17:36     ` Heiko Stuebner
2017-02-08  1:01 ` [PATCH 0/9] arm64: dts: rockchip: support Google Kevin Heiko Stuebner
2017-02-08  1:01   ` Heiko Stuebner
2017-02-08  1:01   ` Heiko Stuebner
2017-02-08  1:03   ` Brian Norris
2017-02-08  1:03     ` Brian Norris
2017-02-08  1:03     ` Brian Norris

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