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From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
To: Kevin Hilman <khilman@kernel.org>, Sekhar Nori <nsekhar@ti.com>,
	Patrick Titiano <ptitiano@baylibre.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Tejun Heo <tj@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Russell King <linux@armlinux.org.uk>,
	David Lechner <david@lechnology.com>
Cc: linux-ide@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Bartosz Golaszewski <bgolaszewski@baylibre.com>
Subject: [PATCH v3 10/13] sata: ahci-da850: add a workaround for controller instability
Date: Wed, 18 Jan 2017 14:19:58 +0100	[thread overview]
Message-ID: <1484745601-4769-11-git-send-email-bgolaszewski@baylibre.com> (raw)
In-Reply-To: <1484745601-4769-1-git-send-email-bgolaszewski@baylibre.com>

We have a use case with the da850 SATA controller where at PLL0
frequency of 456MHz (needed to properly service the LCD controller)
the chip becomes unstable and the hardreset operation is ignored the
first time 50% of times.

The sata core driver already retries to resume the link because some
controllers ignore writes to the SControl register, but just retrying
the resume operation doesn't work - we need to issue he phy/wake reset
again to make it work.

Reimplement ahci_hardreset() in the driver and poke the controller a
couple times before really giving up.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
 drivers/ata/ahci_da850.c | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/drivers/ata/ahci_da850.c b/drivers/ata/ahci_da850.c
index 11dd87e..0b2b1a4 100644
--- a/drivers/ata/ahci_da850.c
+++ b/drivers/ata/ahci_da850.c
@@ -16,7 +16,8 @@
 #include <linux/ahci_platform.h>
 #include "ahci.h"
 
-#define DRV_NAME "ahci_da850"
+#define DRV_NAME		"ahci_da850"
+#define HARDRESET_RETRIES	5
 
 /* SATA PHY Control Register offset from AHCI base */
 #define SATA_P0PHYCR_REG	0x178
@@ -76,6 +77,29 @@ static int ahci_da850_softreset(struct ata_link *link,
 	return ret;
 }
 
+static int ahci_da850_hardreset(struct ata_link *link,
+				unsigned int *class, unsigned long deadline)
+{
+	int ret, retry = HARDRESET_RETRIES;
+	bool online;
+
+	/*
+	 * In order to correctly service the LCD controller of the da850 SoC,
+	 * we increased the PLL0 frequency to 456MHz from the default 300MHz.
+	 *
+	 * This made the SATA controller unstable and the hardreset operation
+	 * does not always succeed the first time. Before really giving up to
+	 * bring up the link, retry the reset a couple times.
+	 */
+	do {
+		ret = ahci_do_hardreset(link, class, deadline, &online);
+		if (online)
+			return ret;
+	} while (retry--);
+
+	return ret;
+}
+
 static struct ata_port_operations ahci_da850_port_ops = {
 	.inherits = &ahci_platform_ops,
 	.softreset = ahci_da850_softreset,
@@ -83,6 +107,8 @@ static struct ata_port_operations ahci_da850_port_ops = {
 	 * No need to override .pmp_softreset - it's only used for actual
 	 * PMP-enabled ports.
 	 */
+	.hardreset = ahci_da850_hardreset,
+	.pmp_hardreset = ahci_da850_hardreset,
 };
 
 static const struct ata_port_info ahci_da850_port_info = {
-- 
2.9.3


WARNING: multiple messages have this Message-ID (diff)
From: bgolaszewski@baylibre.com (Bartosz Golaszewski)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 10/13] sata: ahci-da850: add a workaround for controller instability
Date: Wed, 18 Jan 2017 14:19:58 +0100	[thread overview]
Message-ID: <1484745601-4769-11-git-send-email-bgolaszewski@baylibre.com> (raw)
In-Reply-To: <1484745601-4769-1-git-send-email-bgolaszewski@baylibre.com>

We have a use case with the da850 SATA controller where at PLL0
frequency of 456MHz (needed to properly service the LCD controller)
the chip becomes unstable and the hardreset operation is ignored the
first time 50% of times.

The sata core driver already retries to resume the link because some
controllers ignore writes to the SControl register, but just retrying
the resume operation doesn't work - we need to issue he phy/wake reset
again to make it work.

Reimplement ahci_hardreset() in the driver and poke the controller a
couple times before really giving up.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
 drivers/ata/ahci_da850.c | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/drivers/ata/ahci_da850.c b/drivers/ata/ahci_da850.c
index 11dd87e..0b2b1a4 100644
--- a/drivers/ata/ahci_da850.c
+++ b/drivers/ata/ahci_da850.c
@@ -16,7 +16,8 @@
 #include <linux/ahci_platform.h>
 #include "ahci.h"
 
-#define DRV_NAME "ahci_da850"
+#define DRV_NAME		"ahci_da850"
+#define HARDRESET_RETRIES	5
 
 /* SATA PHY Control Register offset from AHCI base */
 #define SATA_P0PHYCR_REG	0x178
@@ -76,6 +77,29 @@ static int ahci_da850_softreset(struct ata_link *link,
 	return ret;
 }
 
+static int ahci_da850_hardreset(struct ata_link *link,
+				unsigned int *class, unsigned long deadline)
+{
+	int ret, retry = HARDRESET_RETRIES;
+	bool online;
+
+	/*
+	 * In order to correctly service the LCD controller of the da850 SoC,
+	 * we increased the PLL0 frequency to 456MHz from the default 300MHz.
+	 *
+	 * This made the SATA controller unstable and the hardreset operation
+	 * does not always succeed the first time. Before really giving up to
+	 * bring up the link, retry the reset a couple times.
+	 */
+	do {
+		ret = ahci_do_hardreset(link, class, deadline, &online);
+		if (online)
+			return ret;
+	} while (retry--);
+
+	return ret;
+}
+
 static struct ata_port_operations ahci_da850_port_ops = {
 	.inherits = &ahci_platform_ops,
 	.softreset = ahci_da850_softreset,
@@ -83,6 +107,8 @@ static struct ata_port_operations ahci_da850_port_ops = {
 	 * No need to override .pmp_softreset - it's only used for actual
 	 * PMP-enabled ports.
 	 */
+	.hardreset = ahci_da850_hardreset,
+	.pmp_hardreset = ahci_da850_hardreset,
 };
 
 static const struct ata_port_info ahci_da850_port_info = {
-- 
2.9.3

  parent reply	other threads:[~2017-01-18 13:20 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-18 13:19 [PATCH v3 00/13] ARM: da850-lcdk: add SATA support Bartosz Golaszewski
2017-01-18 13:19 ` Bartosz Golaszewski
2017-01-18 13:19 ` Bartosz Golaszewski
     [not found] ` <1484745601-4769-1-git-send-email-bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
2017-01-18 13:19   ` [PATCH v3 01/13] devicetree: bindings: add bindings for ahci-da850 Bartosz Golaszewski
2017-01-18 13:19     ` Bartosz Golaszewski
2017-01-18 13:19     ` Bartosz Golaszewski
2017-01-18 13:19   ` [PATCH v3 02/13] ARM: davinci_all_defconfig: enable SATA modules Bartosz Golaszewski
2017-01-18 13:19     ` Bartosz Golaszewski
2017-01-18 13:19     ` Bartosz Golaszewski
2017-01-18 13:20   ` [PATCH v3 12/13] ARM: dts: da850: add the SATA node Bartosz Golaszewski
2017-01-18 13:20     ` Bartosz Golaszewski
2017-01-18 13:20     ` Bartosz Golaszewski
2017-01-18 13:19 ` [PATCH v3 03/13] ARM: davinci: add a clock lookup entry for the SATA clock Bartosz Golaszewski
2017-01-18 13:19   ` Bartosz Golaszewski
2017-01-18 13:19 ` [PATCH v3 04/13] sata: ahci-da850: get the sata clock using a connection id Bartosz Golaszewski
2017-01-18 13:19   ` Bartosz Golaszewski
2017-01-18 13:19 ` [PATCH v3 05/13] ARM: davinci: da850: add con_id for the SATA clock Bartosz Golaszewski
2017-01-18 13:19   ` Bartosz Golaszewski
2017-01-18 13:19 ` [PATCH v3 06/13] ARM: davinci: da850: model the SATA refclk Bartosz Golaszewski
2017-01-18 13:19   ` Bartosz Golaszewski
2017-01-18 17:26   ` David Lechner
2017-01-18 17:26     ` David Lechner
2017-01-19 11:18     ` Bartosz Golaszewski
2017-01-19 11:18       ` Bartosz Golaszewski
     [not found]     ` <ff4deee6-9700-fff3-be96-0ad2f008914b-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2017-01-19 13:31       ` Bartosz Golaszewski
2017-01-19 13:31         ` Bartosz Golaszewski
2017-01-19 13:31         ` Bartosz Golaszewski
2017-01-18 13:19 ` [PATCH v3 07/13] sata: ahci-da850: add device tree match table Bartosz Golaszewski
2017-01-18 13:19   ` Bartosz Golaszewski
2017-01-18 13:19 ` [PATCH v3 08/13] sata: ahci-da850: implement a workaround for the softreset quirk Bartosz Golaszewski
2017-01-18 13:19   ` Bartosz Golaszewski
2017-01-18 13:19 ` [PATCH v3 09/13] sata: ahci: export ahci_do_hardreset() locally Bartosz Golaszewski
2017-01-18 13:19   ` Bartosz Golaszewski
2017-01-18 18:28   ` Tejun Heo
2017-01-18 18:28     ` Tejun Heo
2017-01-18 18:28     ` Tejun Heo
     [not found]     ` <20170118182826.GA1451-qYNAdHglDFBN0TnZuCh8vA@public.gmane.org>
2017-01-19 10:55       ` Bartosz Golaszewski
2017-01-19 10:55         ` Bartosz Golaszewski
2017-01-19 10:55         ` Bartosz Golaszewski
     [not found]         ` <CAMpxmJULuF3cB7+Vy_qeWkTjooHvx8yk70w59Q=XNd0aAREcuw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-01-19 12:52           ` Tejun Heo
2017-01-19 12:52             ` Tejun Heo
2017-01-19 12:52             ` Tejun Heo
2017-01-18 13:19 ` Bartosz Golaszewski [this message]
2017-01-18 13:19   ` [PATCH v3 10/13] sata: ahci-da850: add a workaround for controller instability Bartosz Golaszewski
2017-01-18 13:19 ` [PATCH v3 11/13] sata: ahci-da850: un-hardcode the MPY bits Bartosz Golaszewski
2017-01-18 13:19   ` Bartosz Golaszewski
2017-01-18 13:20 ` [PATCH v3 13/13] ARM: dts: da850-lcdk: enable the SATA node Bartosz Golaszewski
2017-01-18 13:20   ` Bartosz Golaszewski

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