From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
To: linux-renesas-soc@vger.kernel.org, wsa@the-dreams.de,
geert@linux-m68k.org
Cc: linux-serial@vger.kernel.org, magnus.damm@gmail.com,
sergei.shtylyov@cogentembedded.com, gregkh@linuxfoundation.org,
Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Subject: [PATCH v3 7/7] arm64: dts: r8a7796: salvator-x: add SCIF1 (DEBUG1)
Date: Thu, 2 Feb 2017 18:10:20 +0100 [thread overview]
Message-ID: <1486055420-31595-8-git-send-email-ulrich.hecht+renesas@gmail.com> (raw)
In-Reply-To: <1486055420-31595-1-git-send-email-ulrich.hecht+renesas@gmail.com>
Enables the SCIF hooked up to the DEBUG1 connector.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
index c3e0b9e..6370b17 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
@@ -18,6 +18,7 @@
aliases {
serial0 = &scif2;
+ serial1 = &scif1;
ethernet0 = &avb;
};
@@ -113,6 +114,11 @@
function = "avb";
};
+ scif1_pins: scif1 {
+ groups = "scif1_data_a", "scif1_ctrl";
+ function = "scif1";
+ };
+
scif2_pins: scif2 {
groups = "scif2_data_a";
function = "scif2";
@@ -240,6 +246,14 @@
status = "okay";
};
+&scif1 {
+ pinctrl-0 = <&scif1_pins>;
+ pinctrl-names = "default";
+
+ uart-has-rtscts;
+ status = "okay";
+};
+
&scif2 {
pinctrl-0 = <&scif2_pins>;
pinctrl-names = "default";
--
2.7.4
prev parent reply other threads:[~2017-02-02 17:10 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-02 17:10 [PATCH v3 0/7] Renesas *SCIF* RX FIFO support Ulrich Hecht
2017-02-02 17:10 ` [PATCH v3 1/7] serial: sh-sci: add FIFO trigger bits Ulrich Hecht
2017-02-02 17:10 ` [PATCH v3 2/7] serial: sh-sci: consider DR (data ready) bit adequately Ulrich Hecht
2017-02-03 9:31 ` Geert Uytterhoeven
2017-02-02 17:10 ` [PATCH v3 3/7] serial: sh-sci: implement FIFO threshold register setting Ulrich Hecht
2017-02-02 17:10 ` [PATCH v3 4/7] serial: sh-sci: increase RX FIFO trigger defaults for (H)SCIF Ulrich Hecht
2017-02-03 9:16 ` Greg KH
2017-02-02 17:10 ` [PATCH v3 5/7] serial: sh-sci: SCIFA/B RX FIFO software timeout Ulrich Hecht
2017-02-03 9:18 ` Sergei Shtylyov
2017-02-02 17:10 ` [PATCH v3 6/7] serial: sh-sci: make RX FIFO parameters tunable via sysfs Ulrich Hecht
2017-02-02 17:10 ` Ulrich Hecht [this message]
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