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From: Yangbo Lu <yangbo.lu-3arQi8VN3Tc@public.gmane.org>
To: linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	ulf.hansson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	Adrian Hunter
	<adrian.hunter-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
	Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Xiaobo Xie <xiaobo.xie-3arQi8VN3Tc@public.gmane.org>,
	Yangbo Lu <yangbo.lu-3arQi8VN3Tc@public.gmane.org>
Subject: [v2, 3/7] mmc: sdhci-of-esdhc: add tuning support
Date: Fri, 3 Mar 2017 16:18:45 +0800	[thread overview]
Message-ID: <1488529129-23560-4-git-send-email-yangbo.lu@nxp.com> (raw)
In-Reply-To: <1488529129-23560-1-git-send-email-yangbo.lu-3arQi8VN3Tc@public.gmane.org>

eSDHC uses tuning block for tuning procedure. So the tuning
block control register must be configured properly before tuning.

Signed-off-by: Yangbo Lu <yangbo.lu-3arQi8VN3Tc@public.gmane.org>
---
Changes for v3:
	- Replaced old function for mmc_host_ops.execute_tuning with
	  esdhc_execute_tuning to support eSDHC tuning.
---
 drivers/mmc/host/sdhci-esdhc.h    |  5 +++++
 drivers/mmc/host/sdhci-of-esdhc.c | 21 +++++++++++++++++++++
 2 files changed, 26 insertions(+)

diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
index 6869567..c4bbd74 100644
--- a/drivers/mmc/host/sdhci-esdhc.h
+++ b/drivers/mmc/host/sdhci-esdhc.h
@@ -53,9 +53,14 @@
 #define ESDHC_CLOCK_HCKEN		0x00000002
 #define ESDHC_CLOCK_IPGEN		0x00000001
 
+/* Tuning Block Control Register */
+#define ESDHC_TBCTL			0x120
+#define ESDHC_TB_EN			0x00000004
+
 /* Control Register for DMA transfer */
 #define ESDHC_DMA_SYSCTL		0x40c
 #define ESDHC_PERIPHERAL_CLK_SEL	0x00080000
+#define ESDHC_FLUSH_ASYNC_FIFO		0x00040000
 #define ESDHC_DMA_SNOOP			0x00000040
 
 #endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index 9ab6943..8007188 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -630,6 +630,25 @@ static int esdhc_signal_voltage_switch(struct mmc_host *mmc,
 	}
 }
 
+static int esdhc_execute_tuning(struct mmc_host *mmc, u32 opcode)
+{
+	struct sdhci_host *host = mmc_priv(mmc);
+	u32 val;
+
+	/* Use tuning block for tuning procedure */
+	esdhc_clock_enable(host, false);
+	val = sdhci_readl(host, ESDHC_DMA_SYSCTL);
+	val |= ESDHC_FLUSH_ASYNC_FIFO;
+	sdhci_writel(host, val, ESDHC_DMA_SYSCTL);
+
+	val = sdhci_readl(host, ESDHC_TBCTL);
+	val |= ESDHC_TB_EN;
+	sdhci_writel(host, val, ESDHC_TBCTL);
+	esdhc_clock_enable(host, true);
+
+	return sdhci_execute_tuning(mmc, opcode);
+}
+
 #ifdef CONFIG_PM_SLEEP
 static u32 esdhc_proctl;
 static int esdhc_of_suspend(struct device *dev)
@@ -782,6 +801,8 @@ static int sdhci_esdhc_probe(struct platform_device *pdev)
 	host->mmc_host_ops.start_signal_voltage_switch =
 		esdhc_signal_voltage_switch;
 
+	host->mmc_host_ops.execute_tuning = esdhc_execute_tuning;
+
 	if (IS_ERR(host))
 		return PTR_ERR(host);
 
-- 
2.1.0.27.g96db324

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WARNING: multiple messages have this Message-ID (diff)
From: yangbo.lu@nxp.com (Yangbo Lu)
To: linux-arm-kernel@lists.infradead.org
Subject: [v2, 3/7] mmc: sdhci-of-esdhc: add tuning support
Date: Fri, 3 Mar 2017 16:18:45 +0800	[thread overview]
Message-ID: <1488529129-23560-4-git-send-email-yangbo.lu@nxp.com> (raw)
In-Reply-To: <1488529129-23560-1-git-send-email-yangbo.lu@nxp.com>

eSDHC uses tuning block for tuning procedure. So the tuning
block control register must be configured properly before tuning.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
Changes for v3:
	- Replaced old function for mmc_host_ops.execute_tuning with
	  esdhc_execute_tuning to support eSDHC tuning.
---
 drivers/mmc/host/sdhci-esdhc.h    |  5 +++++
 drivers/mmc/host/sdhci-of-esdhc.c | 21 +++++++++++++++++++++
 2 files changed, 26 insertions(+)

diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
index 6869567..c4bbd74 100644
--- a/drivers/mmc/host/sdhci-esdhc.h
+++ b/drivers/mmc/host/sdhci-esdhc.h
@@ -53,9 +53,14 @@
 #define ESDHC_CLOCK_HCKEN		0x00000002
 #define ESDHC_CLOCK_IPGEN		0x00000001
 
+/* Tuning Block Control Register */
+#define ESDHC_TBCTL			0x120
+#define ESDHC_TB_EN			0x00000004
+
 /* Control Register for DMA transfer */
 #define ESDHC_DMA_SYSCTL		0x40c
 #define ESDHC_PERIPHERAL_CLK_SEL	0x00080000
+#define ESDHC_FLUSH_ASYNC_FIFO		0x00040000
 #define ESDHC_DMA_SNOOP			0x00000040
 
 #endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index 9ab6943..8007188 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -630,6 +630,25 @@ static int esdhc_signal_voltage_switch(struct mmc_host *mmc,
 	}
 }
 
+static int esdhc_execute_tuning(struct mmc_host *mmc, u32 opcode)
+{
+	struct sdhci_host *host = mmc_priv(mmc);
+	u32 val;
+
+	/* Use tuning block for tuning procedure */
+	esdhc_clock_enable(host, false);
+	val = sdhci_readl(host, ESDHC_DMA_SYSCTL);
+	val |= ESDHC_FLUSH_ASYNC_FIFO;
+	sdhci_writel(host, val, ESDHC_DMA_SYSCTL);
+
+	val = sdhci_readl(host, ESDHC_TBCTL);
+	val |= ESDHC_TB_EN;
+	sdhci_writel(host, val, ESDHC_TBCTL);
+	esdhc_clock_enable(host, true);
+
+	return sdhci_execute_tuning(mmc, opcode);
+}
+
 #ifdef CONFIG_PM_SLEEP
 static u32 esdhc_proctl;
 static int esdhc_of_suspend(struct device *dev)
@@ -782,6 +801,8 @@ static int sdhci_esdhc_probe(struct platform_device *pdev)
 	host->mmc_host_ops.start_signal_voltage_switch =
 		esdhc_signal_voltage_switch;
 
+	host->mmc_host_ops.execute_tuning = esdhc_execute_tuning;
+
 	if (IS_ERR(host))
 		return PTR_ERR(host);
 
-- 
2.1.0.27.g96db324

  parent reply	other threads:[~2017-03-03  8:18 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-03  8:18 [v2, 0/7] Add SD UHS-I and eMMC HS200 support for eSDHC Yangbo Lu
2017-03-03  8:18 ` Yangbo Lu
2017-03-03  8:18 ` [v2, 1/7] mmc: sdhci-of-esdhc: add peripheral clock support Yangbo Lu
2017-03-03  8:18   ` Yangbo Lu
2017-03-03  8:18 ` [v2, 2/7] mmc: sdhci-of-esdhc: add support for signal voltage switch Yangbo Lu
2017-03-03  8:18   ` Yangbo Lu
     [not found] ` <1488529129-23560-1-git-send-email-yangbo.lu-3arQi8VN3Tc@public.gmane.org>
2017-03-03  8:18   ` Yangbo Lu [this message]
2017-03-03  8:18     ` [v2, 3/7] mmc: sdhci-of-esdhc: add tuning support Yangbo Lu
2017-03-03  8:18   ` [v2, 4/7] mmc: sdhci: add a quirk to restore delay in tuning Yangbo Lu
2017-03-03  8:18     ` Yangbo Lu
2017-03-23  7:03     ` Adrian Hunter
2017-03-23  7:03       ` Adrian Hunter
2017-03-27  8:05       ` Y.B. Lu
2017-03-27  8:05         ` Y.B. Lu
2017-03-03  8:18   ` [v2, 7/7] arm64: dts: ls1046ardb: add MMC HS200/UHS-1 modes support Yangbo Lu
2017-03-03  8:18     ` Yangbo Lu
2017-03-03  8:18 ` [v2, 5/7] mmc: sdhci-of-esdhc: add delay between tuning cycles Yangbo Lu
2017-03-03  8:18   ` Yangbo Lu
2017-03-03  8:18 ` [v2, 6/7] arm64: dts: ls1046a: add clocks property and compatible for eSDHC node Yangbo Lu
2017-03-03  8:18   ` Yangbo Lu
2017-03-09  2:22 ` [v2, 0/7] Add SD UHS-I and eMMC HS200 support for eSDHC Y.B. Lu
2017-03-09  2:22   ` Y.B. Lu
2017-03-17  3:01   ` Y.B. Lu
2017-03-17  3:01     ` Y.B. Lu

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