From: Moritz Fischer <mdf@kernel.org> To: linux-fpga@vger.kernel.org Cc: robh+dt@kernel.org, mark.rutland@arm.com, gregkh@linuxfoundation.org, atull@kernel.org, "Moritz Fischer" <mdf@kernel.org>, "Michal Simek" <michal.simek@xilinx.com>, "Sören Brinkmann" <soren.brinkmann@xilinx.com>, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v4 1/2] doc: Add bindings document for Xilinx LogiCore PR Decoupler Date: Thu, 23 Mar 2017 22:43:35 -0700 [thread overview] Message-ID: <1490334216-31068-1-git-send-email-mdf@kernel.org> (raw) This adds the binding documentation for the Xilinx LogiCORE PR Decoupler soft core. Signed-off-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Alan Tull <atull@kernel.org> Cc: Sören Brinkmann <soren.brinkmann@xilinx.com> Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org --- Changes from v3: - Addressed Michal's comments - Addressed Alan's Comments - Added Alan's Acked-by Changes from v2: - Added refence to generic fpga-region bindings - Fixed up reg property in example - Added fallback to "xlnx,pr-decoupler" without version Changes from v1: - Added clock names & clock to example - Merged some of the description from Michal's version --- .../bindings/fpga/xilinx-pr-decoupler.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt diff --git a/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt b/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt new file mode 100644 index 0000000..2c527ac --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt @@ -0,0 +1,35 @@ +Xilinx LogiCORE Partial Reconfig Decoupler Softcore + +The Xilinx LogiCORE Partial Reconfig Decoupler manages one or more +decouplers / fpga bridges. +The controller can decouple/disable the bridges which prevents signal +changes from passing through the bridge. The controller can also +couple / enable the bridges which allows traffic to pass through the +bridge normally. + +The Driver supports only MMIO handling. A PR region can have multiple +PR Decouplers which can be handled independently or chained via decouple/ +decouple_status signals. + +Required properties: +- compatible : Should contain "xlnx,pr-decoupler-1.00" or "xlnx,pr-decoupler" +- regs : base address and size for decoupler module +- clocks : input clock to IP +- clock-names : should contain "aclk" + +Optional properties: +- bridge-enable : 0 if driver should disable bridge at startup + 1 if driver should enable bridge at startup + Default is to leave bridge in current state. + +See Documentation/devicetree/bindings/fpga/fpga-region.txt for generic bindings. + +Example: + fpga-bridge@100000450 { + compatible = "xlnx,pr-decoupler-1.00", + "xlnx-pr-decoupler"; + regs = <0x10000045 0x10>; + clocks = <&clkc 15>; + clock-names = "aclk"; + bridge-enable = <0>; + }; -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Moritz Fischer <mdf-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> To: linux-fpga-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org, atull-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, "Moritz Fischer" <mdf-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, "Michal Simek" <michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>, "Sören Brinkmann" <soren.brinkmann-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Subject: [PATCH v4 1/2] doc: Add bindings document for Xilinx LogiCore PR Decoupler Date: Thu, 23 Mar 2017 22:43:35 -0700 [thread overview] Message-ID: <1490334216-31068-1-git-send-email-mdf@kernel.org> (raw) This adds the binding documentation for the Xilinx LogiCORE PR Decoupler soft core. Signed-off-by: Moritz Fischer <mdf-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Signed-off-by: Michal Simek <michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org> Acked-by: Alan Tull <atull-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: Sören Brinkmann <soren.brinkmann-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org> Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org --- Changes from v3: - Addressed Michal's comments - Addressed Alan's Comments - Added Alan's Acked-by Changes from v2: - Added refence to generic fpga-region bindings - Fixed up reg property in example - Added fallback to "xlnx,pr-decoupler" without version Changes from v1: - Added clock names & clock to example - Merged some of the description from Michal's version --- .../bindings/fpga/xilinx-pr-decoupler.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt diff --git a/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt b/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt new file mode 100644 index 0000000..2c527ac --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt @@ -0,0 +1,35 @@ +Xilinx LogiCORE Partial Reconfig Decoupler Softcore + +The Xilinx LogiCORE Partial Reconfig Decoupler manages one or more +decouplers / fpga bridges. +The controller can decouple/disable the bridges which prevents signal +changes from passing through the bridge. The controller can also +couple / enable the bridges which allows traffic to pass through the +bridge normally. + +The Driver supports only MMIO handling. A PR region can have multiple +PR Decouplers which can be handled independently or chained via decouple/ +decouple_status signals. + +Required properties: +- compatible : Should contain "xlnx,pr-decoupler-1.00" or "xlnx,pr-decoupler" +- regs : base address and size for decoupler module +- clocks : input clock to IP +- clock-names : should contain "aclk" + +Optional properties: +- bridge-enable : 0 if driver should disable bridge at startup + 1 if driver should enable bridge at startup + Default is to leave bridge in current state. + +See Documentation/devicetree/bindings/fpga/fpga-region.txt for generic bindings. + +Example: + fpga-bridge@100000450 { + compatible = "xlnx,pr-decoupler-1.00", + "xlnx-pr-decoupler"; + regs = <0x10000045 0x10>; + clocks = <&clkc 15>; + clock-names = "aclk"; + bridge-enable = <0>; + }; -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
next reply other threads:[~2017-03-24 5:44 UTC|newest] Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-03-24 5:43 Moritz Fischer [this message] 2017-03-24 5:43 ` [PATCH v4 1/2] doc: Add bindings document for Xilinx LogiCore PR Decoupler Moritz Fischer 2017-03-24 5:43 ` [PATCH v4 2/2] fpga: Add support for Xilinx LogiCORE " Moritz Fischer 2017-03-24 5:43 ` Moritz Fischer 2017-03-24 15:23 ` Alan Tull
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