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From: Petre Pircalabu <ppircalabu@bitdefender.com>
To: xen-devel@lists.xen.org
Cc: Petre Pircalabu <ppircalabu@bitdefender.com>,
	tamas@tklengyel.com, wei.liu2@citrix.com,
	rcojocaru@bitdefender.com, andrew.cooper3@citrix.com,
	ian.jackson@eu.citrix.com, jbeulich@suse.com
Subject: [PATCH 1/2] x86/monitor: add masking support for write_ctrlreg events
Date: Fri, 26 May 2017 16:41:57 +0300	[thread overview]
Message-ID: <1495806118-12223-2-git-send-email-ppircalabu@bitdefender.com> (raw)
In-Reply-To: <1495806118-12223-1-git-send-email-ppircalabu@bitdefender.com>

Add support for filtering out the write_ctrlreg monitor events if they
are generated only by changing certains bits.
A new parameter (bitmask) was added to the xc_monitor_write_ctrlreg
function in order to mask the event generation if the changed bits are
set.

Signed-off-by: Petre Pircalabu <ppircalabu@bitdefender.com>
---
 tools/libxc/include/xenctrl.h | 2 +-
 tools/libxc/xc_monitor.c      | 3 ++-
 xen/arch/x86/hvm/monitor.c    | 3 ++-
 xen/arch/x86/monitor.c        | 6 ++++++
 xen/include/asm-x86/domain.h  | 1 +
 xen/include/public/domctl.h   | 6 +++++-
 xen/include/public/vm_event.h | 9 +++++++++
 7 files changed, 26 insertions(+), 4 deletions(-)

diff --git a/tools/libxc/include/xenctrl.h b/tools/libxc/include/xenctrl.h
index 1629f41..8c26cb4 100644
--- a/tools/libxc/include/xenctrl.h
+++ b/tools/libxc/include/xenctrl.h
@@ -1999,7 +1999,7 @@ int xc_monitor_get_capabilities(xc_interface *xch, domid_t domain_id,
                                 uint32_t *capabilities);
 int xc_monitor_write_ctrlreg(xc_interface *xch, domid_t domain_id,
                              uint16_t index, bool enable, bool sync,
-                             bool onchangeonly);
+                             uint64_t bitmask, bool onchangeonly);
 /*
  * A list of MSR indices can usually be found in /usr/include/asm/msr-index.h.
  * Please consult the Intel/AMD manuals for more information on
diff --git a/tools/libxc/xc_monitor.c b/tools/libxc/xc_monitor.c
index f99b6e3..70648d7 100644
--- a/tools/libxc/xc_monitor.c
+++ b/tools/libxc/xc_monitor.c
@@ -70,7 +70,7 @@ int xc_monitor_get_capabilities(xc_interface *xch, domid_t domain_id,
 
 int xc_monitor_write_ctrlreg(xc_interface *xch, domid_t domain_id,
                              uint16_t index, bool enable, bool sync,
-                             bool onchangeonly)
+                             uint64_t bitmask, bool onchangeonly)
 {
     DECLARE_DOMCTL;
 
@@ -82,6 +82,7 @@ int xc_monitor_write_ctrlreg(xc_interface *xch, domid_t domain_id,
     domctl.u.monitor_op.u.mov_to_cr.index = index;
     domctl.u.monitor_op.u.mov_to_cr.sync = sync;
     domctl.u.monitor_op.u.mov_to_cr.onchangeonly = onchangeonly;
+    domctl.u.monitor_op.u.mov_to_cr.bitmask = bitmask;
 
     return do_domctl(xch, &domctl);
 }
diff --git a/xen/arch/x86/hvm/monitor.c b/xen/arch/x86/hvm/monitor.c
index bde5fd0..a7ccfc4 100644
--- a/xen/arch/x86/hvm/monitor.c
+++ b/xen/arch/x86/hvm/monitor.c
@@ -38,7 +38,8 @@ bool_t hvm_monitor_cr(unsigned int index, unsigned long value, unsigned long old
 
     if ( (ad->monitor.write_ctrlreg_enabled & ctrlreg_bitmask) &&
          (!(ad->monitor.write_ctrlreg_onchangeonly & ctrlreg_bitmask) ||
-          value != old) )
+          value != old) &&
+         (!((value ^ old) & ad->monitor.write_ctrlreg_mask[index])) )
     {
         bool_t sync = !!(ad->monitor.write_ctrlreg_sync & ctrlreg_bitmask);
 
diff --git a/xen/arch/x86/monitor.c b/xen/arch/x86/monitor.c
index 449c64c..d02d2ea 100644
--- a/xen/arch/x86/monitor.c
+++ b/xen/arch/x86/monitor.c
@@ -155,9 +155,15 @@ int arch_monitor_domctl_event(struct domain *d,
             ad->monitor.write_ctrlreg_onchangeonly &= ~ctrlreg_bitmask;
 
         if ( requested_status )
+        {
+            ad->monitor.write_ctrlreg_mask[mop->u.mov_to_cr.index] = mop->u.mov_to_cr.bitmask;
             ad->monitor.write_ctrlreg_enabled |= ctrlreg_bitmask;
+        }
         else
+        {
+            ad->monitor.write_ctrlreg_mask[mop->u.mov_to_cr.index] = 0;
             ad->monitor.write_ctrlreg_enabled &= ~ctrlreg_bitmask;
+        }
 
         if ( VM_EVENT_X86_CR3 == mop->u.mov_to_cr.index )
         {
diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h
index 924caac..27d80ee 100644
--- a/xen/include/asm-x86/domain.h
+++ b/xen/include/asm-x86/domain.h
@@ -406,6 +406,7 @@ struct arch_domain
         unsigned int cpuid_enabled               : 1;
         unsigned int descriptor_access_enabled   : 1;
         struct monitor_msr_bitmap *msr_bitmap;
+        uint64_t write_ctrlreg_mask[4];
     } monitor;
 
     /* Mem_access emulation control */
diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h
index e6cf211..2bf5c5b 100644
--- a/xen/include/public/domctl.h
+++ b/xen/include/public/domctl.h
@@ -37,7 +37,7 @@
 #include "hvm/save.h"
 #include "memory.h"
 
-#define XEN_DOMCTL_INTERFACE_VERSION 0x0000000d
+#define XEN_DOMCTL_INTERFACE_VERSION 0x0000000e
 
 /*
  * NB. xen_domctl.domain is an IN/OUT parameter for this operation.
@@ -1107,6 +1107,10 @@ struct xen_domctl_monitor_op {
             uint8_t sync;
             /* Send event only on a change of value */
             uint8_t onchangeonly;
+            /* Send event only if the changed bit in the control register
+             * is not masked
+             */
+            unsigned long bitmask;
         } mov_to_cr;
 
         struct {
diff --git a/xen/include/public/vm_event.h b/xen/include/public/vm_event.h
index f01e471..8a77d4d 100644
--- a/xen/include/public/vm_event.h
+++ b/xen/include/public/vm_event.h
@@ -155,6 +155,15 @@
 #define VM_EVENT_X86_CR4    2
 #define VM_EVENT_X86_XCR0   3
 
+/* vm_event_write_ctrlreg default bit mask
+ * If the changed bit in the control register is masked the event is
+ * not triggered
+ */
+#define VM_EVENT_X86_CR0_DEFAULT_MASK	        0x00000000
+#define VM_EVENT_X86_CR3_DEFAULT_MASK	        0x00000000
+#define VM_EVENT_X86_CR4_DEFAULT_MASK	        0x00000080
+#define VM_EVENT_X86_XCR0_DEFAULT_MASK	        0x00000000
+
 /*
  * Using custom vCPU structs (i.e. not hvm_hw_cpu) for both x86 and ARM
  * so as to not fill the vm_event ring buffer too quickly.
-- 
2.7.4


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  reply	other threads:[~2017-05-26 13:41 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-26 13:41 write_ctrlreg event masking Petre Pircalabu
2017-05-26 13:41 ` Petre Pircalabu [this message]
2017-05-29 15:01   ` [PATCH 1/2] x86/monitor: add masking support for write_ctrlreg events Jan Beulich
2017-05-30  9:38     ` Petre PIRCALABU
2017-05-26 13:41 ` [PATCH 2/2] xen-access: write_ctrlreg_c4 test Petre Pircalabu
2017-05-30  9:46 ` write_ctrlreg event masking Petre Pircalabu
2017-05-30  9:46   ` [PATCH v2 1/2] x86/monitor: add masking support for write_ctrlreg events Petre Pircalabu
2017-06-16 14:26     ` Tamas K Lengyel
2017-06-16 15:15       ` Jan Beulich
2017-06-16 15:28         ` Tamas K Lengyel
2017-06-16 15:33           ` Jan Beulich
2017-06-16 16:24             ` Tamas K Lengyel
2017-05-30  9:46   ` [PATCH v2 2/2] xen-access: write_ctrlreg_c4 test Petre Pircalabu
2017-06-16 14:32     ` Tamas K Lengyel
2017-06-16 15:12       ` Jan Beulich
2017-06-16 15:24         ` Tamas K Lengyel
2017-06-16 14:09   ` write_ctrlreg event masking Petre Ovidiu PIRCALABU
2017-06-16 19:20   ` [PATCH v3 0/2] " Petre Pircalabu
2017-06-16 19:20     ` [PATCH v3 1/2] x86/monitor: add masking support for write_ctrlreg events Petre Pircalabu
2017-06-16 19:20     ` [PATCH v3 2/2] xen-access: write_ctrlreg_c4 test Petre Pircalabu
2017-06-16 19:45       ` Razvan Cojocaru
2017-06-19 12:24   ` [PATCH v4 0/2] write_ctrlreg event masking Petre Pircalabu
2017-06-19 12:24     ` [PATCH v4 1/2] x86/monitor: add masking support for write_ctrlreg events Petre Pircalabu
2017-06-20 12:42       ` Wei Liu
2017-06-21 13:58       ` Wei Liu
2017-06-21 14:11         ` Tamas K Lengyel
2017-06-21 14:13         ` Razvan Cojocaru
2017-06-21 14:19           ` Wei Liu
2017-06-19 12:24     ` [PATCH v4 2/2] xen-access: write_ctrlreg_c4 test Petre Pircalabu
2017-06-19 14:51       ` Tamas K Lengyel

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