All of lore.kernel.org
 help / color / mirror / Atom feed
From: Vidya Srinivas <vidya.srinivas@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Ben Widawsky <ben@bwidawsk.net>
Subject: [PATCH 1/8] drm/i915: Implement .get_format_info() hook for CCS
Date: Tue, 20 Jun 2017 11:40:27 +0530	[thread overview]
Message-ID: <1497939034-5234-2-git-send-email-vidya.srinivas@intel.com> (raw)
In-Reply-To: <1497939034-5234-1-git-send-email-vidya.srinivas@intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

SKL+ display engine can scan out certain kinds of compressed surfaces
produced by the render engine. This involved telling the display engine
the location of the color control surfae (CCS) which describes which
parts of the main surface are compressed and which are not. The location
of CCS is provided by userspace as just another plane with its own offset.

By providing our own format information for the CCS formats, we should
be able to make framebuffer_check() do the right thing for the CCS
surface as well.

Note that we'll return the same format info for both Y and Yf tiled
format as that's what happens with the non-CCS Y vs. Yf as well. If
desired, we could potentially return a unique pointer for each
pixel_format+tiling+ccs combination, in which case we immediately be
able to tell if any of that stuff changed by just comparing the
pointers. But that does sound a bit wasteful space wise.

v2: Drop the 'dev' argument from the hook
	v3: Include the description of the CCS surface layout
v4: Pretend CCS tiles are regular 128 byte wide Y tiles (Jason)

Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net> (v3)
Signed-off-by: Ville Syrjä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/drm_fourcc.c         |  2 +-
 drivers/gpu/drm/i915/intel_display.c | 37 ++++++++++++++++++++++++++++++++++++
 include/drm/drm_mode_config.h        |  3 ++-
 include/uapi/drm/drm_fourcc.h        |  3 +++
 4 files changed, 43 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
index 9c0152d..50da618 100644
--- a/drivers/gpu/drm/drm_fourcc.c
+++ b/drivers/gpu/drm/drm_fourcc.c
@@ -222,7 +222,7 @@ const struct drm_format_info *drm_format_info(u32 format)
 	const struct drm_format_info *info = NULL;
 
 	if (dev->mode_config.funcs->get_format_info)
-		info = dev->mode_config.funcs->get_format_info(mode_cmd);
+		info = dev->mode_config.funcs->get_format_info(dev, mode_cmd);
 
 	if (!info)
 		info = drm_format_info(mode_cmd->pixel_format);
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index dec9e58..80d09d6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2433,6 +2433,42 @@ static unsigned int intel_fb_modifier_to_tiling(uint64_t fb_modifier)
 	}
 }
 
+static const struct drm_format_info ccs_formats[] = {
+	{ .format = DRM_FORMAT_XRGB8888, .depth = 24, .num_planes = 2, .cpp = { 4, 1, }, .hsub = 16, .vsub = 8, },
+	{ .format = DRM_FORMAT_XBGR8888, .depth = 24, .num_planes = 2, .cpp = { 4, 1, }, .hsub = 16, .vsub = 8, },
+	{ .format = DRM_FORMAT_ARGB8888, .depth = 32, .num_planes = 2, .cpp = { 4, 1, }, .hsub = 16, .vsub = 8, },
+	{ .format = DRM_FORMAT_ABGR8888, .depth = 32, .num_planes = 2, .cpp = { 4, 1, }, .hsub = 16, .vsub = 8, },
+};
+
+static const struct drm_format_info *
+lookup_format_info(const struct drm_format_info formats[],
+		   int num_formats, u32 format)
+{
+	int i;
+
+	for (i = 0; i < num_formats; i++) {
+		if (formats[i].format == format)
+			return &formats[i];
+	}
+
+	return NULL;
+}
+
+static const struct drm_format_info *
+intel_get_format_info(struct drm_device *dev,
+		      const struct drm_mode_fb_cmd2 *cmd)
+{
+	switch (cmd->modifier[0]) {
+	case I915_FORMAT_MOD_Y_TILED_CCS:
+	case I915_FORMAT_MOD_Yf_TILED_CCS:
+		return lookup_format_info(ccs_formats,
+					  ARRAY_SIZE(ccs_formats),
+					  cmd->pixel_format);
+	default:
+		return NULL;
+	}
+}
+
 static int
 intel_fill_fb_info(struct drm_i915_private *dev_priv,
 		   struct drm_framebuffer *fb)
@@ -14607,6 +14643,7 @@ static void intel_atomic_state_free(struct drm_atomic_state *state)
 
 static const struct drm_mode_config_funcs intel_mode_funcs = {
 	.fb_create = intel_user_framebuffer_create,
+	.get_format_info = intel_get_format_info,
 	.output_poll_changed = intel_fbdev_output_poll_changed,
 	.atomic_check = intel_atomic_check,
 	.atomic_commit = intel_atomic_commit,
diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
index 4298171..f0d3d38 100644
--- a/include/drm/drm_mode_config.h
+++ b/include/drm/drm_mode_config.h
@@ -81,7 +81,8 @@ struct drm_mode_config_funcs {
 	 * The format information specific to the given fb metadata, or
 	 * NULL if none is found.
 	 */
-	const struct drm_format_info *(*get_format_info)(const struct drm_mode_fb_cmd2 *mode_cmd);
+	const struct drm_format_info *(*get_format_info)(struct drm_device *dev,
+		const struct drm_mode_fb_cmd2 *mode_cmd);
 
 	/**
 	 * @output_poll_changed:
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 7586c46..ee59109 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -252,6 +252,9 @@
  */
 #define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3)
 
+#define I915_FORMAT_MOD_Y_TILED_CCS	fourcc_mod_code(INTEL, 4)
+#define I915_FORMAT_MOD_Yf_TILED_CCS	fourcc_mod_code(INTEL, 5)
+
 /*
  * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
  *
-- 
1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2017-06-20  6:03 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-20  6:10 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas
2017-06-20  6:10 ` Vidya Srinivas [this message]
2017-06-20  6:10 ` [PATCH 2/8] drm/i915: Add render decompression support Vidya Srinivas
2017-06-20  6:10 ` [PATCH 3/8] drm/i915: Set scaler mode for NV12 Vidya Srinivas
2017-07-06 22:30   ` Clint Taylor
2017-06-20  6:10 ` [PATCH 4/8] drm/i915: Update format_is_yuv() to include NV12 Vidya Srinivas
2017-07-06 22:33   ` Clint Taylor
2017-06-20  6:10 ` [PATCH 5/8] drm/i915: Upscale scaler max scale for NV12 Vidya Srinivas
2017-07-06 22:37   ` Clint Taylor
2017-06-20  6:10 ` [PATCH 6/8] drm/i915: Add NV12 as supported format for primary plane Vidya Srinivas
2017-07-06 22:41   ` Clint Taylor
2017-06-20  6:10 ` [PATCH 7/8] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas
2017-07-06 22:50   ` Clint Taylor
2017-07-07  5:11     ` Srinivas, Vidya
2017-06-20  6:10 ` [PATCH 8/8] drm/i915: Add NV12 support to intel_framebuffer_init Vidya Srinivas
2017-07-06 22:55   ` Clint Taylor
2017-07-07  5:10     ` Srinivas, Vidya
2017-06-20  6:23 ` ✓ Fi.CI.BAT: success for Adding NV12 support for SKL display (rev2) Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2017-07-31  7:04 [PATCH 0/8] Adding NV12 support Vidya Srinivas
2017-07-31  7:04 ` [PATCH 1/8] drm/i915: Implement .get_format_info() hook for CCS Vidya Srinivas
2017-08-02 21:26   ` Jason Ekstrand
2017-07-24  4:27 [PATCH 0/8] Adding NV12 support for BXT display Vidya Srinivas
2017-07-24  4:27 ` [PATCH 1/8] drm/i915: Implement .get_format_info() hook for CCS Vidya Srinivas
2017-07-11 14:10 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas
2017-07-11 14:10 ` [PATCH 1/8] drm/i915: Implement .get_format_info() hook for CCS Vidya Srinivas
2017-07-10  6:53 [PATCH 0/8] Adding NV12 support for SKL display Vidya Srinivas
2017-07-10  6:53 ` [PATCH 1/8] drm/i915: Implement .get_format_info() hook for CCS Vidya Srinivas
2017-07-14 23:16   ` Jason Ekstrand
2017-06-07  4:51 [PATCH 00/11] Adding NV12 support for SKL display Vidya Srinivas
2017-06-07 11:40 ` [PATCH 0/8] " Vidya Srinivas
2017-06-07 11:40   ` [PATCH 1/8] drm/i915: Implement .get_format_info() hook for CCS Vidya Srinivas
2017-06-07 11:44     ` Daniel Stone
2017-06-07 12:53       ` Ville Syrjälä
2017-06-07 14:24         ` Daniel Stone
2017-06-07 15:33           ` Ville Syrjälä
2017-06-07 15:48             ` Daniel Stone
2017-06-07 16:28               ` Ville Syrjälä
2017-06-07 17:14                 ` Daniel Stone

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1497939034-5234-2-git-send-email-vidya.srinivas@intel.com \
    --to=vidya.srinivas@intel.com \
    --cc=ben@bwidawsk.net \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.