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From: Bard Liao <bardliao@realtek.com>
To: broonie@kernel.org, lgirdwood@gmail.com
Cc: oder_chiou@realtek.com, jack.yu@realtek.com,
	alsa-devel@alsa-project.org, lars@metafoo.de,
	shumingf@realtek.com, Bard Liao <bardliao@realtek.com>,
	zhongan@pinecone.net, flove@realtek.com
Subject: [PATCH] ASoC: rt5665: fix wrong register for bclk ratio control
Date: Tue, 1 Aug 2017 10:30:53 +0800	[thread overview]
Message-ID: <1501554653-29727-1-git-send-email-bardliao@realtek.com> (raw)

The register of setting back ratio should be RT5665_ADDA_CLK_2
instead of RT5665_ADDA_CLK_1.

Signed-off-by: Bard Liao <bardliao@realtek.com>
---
 sound/soc/codecs/rt5665.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sound/soc/codecs/rt5665.c b/sound/soc/codecs/rt5665.c
index d0a9490..db2e5b9 100644
--- a/sound/soc/codecs/rt5665.c
+++ b/sound/soc/codecs/rt5665.c
@@ -4411,12 +4411,12 @@ static int rt5665_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
 		switch (dai->id) {
 		case RT5665_AIF2_1:
 		case RT5665_AIF2_2:
-			snd_soc_update_bits(codec, RT5665_ADDA_CLK_1,
+			snd_soc_update_bits(codec, RT5665_ADDA_CLK_2,
 				RT5665_I2S_BCLK_MS2_MASK,
 				RT5665_I2S_BCLK_MS2_64);
 			break;
 		case RT5665_AIF3:
-			snd_soc_update_bits(codec, RT5665_ADDA_CLK_1,
+			snd_soc_update_bits(codec, RT5665_ADDA_CLK_2,
 				RT5665_I2S_BCLK_MS3_MASK,
 				RT5665_I2S_BCLK_MS3_64);
 			break;
-- 
2.7.4

             reply	other threads:[~2017-08-01  2:31 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-01  2:30 Bard Liao [this message]
2017-08-01 14:16 ` Applied "ASoC: rt5665: fix wrong register for bclk ratio control" to the asoc tree Mark Brown

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