All of lore.kernel.org
 help / color / mirror / Atom feed
From: mathieu.poirier@linaro.org (Mathieu Poirier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 09/26] coresight: etm4x: Adds trace return stack option programming for ETMv4.
Date: Wed,  2 Aug 2017 10:22:03 -0600	[thread overview]
Message-ID: <1501690940-4137-10-git-send-email-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <1501690940-4137-1-git-send-email-mathieu.poirier@linaro.org>

From: Mike Leach <mike.leach@linaro.org>

Adds handling to program the return stack option into ETMv4 hardware if
specified in the perf command line.

If option is not supported by the hardware then it will be ignored.
This allows capture to move between core/ETM combinations that have the
hardware support to those that do not.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 drivers/hwtracing/coresight/coresight-etm4x.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index 532adc9dd32a..ac77b4c973d8 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -224,6 +224,10 @@ static int etm4_parse_event_config(struct etmv4_drvdata *drvdata,
 	if (attr->config & BIT(ETM_OPT_TS))
 		/* bit[11], Global timestamp tracing bit */
 		config->cfg |= BIT(11);
+	/* return stack - enable if selected and supported */
+	if ((attr->config & BIT(ETM_OPT_RETSTK)) && drvdata->retstack)
+		/* bit[12], Return stack enable bit */
+		config->cfg |= BIT(12);
 
 out:
 	return ret;
-- 
2.7.4

  parent reply	other threads:[~2017-08-02 16:22 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-02 16:21 [PATCH 00/26] coresight: next v4.13-rc3 Mathieu Poirier
2017-08-02 16:21 ` [PATCH 01/26] coresight: Correct buffer lost increment Mathieu Poirier
2017-08-02 16:21 ` [PATCH 02/26] coresight: etb10: Remove useless conversion to LE Mathieu Poirier
2017-08-02 16:21 ` [PATCH 03/26] coresight: Add barrier packet for synchronisation Mathieu Poirier
2017-08-02 16:21 ` [PATCH 04/26] coresight: etb10: Move etb_disable_hw() outside of lock Mathieu Poirier
2017-08-02 16:21 ` [PATCH 05/26] coresight: etm3x: Set synchronisation frequencty to TRM default Mathieu Poirier
2017-08-02 16:22 ` [PATCH 06/26] hwtracing: coresight: constify attribute_group structures Mathieu Poirier
2017-08-02 16:22 ` [PATCH 07/26] coresight: pmu: Adds return stack option to perf coresight pmu Mathieu Poirier
2017-08-02 16:22 ` [PATCH 08/26] coresight: ptm: Adds trace return stack option programming for PTM Mathieu Poirier
2017-08-02 16:22 ` Mathieu Poirier [this message]
2017-08-02 16:22 ` [PATCH 10/26] coresight replicator: Cleanup programmable replicator naming Mathieu Poirier
2017-08-02 16:22 ` [PATCH 11/26] coresight: Add support for reading 64bit registers Mathieu Poirier
2017-08-02 16:22 ` [PATCH 12/26] coresight: Use the new helper for defining registers Mathieu Poirier
2017-08-02 16:22 ` [PATCH 13/26] coresight tmc: Add helpers for accessing 64bit registers Mathieu Poirier
2017-08-02 16:22 ` [PATCH 14/26] coresight tmc: Expose DBA and AXICTL Mathieu Poirier
2017-08-02 16:22 ` [PATCH 15/26] coresight replicator: Expose replicator management registers Mathieu Poirier
2017-08-02 16:22 ` [PATCH 16/26] coresight tmc: Handle configuration types properly Mathieu Poirier
2017-08-02 16:22 ` [PATCH 17/26] coresight tmc etr: Add capabilitiy information Mathieu Poirier
2017-08-02 16:22 ` [PATCH 18/26] coresight tmc: Detect support for scatter gather Mathieu Poirier
2017-08-02 16:22 ` [PATCH 19/26] coresight tmc etr: Detect address width at runtime Mathieu Poirier
2017-08-02 16:22 ` [PATCH 20/26] coresight tmc etr: Cleanup AXICTL register handling Mathieu Poirier
2017-08-02 16:22 ` [PATCH 21/26] coresight tmc etr: Setup AXI cache encoding for read transfers Mathieu Poirier
2017-08-02 16:22 ` [PATCH 22/26] coresight tmc: Support for save-restore in ETR Mathieu Poirier
2017-08-02 16:22 ` [PATCH 23/26] coresight tmc: Add support for Coresight SoC 600 TMC Mathieu Poirier
2017-08-02 16:22 ` [PATCH 24/26] coresight: Add support for Coresight SoC 600 components Mathieu Poirier
2017-08-02 16:22 ` [PATCH 25/26] perf: cs-etm: Fix ETMv4 CONFIGR entry in perf.data file Mathieu Poirier
2017-08-02 16:22 ` [PATCH 26/26] coresight: STM: Clean up __iomem type usage Mathieu Poirier
2017-08-28 14:07 ` [PATCH 00/26] coresight: next v4.13-rc3 Greg KH

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1501690940-4137-10-git-send-email-mathieu.poirier@linaro.org \
    --to=mathieu.poirier@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.