All of lore.kernel.org
 help / color / mirror / Atom feed
From: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
To: xen-devel@lists.xen.org
Cc: Julien Grall <julien.grall@arm.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Subject: [PATCH v2 1/4] arm: processor: rename iss to res0 in hsr_cond union
Date: Wed,  9 Aug 2017 22:44:27 +0300	[thread overview]
Message-ID: <1502307870-11317-2-git-send-email-volodymyr_babchuk@epam.com> (raw)
In-Reply-To: <1502307870-11317-1-git-send-email-volodymyr_babchuk@epam.com>

Name "iss" in this case was used not exactly correctly, because this
is only part of HSR.ISS field. ARM refence manual denotes this
part of ISS as RES0 when it describes encoding for conditional
exceptions (ARM DDI 0487A.k pages D7-1939 - D7-1949).

Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
---

- Added reference to ARM archtecture manual in the commit message.

---
 xen/include/asm-arm/processor.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index 855ded1..f640d54 100644
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm-arm/processor.h
@@ -434,7 +434,7 @@ union hsr {
 
     /* Common to all conditional exception classes (0x0N, except 0x00). */
     struct hsr_cond {
-        unsigned long iss:20;  /* Instruction Specific Syndrome */
+        unsigned long res0:20;  /* Reserved */
         unsigned long cc:4;    /* Condition Code */
         unsigned long ccvalid:1;/* CC Valid */
         unsigned long len:1;   /* Instruction length */
-- 
2.7.4


_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel

  reply	other threads:[~2017-08-09 19:44 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-09 19:44 [PATCH v2 0/4] arm: allign check_conditional_instr() with ARMv8 Volodymyr Babchuk
2017-08-09 19:44 ` Volodymyr Babchuk [this message]
2017-08-09 20:25   ` [PATCH v2 1/4] arm: processor: rename iss to res0 in hsr_cond union Julien Grall
2017-08-09 19:44 ` [PATCH v2 2/4] arm: processor: add new struct hsr_smc32 into hsr union Volodymyr Babchuk
2017-08-09 20:34   ` Julien Grall
2017-08-09 21:06     ` Volodymyr Babchuk
2017-08-09 21:22       ` Julien Grall
2017-08-11 13:26         ` Volodymyr Babchuk
2017-08-11 13:43           ` Julien Grall
2017-08-09 19:44 ` [PATCH v2 3/4] arm: traps: handle unknown exceptions in check_conditional_instr() Volodymyr Babchuk
2017-08-09 20:36   ` Julien Grall
2017-08-09 19:44 ` [PATCH v2 4/4] arm: traps: handle SMC32 " Volodymyr Babchuk
2017-08-09 20:42   ` Julien Grall

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1502307870-11317-2-git-send-email-volodymyr_babchuk@epam.com \
    --to=volodymyr_babchuk@epam.com \
    --cc=julien.grall@arm.com \
    --cc=sstabellini@kernel.org \
    --cc=xen-devel@lists.xen.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.