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From: Huibin Hong <huibin.hong@rock-chips.com>
To: heiko@sntech.de
Cc: huangtao@rock-chips.com, Huibin Hong <huibin.hong@rock-chips.com>,
	Mark Brown <broonie@kernel.org>,
	linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH] spi: rockchip: configure CTRLR1 according to size and data frame
Date: Wed, 16 Aug 2017 10:12:02 +0800	[thread overview]
Message-ID: <1502849522-10073-1-git-send-email-huibin.hong@rock-chips.com> (raw)

CTRLR1 is number of data frames, when rx only.
When data frame is 8 bit, CTRLR1 is len-1.
When data frame is 16 bit, CTRLR1 is (len/2)-1.

Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
---

 drivers/spi/spi-rockchip.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
index 0b4a52b..6b1bac8 100644
--- a/drivers/spi/spi-rockchip.c
+++ b/drivers/spi/spi-rockchip.c
@@ -568,7 +568,13 @@ static void rockchip_spi_config(struct rockchip_spi *rs)
 
 	writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0);
 
-	writel_relaxed(rs->len - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
+	if (rs->n_bytes == 1)
+		writel_relaxed(rs->len - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
+	else if (rs->n_bytes == 2)
+		writel_relaxed((rs->len / 2) - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
+	else
+		writel_relaxed((rs->len * 2) - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
+
 	writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_TXFTLR);
 	writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR);
 
-- 
1.9.1

WARNING: multiple messages have this Message-ID (diff)
From: Huibin Hong <huibin.hong-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
To: heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org
Cc: huangtao-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
	Huibin Hong <huibin.hong-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
	Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: [PATCH] spi: rockchip: configure CTRLR1 according to size and data frame
Date: Wed, 16 Aug 2017 10:12:02 +0800	[thread overview]
Message-ID: <1502849522-10073-1-git-send-email-huibin.hong@rock-chips.com> (raw)

CTRLR1 is number of data frames, when rx only.
When data frame is 8 bit, CTRLR1 is len-1.
When data frame is 16 bit, CTRLR1 is (len/2)-1.

Signed-off-by: Huibin Hong <huibin.hong-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---

 drivers/spi/spi-rockchip.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
index 0b4a52b..6b1bac8 100644
--- a/drivers/spi/spi-rockchip.c
+++ b/drivers/spi/spi-rockchip.c
@@ -568,7 +568,13 @@ static void rockchip_spi_config(struct rockchip_spi *rs)
 
 	writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0);
 
-	writel_relaxed(rs->len - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
+	if (rs->n_bytes == 1)
+		writel_relaxed(rs->len - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
+	else if (rs->n_bytes == 2)
+		writel_relaxed((rs->len / 2) - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
+	else
+		writel_relaxed((rs->len * 2) - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
+
 	writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_TXFTLR);
 	writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR);
 
-- 
1.9.1


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WARNING: multiple messages have this Message-ID (diff)
From: huibin.hong@rock-chips.com (Huibin Hong)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] spi: rockchip: configure CTRLR1 according to size and data frame
Date: Wed, 16 Aug 2017 10:12:02 +0800	[thread overview]
Message-ID: <1502849522-10073-1-git-send-email-huibin.hong@rock-chips.com> (raw)

CTRLR1 is number of data frames, when rx only.
When data frame is 8 bit, CTRLR1 is len-1.
When data frame is 16 bit, CTRLR1 is (len/2)-1.

Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
---

 drivers/spi/spi-rockchip.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
index 0b4a52b..6b1bac8 100644
--- a/drivers/spi/spi-rockchip.c
+++ b/drivers/spi/spi-rockchip.c
@@ -568,7 +568,13 @@ static void rockchip_spi_config(struct rockchip_spi *rs)
 
 	writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0);
 
-	writel_relaxed(rs->len - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
+	if (rs->n_bytes == 1)
+		writel_relaxed(rs->len - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
+	else if (rs->n_bytes == 2)
+		writel_relaxed((rs->len / 2) - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
+	else
+		writel_relaxed((rs->len * 2) - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
+
 	writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_TXFTLR);
 	writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR);
 
-- 
1.9.1

             reply	other threads:[~2017-08-16  2:13 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-16  2:12 Huibin Hong [this message]
2017-08-16  2:12 ` [PATCH] spi: rockchip: configure CTRLR1 according to size and data frame Huibin Hong
2017-08-16  2:12 ` Huibin Hong
2017-08-16 11:21 ` Applied "spi: rockchip: configure CTRLR1 according to size and data frame" to the spi tree Mark Brown
2017-08-16 11:21   ` Mark Brown
2017-08-16 11:21   ` Mark Brown
2017-08-16 11:21   ` Mark Brown
2017-08-16 12:16 ` [PATCH] spi: rockchip: configure CTRLR1 according to size and data frame Geert Uytterhoeven
2017-08-16 12:16   ` Geert Uytterhoeven
2017-08-16 12:16   ` Geert Uytterhoeven

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