From: Jacopo Mondi <jacopo+renesas@jmondi.org> To: horms@verge.net.au, geert@linux-m68k.org, magnus.damm@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk Cc: Jacopo Mondi <jacopo+renesas@jmondi.org>, Chris.Brandt@renesas.com, andrew@lunn.ch, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] ARM: dts: gr-peach: Add ETHER pin group Date: Mon, 9 Oct 2017 10:48:34 +0200 [thread overview] Message-ID: <1507538915-16566-2-git-send-email-jacopo+renesas@jmondi.org> (raw) In-Reply-To: <1507538915-16566-1-git-send-email-jacopo+renesas@jmondi.org> Add pin configuration subnode for ETHER pin group. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> --- arch/arm/boot/dts/r7s72100-gr-peach.dts | 39 +++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts b/arch/arm/boot/dts/r7s72100-gr-peach.dts index ad6a627..990435c 100644 --- a/arch/arm/boot/dts/r7s72100-gr-peach.dts +++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts @@ -68,6 +68,28 @@ /* P6_2 as RxD2; P6_3 as TxD2 */ pinmux = <RZA1_PINMUX(6, 2, 7)>, <RZA1_PINMUX(6, 3, 7)>; }; + + ether_pins: ether { + /* Ethernet on Ports 1,3,5,10 */ + pinmux = <RZA1_PINMUX(1, 14, 4)>, /* P1_14 = ET_COL */ + <RZA1_PINMUX(3, 0, 2)>, /* P3_0 = ET_TXCLK */ + <RZA1_PINMUX(3, 3, 2)>, /* P3_3 = ET_MDIO */ + <RZA1_PINMUX(3, 4, 2)>, /* P3_4 = ET_RXCLK */ + <RZA1_PINMUX(3, 5, 2)>, /* P3_5 = ET_RXER */ + <RZA1_PINMUX(3, 6, 2)>, /* P3_6 = ET_RXDV */ + <RZA1_PINMUX(5, 9, 2)>, /* P5_9 = ET_MDC */ + <RZA1_PINMUX(10, 1, 4)>, /* P10_1 = ET_TXER */ + <RZA1_PINMUX(10, 2, 4)>, /* P10_2 = ET_TXEN */ + <RZA1_PINMUX(10, 3, 4)>, /* P10_3 = ET_CRS */ + <RZA1_PINMUX(10, 4, 4)>, /* P10_4 = ET_TXD0 */ + <RZA1_PINMUX(10, 5, 4)>, /* P10_5 = ET_TXD1 */ + <RZA1_PINMUX(10, 6, 4)>, /* P10_6 = ET_TXD2 */ + <RZA1_PINMUX(10, 7, 4)>, /* P10_7 = ET_TXD3 */ + <RZA1_PINMUX(10, 8, 4)>, /* P10_8 = ET_RXD0 */ + <RZA1_PINMUX(10, 9, 4)>, /* P10_9 = ET_RXD1 */ + <RZA1_PINMUX(10, 10, 4)>,/* P10_10 = ET_RXD2 */ + <RZA1_PINMUX(10, 11, 4)>;/* P10_11 = ET_RXD3 */ + }; }; &extal_clk { @@ -88,3 +110,20 @@ status = "okay"; }; + +ðer { + pinctrl-names = "default"; + pinctrl-0 = <ðer_pins>; + + status = "okay"; + + renesas,no-ether-link; + phy-handle = <&phy0>; + + phy0: ethernet-phy@0 { + reg = <0>; + + reset-gpios = <&port4 2 GPIO_ACTIVE_LOW>; + reset-delay-us = <5>; + }; +}; -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: jacopo+renesas@jmondi.org (Jacopo Mondi) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/2] ARM: dts: gr-peach: Add ETHER pin group Date: Mon, 9 Oct 2017 10:48:34 +0200 [thread overview] Message-ID: <1507538915-16566-2-git-send-email-jacopo+renesas@jmondi.org> (raw) In-Reply-To: <1507538915-16566-1-git-send-email-jacopo+renesas@jmondi.org> Add pin configuration subnode for ETHER pin group. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> --- arch/arm/boot/dts/r7s72100-gr-peach.dts | 39 +++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts b/arch/arm/boot/dts/r7s72100-gr-peach.dts index ad6a627..990435c 100644 --- a/arch/arm/boot/dts/r7s72100-gr-peach.dts +++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts @@ -68,6 +68,28 @@ /* P6_2 as RxD2; P6_3 as TxD2 */ pinmux = <RZA1_PINMUX(6, 2, 7)>, <RZA1_PINMUX(6, 3, 7)>; }; + + ether_pins: ether { + /* Ethernet on Ports 1,3,5,10 */ + pinmux = <RZA1_PINMUX(1, 14, 4)>, /* P1_14 = ET_COL */ + <RZA1_PINMUX(3, 0, 2)>, /* P3_0 = ET_TXCLK */ + <RZA1_PINMUX(3, 3, 2)>, /* P3_3 = ET_MDIO */ + <RZA1_PINMUX(3, 4, 2)>, /* P3_4 = ET_RXCLK */ + <RZA1_PINMUX(3, 5, 2)>, /* P3_5 = ET_RXER */ + <RZA1_PINMUX(3, 6, 2)>, /* P3_6 = ET_RXDV */ + <RZA1_PINMUX(5, 9, 2)>, /* P5_9 = ET_MDC */ + <RZA1_PINMUX(10, 1, 4)>, /* P10_1 = ET_TXER */ + <RZA1_PINMUX(10, 2, 4)>, /* P10_2 = ET_TXEN */ + <RZA1_PINMUX(10, 3, 4)>, /* P10_3 = ET_CRS */ + <RZA1_PINMUX(10, 4, 4)>, /* P10_4 = ET_TXD0 */ + <RZA1_PINMUX(10, 5, 4)>, /* P10_5 = ET_TXD1 */ + <RZA1_PINMUX(10, 6, 4)>, /* P10_6 = ET_TXD2 */ + <RZA1_PINMUX(10, 7, 4)>, /* P10_7 = ET_TXD3 */ + <RZA1_PINMUX(10, 8, 4)>, /* P10_8 = ET_RXD0 */ + <RZA1_PINMUX(10, 9, 4)>, /* P10_9 = ET_RXD1 */ + <RZA1_PINMUX(10, 10, 4)>,/* P10_10 = ET_RXD2 */ + <RZA1_PINMUX(10, 11, 4)>;/* P10_11 = ET_RXD3 */ + }; }; &extal_clk { @@ -88,3 +110,20 @@ status = "okay"; }; + +ðer { + pinctrl-names = "default"; + pinctrl-0 = <ðer_pins>; + + status = "okay"; + + renesas,no-ether-link; + phy-handle = <&phy0>; + + phy0: ethernet-phy at 0 { + reg = <0>; + + reset-gpios = <&port4 2 GPIO_ACTIVE_LOW>; + reset-delay-us = <5>; + }; +}; -- 2.7.4
next prev parent reply other threads:[~2017-10-09 8:49 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-10-09 8:48 [PATCH 0/2] ARM: dts: gr-peach: ETHER and OS Timers enable Jacopo Mondi 2017-10-09 8:48 ` Jacopo Mondi 2017-10-09 8:48 ` Jacopo Mondi [this message] 2017-10-09 8:48 ` [PATCH 1/2] ARM: dts: gr-peach: Add ETHER pin group Jacopo Mondi 2017-10-11 11:50 ` Geert Uytterhoeven 2017-10-11 11:50 ` Geert Uytterhoeven 2017-10-11 11:50 ` Geert Uytterhoeven 2017-10-12 11:51 ` Simon Horman 2017-10-12 11:51 ` Simon Horman 2017-10-12 11:51 ` Simon Horman 2017-10-12 11:51 ` Simon Horman 2017-10-09 8:48 ` [PATCH 2/2] ARM: dts: gr-peach: Enable ostm0 and ostm1 timers Jacopo Mondi 2017-10-09 8:48 ` Jacopo Mondi 2017-10-11 12:45 ` Geert Uytterhoeven 2017-10-11 12:45 ` Geert Uytterhoeven 2017-10-11 12:45 ` Geert Uytterhoeven
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1507538915-16566-2-git-send-email-jacopo+renesas@jmondi.org \ --to=jacopo+renesas@jmondi.org \ --cc=Chris.Brandt@renesas.com \ --cc=andrew@lunn.ch \ --cc=devicetree@vger.kernel.org \ --cc=geert@linux-m68k.org \ --cc=horms@verge.net.au \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-renesas-soc@vger.kernel.org \ --cc=linux@armlinux.org.uk \ --cc=magnus.damm@gmail.com \ --cc=mark.rutland@arm.com \ --cc=robh+dt@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.