From: Hyun Kwon <hyun.kwon@xilinx.com>
To: Daniel Vetter <daniel.vetter@intel.com>,
Jani Nikula <jani.nikula@linux.intel.com>,
Sean Paul <seanpaul@chromium.org>,
David Airlie <airlied@linux.ie>,
dri-devel@lists.freedesktop.org
Cc: Michal Simek <monstr@monstr.eu>, Hyun Kwon <hyun.kwon@xilinx.com>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Satish Kumar Nagireddy <satish.nagireddy.nagireddy@xilinx.com>,
Jeffrey Mouroux <jmouroux@xilinx.com>
Subject: [PATCH 2/3] uapi: drm: New fourcc codes needed by Xilinx Video IP
Date: Mon, 27 Nov 2017 18:27:32 -0800 [thread overview]
Message-ID: <1511836053-9489-3-git-send-email-hyun.kwon@xilinx.com> (raw)
In-Reply-To: <1511836053-9489-1-git-send-email-hyun.kwon@xilinx.com>
From: Jeffrey Mouroux <jmouroux@xilinx.com>
The Xilinx Video Mixer and Xilinx Video Framebuffer DMA IP
support video memory formats that are not represented in the
current DRM fourcc library. This patch adds those missing
fourcc codes.
Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com>
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
---
include/uapi/drm/drm_fourcc.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 3ad838d..83806d5 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -112,6 +112,13 @@ extern "C" {
#define DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
#define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
+#define DRM_FORMAT_VUY888 fourcc_code('V', 'U', '2', '4') /* [23:0] Cr:Cb:Y little endian */
+#define DRM_FORMAT_XVUY8888 fourcc_code('X', 'V', '2', '4') /* [31:0] x:Cr:Cb:Y 8:8:8:8 little endian */
+#define DRM_FORMAT_XVUY2101010 fourcc_code('X', 'V', '3', '0') /* [31:0] x:Cr:Cb:Y 2:10:10:10 little endian */
+
+/* Grey scale */
+#define DRM_FORMAT_Y8 fourcc_code('G', 'R', 'E', 'Y') /* 8-bit packed greyscale Y:Y:Y:Y 8:8:8:8 */
+#define DRM_FORMAT_Y10 fourcc_code('Y', '1', '0', ' ') /* 10-bit packed greyscale X:Y:Y:Y 2:10:10:10 */
/*
* 2 plane RGB + A
@@ -140,6 +147,8 @@ extern "C" {
#define DRM_FORMAT_NV61 fourcc_code('N', 'V', '6', '1') /* 2x1 subsampled Cb:Cr plane */
#define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */
#define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */
+#define DRM_FORMAT_XV15 fourcc_code('X', 'V', '1', '5') /* 2x2 subsampled Cr:Cb plane 2:10:10:10 */
+#define DRM_FORMAT_XV20 fourcc_code('X', 'V', '2', '0') /* 2x1 subsampled Cr:Cb plane 2:10:10:10 */
/*
* 3 plane YCbCr
--
2.7.4
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next prev parent reply other threads:[~2017-11-28 2:42 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-28 2:27 [PATCH 0/3] Adding new drm formats needed by Xilinx IPs Hyun Kwon
2017-11-28 2:27 ` [PATCH 1/3] drm: drm_fourcc: Add scaling and padding factor to drm_format_info Hyun Kwon
2017-12-11 14:02 ` Laurent Pinchart
2017-12-13 1:48 ` Hyun Kwon
2017-12-13 13:33 ` Ville Syrjälä
2017-11-28 2:27 ` Hyun Kwon [this message]
2017-11-28 14:43 ` [PATCH 2/3] uapi: drm: New fourcc codes needed by Xilinx Video IP Ville Syrjälä
2017-11-28 17:25 ` Hyun Kwon
2017-11-28 18:11 ` Ville Syrjälä
2017-11-28 18:33 ` Hyun Kwon
2017-12-11 14:08 ` Laurent Pinchart
2017-12-11 14:24 ` Ville Syrjälä
2017-12-11 14:58 ` Laurent Pinchart
2017-11-28 2:27 ` [PATCH 3/3] drm: fourcc: Update DRM Framework with new fourcc codes Hyun Kwon
2017-11-28 11:09 ` [PATCH 0/3] Adding new drm formats needed by Xilinx IPs Daniel Vetter
2017-11-28 15:02 ` Emil Velikov
2017-11-28 17:26 ` Hyun Kwon
2017-11-28 17:38 ` Emil Velikov
2017-11-28 18:09 ` Hyun Kwon
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