All of lore.kernel.org
 help / color / mirror / Atom feed
From: Sagar Arun Kamble <sagar.a.kamble@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v4 7/9] drm/i915/guc: Add client support to enable/disable GuC interrupts
Date: Fri,  5 Jan 2018 14:16:59 +0530	[thread overview]
Message-ID: <1515142021-24232-8-git-send-email-sagar.a.kamble@intel.com> (raw)
In-Reply-To: <1515142021-24232-1-git-send-email-sagar.a.kamble@intel.com>

This patch adds support to enable/disable GuC interrupts for different
features without impacting other's need. Currently GuC log capture and
CT buffer receive mechanisms use the GuC interrupts. GuC interrupts are
currently enabled and disabled in different logging scenarios all gated
by log level.

v2: Rebase with all GuC interrupt handlers moved to intel_guc.c. Handling
multiple clients for GuC interrupts enable/disable.
(Michal Wajdeczko)

v3: Removed spin lock and using test_bit in i915_guc_info. Prepared low
level helpers to get/put GuC interrupts that can be reused during
suspend/resume. (Tvrtko)

v4: Rebase. Removed comments about logging being sole user of interrupts.
s/guc_intr_client/intel_guc_intr_client. Reverted function names to
enable/disable_interrupts from get/put_interrupts as applicable. (Michal)

Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c  |  6 +++++
 drivers/gpu/drm/i915/intel_guc.c     | 45 ++++++++++++++++++++++++++++--------
 drivers/gpu/drm/i915/intel_guc.h     | 13 ++++++++---
 drivers/gpu/drm/i915/intel_guc_log.c |  6 ++---
 4 files changed, 53 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 16f9a95..eef4c8b 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2340,6 +2340,12 @@ static int i915_guc_info(struct seq_file *m, void *data)
 	GEM_BUG_ON(!guc->execbuf_client);
 	GEM_BUG_ON(!guc->preempt_client);
 
+	seq_puts(m, "GuC Interrupt Clients: ");
+	if (test_bit(GUC_INTR_CLIENT_LOG, &guc->interrupt_clients))
+		seq_puts(m, "GuC Logging\n");
+	else
+		seq_puts(m, "None\n");
+
 	seq_printf(m, "Doorbell map:\n");
 	seq_printf(m, "\t%*pb\n", GUC_NUM_DOORBELLS, guc->doorbell_bitmap);
 	seq_printf(m, "Doorbell next cacheline: 0x%x\n\n", guc->db_cacheline);
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 7b06c7b..7d66ee5 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -522,28 +522,53 @@ void intel_guc_reset_interrupts(struct intel_guc *guc)
 	spin_unlock_irq(&dev_priv->irq_lock);
 }
 
-void intel_guc_enable_interrupts(struct intel_guc *guc)
+static void __intel_guc_enable_interrupts(struct intel_guc *guc)
+{
+	struct drm_i915_private *dev_priv = guc_to_i915(guc);
+
+	lockdep_assert_held(&dev_priv->irq_lock);
+
+	WARN_ON_ONCE(I915_READ(gen6_pm_iir(dev_priv)) &
+			       dev_priv->pm_guc_events);
+	gen6_enable_pm_irq(dev_priv, dev_priv->pm_guc_events);
+}
+
+void intel_guc_enable_interrupts(struct intel_guc *guc,
+				 enum intel_guc_intr_client id)
 {
 	struct drm_i915_private *dev_priv = guc_to_i915(guc);
 
 	spin_lock_irq(&dev_priv->irq_lock);
-	if (!guc->interrupts_enabled) {
-		WARN_ON_ONCE(I915_READ(gen6_pm_iir(dev_priv)) &
-				       dev_priv->pm_guc_events);
-		guc->interrupts_enabled = true;
-		gen6_enable_pm_irq(dev_priv, dev_priv->pm_guc_events);
-	}
+
+	if (!guc->interrupt_clients)
+		__intel_guc_enable_interrupts(guc);
+	__set_bit(id, &guc->interrupt_clients);
+
 	spin_unlock_irq(&dev_priv->irq_lock);
 }
 
-void intel_guc_disable_interrupts(struct intel_guc *guc)
+static void __intel_guc_disable_interrupts(struct intel_guc *guc)
 {
 	struct drm_i915_private *dev_priv = guc_to_i915(guc);
 
-	spin_lock_irq(&dev_priv->irq_lock);
-	guc->interrupts_enabled = false;
+	lockdep_assert_held(&dev_priv->irq_lock);
 
 	gen6_disable_pm_irq(dev_priv, dev_priv->pm_guc_events);
+}
+
+void intel_guc_disable_interrupts(struct intel_guc *guc,
+				  enum intel_guc_intr_client id)
+{
+	struct drm_i915_private *dev_priv = guc_to_i915(guc);
+
+	spin_lock_irq(&dev_priv->irq_lock);
+
+	__clear_bit(id, &guc->interrupt_clients);
+	if (guc->interrupt_clients) {
+		spin_unlock_irq(&dev_priv->irq_lock);
+		return;
+	}
+	__intel_guc_disable_interrupts(guc);
 
 	spin_unlock_irq(&dev_priv->irq_lock);
 	synchronize_irq(dev_priv->drm.irq);
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 1df9222..f248565 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -34,6 +34,11 @@
 #include "intel_uc_fw.h"
 #include "i915_vma.h"
 
+enum intel_guc_intr_client {
+	GUC_INTR_CLIENT_LOG = 0,
+	GUC_INTR_CLIENT_COUNT
+};
+
 struct guc_preempt_work {
 	struct work_struct work;
 	struct intel_engine_cs *engine;
@@ -53,7 +58,7 @@ struct intel_guc {
 	struct drm_i915_gem_object *load_err_log;
 
 	/* intel_guc_recv interrupt related state */
-	bool interrupts_enabled;
+	unsigned long interrupt_clients;
 
 	struct i915_vma *ads_vma;
 	struct i915_vma *stage_desc_pool;
@@ -132,8 +137,10 @@ static inline u32 guc_ggtt_offset(struct i915_vma *vma)
 struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
 u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv);
 void intel_guc_reset_interrupts(struct intel_guc *guc);
-void intel_guc_enable_interrupts(struct intel_guc *guc);
-void intel_guc_disable_interrupts(struct intel_guc *guc);
+void intel_guc_enable_interrupts(struct intel_guc *guc,
+				 enum intel_guc_intr_client id);
+void intel_guc_disable_interrupts(struct intel_guc *guc,
+				  enum intel_guc_intr_client id);
 void intel_guc_irq_handler(struct intel_guc *guc, u32 pm_iir);
 
 #endif
diff --git a/drivers/gpu/drm/i915/intel_guc_log.c b/drivers/gpu/drm/i915/intel_guc_log.c
index 1e535e6..fd2a40e 100644
--- a/drivers/gpu/drm/i915/intel_guc_log.c
+++ b/drivers/gpu/drm/i915/intel_guc_log.c
@@ -592,7 +592,6 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val)
 			return ret;
 		}
 
-		/* GuC logging is currently the only user of Guc2Host interrupts */
 		intel_guc_log_enable_interrupts(guc);
 	} else {
 		/* Once logging is disabled, GuC won't generate logs & send an
@@ -628,7 +627,6 @@ void i915_guc_log_unregister(struct drm_i915_private *dev_priv)
 		return;
 
 	mutex_lock(&dev_priv->drm.struct_mutex);
-	/* GuC logging is currently the only user of Guc2Host interrupts */
 	intel_runtime_pm_get(dev_priv);
 	intel_guc_log_disable_interrupts(&dev_priv->guc);
 	intel_runtime_pm_put(dev_priv);
@@ -640,11 +638,11 @@ void i915_guc_log_unregister(struct drm_i915_private *dev_priv)
 void intel_guc_log_enable_interrupts(struct intel_guc *guc)
 {
 	if (guc->log.level >= 0)
-		intel_guc_enable_interrupts(guc);
+		intel_guc_enable_interrupts(guc, GUC_INTR_CLIENT_LOG);
 }
 
 void intel_guc_log_disable_interrupts(struct intel_guc *guc)
 {
 	if (guc->log.level >= 0)
-		intel_guc_disable_interrupts(guc);
+		intel_guc_disable_interrupts(guc, GUC_INTR_CLIENT_LOG);
 }
-- 
1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2018-01-05  8:43 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-05  8:46 [PATCH v4 0/9] GuC Interrupts/Log updates Sagar Arun Kamble
2018-01-05  8:46 ` [PATCH v4 1/9] drm/i915/guc: Move GuC interrupts related functions from i915_irq.c to intel_guc.c Sagar Arun Kamble
2018-01-05  8:46 ` [PATCH v4 2/9] drm/i915/guc: Fix GuC interrupts disabling with logging Sagar Arun Kamble
2018-01-05  8:46 ` [PATCH v4 3/9] drm/i915/guc: Separate creation/release of runtime logging data from base logging data Sagar Arun Kamble
2018-01-05  8:46 ` [PATCH v4 4/9] drm/i915/guc: Grab RPM wakelock while disabling GuC interrupts Sagar Arun Kamble
2018-01-05  8:46 ` [PATCH v4 5/9] drm/i915/guc: Make guc_log_level parameter immutable Sagar Arun Kamble
2018-01-05  8:46 ` [PATCH v4 6/9] drm/i915/guc: Make GuC log related functions depend only on log level Sagar Arun Kamble
2018-01-05  8:46 ` Sagar Arun Kamble [this message]
2018-01-05  8:47 ` [PATCH v4 8/9] drm/i915/guc: Restore GuC interrupts across suspend/reset if enabled Sagar Arun Kamble
2018-01-05  8:47 ` [PATCH v4 9/9] HAX: drm/i915/guc: enable GuC submission/logging for CI Sagar Arun Kamble
2018-01-05  9:12 ` ✗ Fi.CI.BAT: failure for GuC Interrupts/Log updates (rev3) Patchwork
2018-01-05 10:24   ` Sagar Arun Kamble

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1515142021-24232-8-git-send-email-sagar.a.kamble@intel.com \
    --to=sagar.a.kamble@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.