From: Yang Yingliang <yangyingliang@huawei.com> To: <marc.zyngier@arm.com> Cc: <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <yangyingliang@huawei.com> Subject: [RFC PATCH 1/4] irqchip/gic-v3: add common_aff_lpi field in struct rdists Date: Mon, 12 Mar 2018 14:49:52 +0800 [thread overview] Message-ID: <1520837395-10288-2-git-send-email-yangyingliang@huawei.com> (raw) In-Reply-To: <1520837395-10288-1-git-send-email-yangyingliang@huawei.com> Read CommonLPIAff from GICR_TYPER and check whether the values are same in each register. If they are different, prints warning message and set CommonLPIAff to zero. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> --- drivers/irqchip/irq-gic-v3.c | 20 ++++++++++++++++++++ include/linux/irqchip/arm-gic-v3.h | 3 +++ 2 files changed, 23 insertions(+) diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index d99cc07..58f55da 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -598,6 +598,10 @@ static int gic_dist_supports_lpis(void) static void gic_cpu_init(void) { void __iomem *rbase; + u32 typer; + unsigned long flags; + u16 common_aff_lpi; + int cpu = smp_processor_id(); /* Register ourselves with the rest of the world */ if (gic_populate_rdist()) @@ -612,6 +616,21 @@ static void gic_cpu_init(void) gic_cpu_config(rbase, gic_redist_wait_for_rwp); + typer = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); + common_aff_lpi = GICR_TYPER_COMMON_AFF_LPI(typer); + if (!cpu) { + gic_data.rdists.common_aff_lpi = common_aff_lpi; + } else { + raw_spin_lock_irqsave(&gic_data.rdists.lock, flags); + if (common_aff_lpi != gic_data.rdists.common_aff_lpi) { + pr_warn_once("The CommonLPIAff is not consistent.\ + It's %d in CPU0, but %d in CPU%d, set CommonLPIAff to 0.\n", + gic_data.rdists.common_aff_lpi, cpu, common_aff_lpi); + gic_data.rdists.common_aff_lpi = 0; + } + raw_spin_unlock_irqrestore(&gic_data.rdists.lock, flags); + } + /* Give LPIs a spin */ if (IS_ENABLED(CONFIG_ARM_GIC_V3_ITS) && gic_dist_supports_lpis()) its_cpu_init(); @@ -1029,6 +1048,7 @@ static int __init gic_init_bases(void __iomem *dist_base, gic_data.rdists.rdist = alloc_percpu(typeof(*gic_data.rdists.rdist)); gic_data.rdists.has_vlpis = true; gic_data.rdists.has_direct_lpi = true; + raw_spin_lock_init(&gic_data.rdists.lock); if (WARN_ON(!gic_data.domain) || WARN_ON(!gic_data.rdists.rdist)) { err = -ENOMEM; diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h index c00c4c33..6da670a 100644 --- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h @@ -108,6 +108,7 @@ #define GICR_CTLR_ENABLE_LPIS (1UL << 0) #define GICR_TYPER_CPU_NUMBER(r) (((r) >> 8) & 0xffff) +#define GICR_TYPER_COMMON_AFF_LPI(r) (((r) >> 24) & 3) #define GICR_WAKER_ProcessorSleep (1U << 1) #define GICR_WAKER_ChildrenAsleep (1U << 2) @@ -577,6 +578,8 @@ struct rdists { u64 flags; bool has_vlpis; bool has_direct_lpi; + u16 common_aff_lpi; + raw_spinlock_t lock; }; struct irq_domain; -- 1.8.3
WARNING: multiple messages have this Message-ID (diff)
From: yangyingliang@huawei.com (Yang Yingliang) To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 1/4] irqchip/gic-v3: add common_aff_lpi field in struct rdists Date: Mon, 12 Mar 2018 14:49:52 +0800 [thread overview] Message-ID: <1520837395-10288-2-git-send-email-yangyingliang@huawei.com> (raw) In-Reply-To: <1520837395-10288-1-git-send-email-yangyingliang@huawei.com> Read CommonLPIAff from GICR_TYPER and check whether the values are same in each register. If they are different, prints warning message and set CommonLPIAff to zero. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> --- drivers/irqchip/irq-gic-v3.c | 20 ++++++++++++++++++++ include/linux/irqchip/arm-gic-v3.h | 3 +++ 2 files changed, 23 insertions(+) diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index d99cc07..58f55da 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -598,6 +598,10 @@ static int gic_dist_supports_lpis(void) static void gic_cpu_init(void) { void __iomem *rbase; + u32 typer; + unsigned long flags; + u16 common_aff_lpi; + int cpu = smp_processor_id(); /* Register ourselves with the rest of the world */ if (gic_populate_rdist()) @@ -612,6 +616,21 @@ static void gic_cpu_init(void) gic_cpu_config(rbase, gic_redist_wait_for_rwp); + typer = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); + common_aff_lpi = GICR_TYPER_COMMON_AFF_LPI(typer); + if (!cpu) { + gic_data.rdists.common_aff_lpi = common_aff_lpi; + } else { + raw_spin_lock_irqsave(&gic_data.rdists.lock, flags); + if (common_aff_lpi != gic_data.rdists.common_aff_lpi) { + pr_warn_once("The CommonLPIAff is not consistent.\ + It's %d in CPU0, but %d in CPU%d, set CommonLPIAff to 0.\n", + gic_data.rdists.common_aff_lpi, cpu, common_aff_lpi); + gic_data.rdists.common_aff_lpi = 0; + } + raw_spin_unlock_irqrestore(&gic_data.rdists.lock, flags); + } + /* Give LPIs a spin */ if (IS_ENABLED(CONFIG_ARM_GIC_V3_ITS) && gic_dist_supports_lpis()) its_cpu_init(); @@ -1029,6 +1048,7 @@ static int __init gic_init_bases(void __iomem *dist_base, gic_data.rdists.rdist = alloc_percpu(typeof(*gic_data.rdists.rdist)); gic_data.rdists.has_vlpis = true; gic_data.rdists.has_direct_lpi = true; + raw_spin_lock_init(&gic_data.rdists.lock); if (WARN_ON(!gic_data.domain) || WARN_ON(!gic_data.rdists.rdist)) { err = -ENOMEM; diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h index c00c4c33..6da670a 100644 --- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h @@ -108,6 +108,7 @@ #define GICR_CTLR_ENABLE_LPIS (1UL << 0) #define GICR_TYPER_CPU_NUMBER(r) (((r) >> 8) & 0xffff) +#define GICR_TYPER_COMMON_AFF_LPI(r) (((r) >> 24) & 3) #define GICR_WAKER_ProcessorSleep (1U << 1) #define GICR_WAKER_ChildrenAsleep (1U << 2) @@ -577,6 +578,8 @@ struct rdists { u64 flags; bool has_vlpis; bool has_direct_lpi; + u16 common_aff_lpi; + raw_spinlock_t lock; }; struct irq_domain; -- 1.8.3
next prev parent reply other threads:[~2018-03-12 6:51 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-03-12 6:49 [RFC PATCH 0/4] add support for CommonLPIAff field Yang Yingliang 2018-03-12 6:49 ` Yang Yingliang 2018-03-12 6:49 ` Yang Yingliang [this message] 2018-03-12 6:49 ` [RFC PATCH 1/4] irqchip/gic-v3: add common_aff_lpi field in struct rdists Yang Yingliang 2018-03-12 6:49 ` [RFC PATCH 2/4] irqchip/gic-v3-its: replace alloc_pages() with alloc_pages_node() Yang Yingliang 2018-03-12 6:49 ` Yang Yingliang 2018-03-12 6:49 ` [RFC PATCH 3/4] irqchip/gic-v3-its: change prop_page to per-cpu type to support CommonLPIAff field Yang Yingliang 2018-03-12 6:49 ` Yang Yingliang 2018-03-12 6:49 ` [RFC PATCH 4/4] irqchip/gic-v3-its: sync config of LPIs if there are more than one prop_page Yang Yingliang 2018-03-12 6:49 ` Yang Yingliang 2018-03-12 9:55 ` [RFC PATCH 0/4] add support for CommonLPIAff field Marc Zyngier 2018-03-12 9:55 ` Marc Zyngier 2018-03-12 12:13 ` Yang Yingliang 2018-03-12 12:13 ` Yang Yingliang 2018-03-12 12:25 ` Marc Zyngier 2018-03-12 12:25 ` Marc Zyngier
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1520837395-10288-2-git-send-email-yangyingliang@huawei.com \ --to=yangyingliang@huawei.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=marc.zyngier@arm.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.