From: Babu Moger <babu.moger@amd.com> To: mst@redhat.com, marcel@redhat.com, pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com, mtosatti@redhat.com Cc: babu.moger@amd.com, kash@tripleback.net, qemu-devel@nongnu.org, kvm@vger.kernel.org Subject: [PATCH v5 7/9] i386: Add support for CPUID_8000_001E for AMD Date: Tue, 27 Mar 2018 17:31:09 -0400 [thread overview] Message-ID: <1522186271-27743-8-git-send-email-babu.moger@amd.com> (raw) In-Reply-To: <1522186271-27743-1-git-send-email-babu.moger@amd.com> Populate threads/core_id/apic_ids/socket_id when CPUID_EXT3_TOPOEXT feature is supported. This is required to support hyperthreading feature on AMD CPUs. This is supported via CPUID_8000_001E extended functions. Signed-off-by: Babu Moger <babu.moger@amd.com> --- target/i386/cpu.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index f69f551..6f3ad44 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -315,6 +315,12 @@ static uint32_t encode_cache_cpuid80000005(CPUCacheInfo *cache) (((CORES_IN_CMPLX - 1) * 2) + 1) : \ (CORES_IN_CMPLX - 1)) +/* Definitions used on CPUID Leaf 0x8000001E */ +#define EXTENDED_APIC_ID(threads, socket_id, core_id, thread_id) \ + ((threads) ? \ + ((socket_id << 6) | (core_id << 1) | thread_id) : \ + ((socket_id << 6) | core_id)) + /* * Encode cache info for CPUID[0x80000006].ECX and CPUID[0x80000006].EDX * @l3 can be NULL. @@ -4101,6 +4107,14 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, break; } break; + case 0x8000001E: + assert(cpu->core_id <= 255); + *eax = EXTENDED_APIC_ID((cs->nr_threads - 1), + cpu->socket_id, cpu->core_id, cpu->thread_id); + *ebx = (cs->nr_threads - 1) << 8 | cpu->core_id; + *ecx = cpu->socket_id; + *edx = 0; + break; case 0xC0000000: *eax = env->cpuid_xlevel2; *ebx = 0; -- 1.8.3.1
WARNING: multiple messages have this Message-ID (diff)
From: Babu Moger <babu.moger@amd.com> To: mst@redhat.com, marcel@redhat.com, pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com, mtosatti@redhat.com Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, kash@tripleback.net, babu.moger@amd.com Subject: [Qemu-devel] [PATCH v5 7/9] i386: Add support for CPUID_8000_001E for AMD Date: Tue, 27 Mar 2018 17:31:09 -0400 [thread overview] Message-ID: <1522186271-27743-8-git-send-email-babu.moger@amd.com> (raw) In-Reply-To: <1522186271-27743-1-git-send-email-babu.moger@amd.com> Populate threads/core_id/apic_ids/socket_id when CPUID_EXT3_TOPOEXT feature is supported. This is required to support hyperthreading feature on AMD CPUs. This is supported via CPUID_8000_001E extended functions. Signed-off-by: Babu Moger <babu.moger@amd.com> --- target/i386/cpu.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index f69f551..6f3ad44 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -315,6 +315,12 @@ static uint32_t encode_cache_cpuid80000005(CPUCacheInfo *cache) (((CORES_IN_CMPLX - 1) * 2) + 1) : \ (CORES_IN_CMPLX - 1)) +/* Definitions used on CPUID Leaf 0x8000001E */ +#define EXTENDED_APIC_ID(threads, socket_id, core_id, thread_id) \ + ((threads) ? \ + ((socket_id << 6) | (core_id << 1) | thread_id) : \ + ((socket_id << 6) | core_id)) + /* * Encode cache info for CPUID[0x80000006].ECX and CPUID[0x80000006].EDX * @l3 can be NULL. @@ -4101,6 +4107,14 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, break; } break; + case 0x8000001E: + assert(cpu->core_id <= 255); + *eax = EXTENDED_APIC_ID((cs->nr_threads - 1), + cpu->socket_id, cpu->core_id, cpu->thread_id); + *ebx = (cs->nr_threads - 1) << 8 | cpu->core_id; + *ecx = cpu->socket_id; + *edx = 0; + break; case 0xC0000000: *eax = env->cpuid_xlevel2; *ebx = 0; -- 1.8.3.1
next prev parent reply other threads:[~2018-03-27 21:31 UTC|newest] Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-03-27 21:31 [PATCH v5 0/9] i386: Enable TOPOEXT to support hyperthreading on AMD CPU Babu Moger 2018-03-27 21:31 ` [Qemu-devel] " Babu Moger 2018-03-27 21:31 ` [PATCH v5 1/9] i386: Helpers to encode cache information consistently Babu Moger 2018-03-27 21:31 ` [Qemu-devel] " Babu Moger 2018-03-27 21:31 ` [PATCH v5 2/9] i386: Add cache information in X86CPUDefinition Babu Moger 2018-03-27 21:31 ` [Qemu-devel] " Babu Moger 2018-03-27 21:31 ` [PATCH v5 3/9] i386: Initialize cache information for EPYC family processors Babu Moger 2018-03-27 21:31 ` [Qemu-devel] " Babu Moger 2018-03-27 21:31 ` [PATCH v5 4/9] i386: Add new property to control cache info Babu Moger 2018-03-27 21:31 ` [Qemu-devel] " Babu Moger 2018-04-09 16:59 ` Alexandr Iarygin 2018-04-09 16:59 ` [Qemu-devel] " Alexandr Iarygin 2018-04-09 19:51 ` Moger, Babu 2018-04-09 19:51 ` [Qemu-devel] " Moger, Babu 2018-04-09 20:07 ` Eduardo Habkost 2018-04-09 20:07 ` [Qemu-devel] " Eduardo Habkost 2018-03-27 21:31 ` [PATCH v5 5/9] i386: Use the statically loaded cache definitions Babu Moger 2018-03-27 21:31 ` [Qemu-devel] " Babu Moger 2018-03-27 21:31 ` [PATCH v5 6/9] i386: Populate AMD Processor Cache Information for cpuid 0x8000001D Babu Moger 2018-03-27 21:31 ` [Qemu-devel] " Babu Moger 2018-03-27 21:31 ` Babu Moger [this message] 2018-03-27 21:31 ` [Qemu-devel] [PATCH v5 7/9] i386: Add support for CPUID_8000_001E for AMD Babu Moger 2018-03-27 21:31 ` [PATCH v5 8/9] i386: Enable TOPOEXT feature on AMD EPYC CPU Babu Moger 2018-03-27 21:31 ` [Qemu-devel] " Babu Moger 2018-03-27 21:31 ` [PATCH v5 9/9] i386: Remove generic SMT thread check Babu Moger 2018-03-27 21:31 ` [Qemu-devel] " Babu Moger 2018-04-09 2:58 ` [PATCH v5 0/9] i386: Enable TOPOEXT to support hyperthreading on AMD CPU Moger, Babu 2018-04-09 2:58 ` [Qemu-devel] " Moger, Babu
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