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From: Ramalingam C <ramalingam.c@intel.com>
To: intel-gfx@lists.freedesktop.org, jani.nikula@linux.intel.com,
	daniel@ffwll.ch, chris@chris-wilson.co.uk,
	rodrigo.vivi@intel.com, ville.syrjala@linux.intel.com
Cc: Jani Nikula <jani.nikula@intel.com>
Subject: [RFC 1/2] drm/i915/gmbus: Increase the Bytes per Rd/Wr Op
Date: Thu, 12 Apr 2018 20:59:51 +0530	[thread overview]
Message-ID: <1523546992-20762-2-git-send-email-ramalingam.c@intel.com> (raw)
In-Reply-To: <1523546992-20762-1-git-send-email-ramalingam.c@intel.com>

From BXT onwards Bspec says HW supports Max Bytes per single RD/WR op is
511Bytes instead of previous 256Bytes used in SW.

This change allows the max bytes per op upto 511Bytes from BXT onwards.

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h  |  1 +
 drivers/gpu/drm/i915/intel_i2c.c | 10 ++++++++--
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 475cac07d3e6..4f583da0cee9 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3013,6 +3013,7 @@ enum i915_power_well_id {
 #define   GMBUS_CYCLE_STOP	(4<<25)
 #define   GMBUS_BYTE_COUNT_SHIFT 16
 #define   GMBUS_BYTE_COUNT_MAX   256U
+#define   BXT_GMBUS_BYTE_COUNT_MAX 511U
 #define   GMBUS_SLAVE_INDEX_SHIFT 8
 #define   GMBUS_SLAVE_ADDR_SHIFT 1
 #define   GMBUS_SLAVE_READ	(1<<0)
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index e6875509bcd9..7e92c7934657 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -400,7 +400,10 @@ gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
 	int ret;
 
 	do {
-		len = min(rx_size, GMBUS_BYTE_COUNT_MAX);
+		if (INTEL_GEN(dev_priv) >= 9)
+			len = min(rx_size, BXT_GMBUS_BYTE_COUNT_MAX);
+		else
+			len = min(rx_size, GMBUS_BYTE_COUNT_MAX);
 
 		ret = gmbus_xfer_read_chunk(dev_priv, msg->addr,
 					    buf, len, gmbus1_index);
@@ -462,7 +465,10 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
 	int ret;
 
 	do {
-		len = min(tx_size, GMBUS_BYTE_COUNT_MAX);
+		if (INTEL_GEN(dev_priv) >= 9)
+			len = min(tx_size, BXT_GMBUS_BYTE_COUNT_MAX);
+		else
+			len = min(tx_size, GMBUS_BYTE_COUNT_MAX);
 
 		ret = gmbus_xfer_write_chunk(dev_priv, msg->addr, buf, len,
 					     gmbus1_index);
-- 
2.7.4

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  reply	other threads:[~2018-04-12 15:35 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-12 15:29 [RFC 0/2] GMBUS changes Ramalingam C
2018-04-12 15:29 ` Ramalingam C [this message]
2018-04-13 12:37   ` [RFC 1/2] drm/i915/gmbus: Increase the Bytes per Rd/Wr Op Jani Nikula
2018-04-12 15:29 ` [RFC 2/2] drm/i915/gmbus: Enable burst read Ramalingam C
2018-04-12 16:01   ` [RFC v2 " Ramalingam C
2018-04-13 10:17     ` Ramalingam C
2018-04-13 12:55     ` Jani Nikula
2018-04-12 15:55 ` ✗ Fi.CI.CHECKPATCH: warning for GMBUS changes Patchwork
2018-04-12 16:11 ` ✓ Fi.CI.BAT: success " Patchwork
2018-04-12 16:36 ` ✗ Fi.CI.CHECKPATCH: warning for GMBUS changes (rev2) Patchwork
2018-04-12 16:52 ` ✓ Fi.CI.BAT: success " Patchwork
2018-04-12 18:22 ` ✓ Fi.CI.IGT: " Patchwork

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