From: richard.gong@linux.intel.com
To: catalin.marinas@arm.com, will.deacon@arm.com,
dinguyen@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com,
atull@kernel.org, mdf@kernel.org, arnd@arndb.de,
gregkh@linuxfoundation.org, corbet@lwn.net
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-fpga@vger.kernel.org, linux-doc@vger.kernel.org,
yves.vandervennet@linux.intel.com, richard.gong@linux.intel.com,
richard.gong@intel.com
Subject: [PATCHv5 2/8] arm64: dts: stratix10: add stratix10 service driver binding to base dtsi
Date: Thu, 24 May 2018 11:33:14 -0500 [thread overview]
Message-ID: <1527179600-26441-3-git-send-email-richard.gong@linux.intel.com> (raw)
In-Reply-To: <1527179600-26441-1-git-send-email-richard.gong@linux.intel.com>
From: Richard Gong <richard.gong@intel.com>
Add Intel Stratix10 service layer to the device tree
Signed-off-by: Richard Gong <richard.gong@intel.com>
Signed-off-by: Alan Tull <atull@kernel.org>
---
v2: Change to put service layer driver node under the firmware node
Change compatible to "intel, stratix10-svc"
v3: No change
v4: s/service driver/stratix10 service driver/ in subject line
v5: No change
---
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index d8c94d5..c257287 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -24,6 +24,19 @@
#address-cells = <2>;
#size-cells = <2>;
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ service_reserved: svcbuffer@0 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x0 0x0 0x1000000>;
+ alignment = <0x1000>;
+ no-map;
+ };
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -487,5 +500,13 @@
status = "disabled";
};
+
+ firmware {
+ svc {
+ compatible = "intel,stratix10-svc";
+ method = "smc";
+ memory-region = <&service_reserved>;
+ };
+ };
};
};
--
2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: richard.gong@linux.intel.com
To: catalin.marinas@arm.com, will.deacon@arm.com,
dinguyen@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com,
atull@kernel.org, mdf@kernel.org, arnd@arndb.de,
gregkh@linuxfoundation.org, corbet@lwn.net
Cc: devicetree@vger.kernel.org, yves.vandervennet@linux.intel.com,
richard.gong@intel.com, linux-doc@vger.kernel.org,
linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org,
richard.gong@linux.intel.com,
linux-arm-kernel@lists.infradead.org
Subject: [PATCHv5 2/8] arm64: dts: stratix10: add stratix10 service driver binding to base dtsi
Date: Thu, 24 May 2018 11:33:14 -0500 [thread overview]
Message-ID: <1527179600-26441-3-git-send-email-richard.gong@linux.intel.com> (raw)
In-Reply-To: <1527179600-26441-1-git-send-email-richard.gong@linux.intel.com>
From: Richard Gong <richard.gong@intel.com>
Add Intel Stratix10 service layer to the device tree
Signed-off-by: Richard Gong <richard.gong@intel.com>
Signed-off-by: Alan Tull <atull@kernel.org>
---
v2: Change to put service layer driver node under the firmware node
Change compatible to "intel, stratix10-svc"
v3: No change
v4: s/service driver/stratix10 service driver/ in subject line
v5: No change
---
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index d8c94d5..c257287 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -24,6 +24,19 @@
#address-cells = <2>;
#size-cells = <2>;
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ service_reserved: svcbuffer@0 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x0 0x0 0x1000000>;
+ alignment = <0x1000>;
+ no-map;
+ };
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -487,5 +500,13 @@
status = "disabled";
};
+
+ firmware {
+ svc {
+ compatible = "intel,stratix10-svc";
+ method = "smc";
+ memory-region = <&service_reserved>;
+ };
+ };
};
};
--
2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: richard.gong@linux.intel.com
To: catalin.marinas@arm.com, will.deacon@arm.com,
dinguyen@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com,
atull@kernel.org, mdf@kernel.org, arnd@arndb.de,
gregkh@linuxfoundation.org, corbet@lwn.net
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-fpga@vger.kernel.org, linux-doc@vger.kernel.org,
yves.vandervennet@linux.intel.com, richard.gong@linux.intel.com,
richard.gong@intel.com
Subject: [PATCHv5 2/8] arm64: dts: stratix10: add stratix10 service driver binding to base dtsi
Date: Thu, 24 May 2018 11:33:14 -0500 [thread overview]
Message-ID: <1527179600-26441-3-git-send-email-richard.gong@linux.intel.com> (raw)
In-Reply-To: <1527179600-26441-1-git-send-email-richard.gong@linux.intel.com>
From: Richard Gong <richard.gong@intel.com>
Add Intel Stratix10 service layer to the device tree
Signed-off-by: Richard Gong <richard.gong@intel.com>
Signed-off-by: Alan Tull <atull@kernel.org>
---
v2: Change to put service layer driver node under the firmware node
Change compatible to "intel, stratix10-svc"
v3: No change
v4: s/service driver/stratix10 service driver/ in subject line
v5: No change
---
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index d8c94d5..c257287 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -24,6 +24,19 @@
#address-cells = <2>;
#size-cells = <2>;
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ service_reserved: svcbuffer@0 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x0 0x0 0x1000000>;
+ alignment = <0x1000>;
+ no-map;
+ };
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -487,5 +500,13 @@
status = "disabled";
};
+
+ firmware {
+ svc {
+ compatible = "intel,stratix10-svc";
+ method = "smc";
+ memory-region = <&service_reserved>;
+ };
+ };
};
};
--
2.7.4
--
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WARNING: multiple messages have this Message-ID (diff)
From: richard.gong@linux.intel.com (richard.gong at linux.intel.com)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv5 2/8] arm64: dts: stratix10: add stratix10 service driver binding to base dtsi
Date: Thu, 24 May 2018 11:33:14 -0500 [thread overview]
Message-ID: <1527179600-26441-3-git-send-email-richard.gong@linux.intel.com> (raw)
In-Reply-To: <1527179600-26441-1-git-send-email-richard.gong@linux.intel.com>
From: Richard Gong <richard.gong@intel.com>
Add Intel Stratix10 service layer to the device tree
Signed-off-by: Richard Gong <richard.gong@intel.com>
Signed-off-by: Alan Tull <atull@kernel.org>
---
v2: Change to put service layer driver node under the firmware node
Change compatible to "intel, stratix10-svc"
v3: No change
v4: s/service driver/stratix10 service driver/ in subject line
v5: No change
---
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index d8c94d5..c257287 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -24,6 +24,19 @@
#address-cells = <2>;
#size-cells = <2>;
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ service_reserved: svcbuffer at 0 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x0 0x0 0x1000000>;
+ alignment = <0x1000>;
+ no-map;
+ };
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -487,5 +500,13 @@
status = "disabled";
};
+
+ firmware {
+ svc {
+ compatible = "intel,stratix10-svc";
+ method = "smc";
+ memory-region = <&service_reserved>;
+ };
+ };
};
};
--
2.7.4
next prev parent reply other threads:[~2018-05-24 16:31 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-24 16:33 [PATCHv5 0/8] Add Intel Stratix10 FPGA manager and service layer richard.gong
2018-05-24 16:33 ` richard.gong at linux.intel.com
2018-05-24 16:33 ` richard.gong
2018-05-24 16:33 ` [PATCHv5 1/8] dt-bindings, firmware: add Intel Stratix10 service layer binding richard.gong
2018-05-24 16:33 ` richard.gong at linux.intel.com
2018-05-24 16:33 ` richard.gong
2018-05-24 17:04 ` Moritz Fischer
2018-05-24 17:04 ` Moritz Fischer
2018-05-24 17:04 ` Moritz Fischer
2018-05-24 16:33 ` richard.gong [this message]
2018-05-24 16:33 ` [PATCHv5 2/8] arm64: dts: stratix10: add stratix10 service driver binding to base dtsi richard.gong at linux.intel.com
2018-05-24 16:33 ` richard.gong
2018-05-24 16:33 ` richard.gong
2018-05-24 17:04 ` Moritz Fischer
2018-05-24 17:04 ` Moritz Fischer
2018-05-24 17:04 ` Moritz Fischer
2018-05-24 16:33 ` [PATCHv5 3/8] driver, misc: add Intel Stratix10 service layer driver richard.gong
2018-05-24 16:33 ` richard.gong at linux.intel.com
2018-05-24 16:33 ` richard.gong
2018-05-24 16:33 ` [PATCHv5 4/8] dt-bindings: fpga: add Stratix10 SoC FPGA manager binding richard.gong
2018-05-24 16:33 ` richard.gong at linux.intel.com
2018-05-24 16:33 ` richard.gong
2018-05-24 16:33 ` [PATCHv5 5/8] arm64: dts: stratix10: add fpga manager and region richard.gong
2018-05-24 16:33 ` richard.gong at linux.intel.com
2018-05-24 16:33 ` richard.gong
2018-05-24 16:33 ` [PATCHv5 6/8] fpga: add intel stratix10 soc fpga manager driver richard.gong
2018-05-24 16:33 ` richard.gong at linux.intel.com
2018-05-24 16:33 ` richard.gong
2018-05-24 16:33 ` [PATCHv5 7/8] defconfig: enable fpga and service layer richard.gong
2018-05-24 16:33 ` richard.gong at linux.intel.com
2018-05-24 16:33 ` richard.gong
2018-05-24 16:33 ` [PATCHv5 8/8] Documentation: driver-api: add stratix10 " richard.gong
2018-05-24 16:33 ` richard.gong at linux.intel.com
2018-05-24 16:33 ` richard.gong
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