From: Sricharan R <sricharan@codeaurora.org>
To: robh@kernel.org, viresh.kumar@linaro.org, mark.rutland@arm.com,
mturquette@baylibre.com, sboyd@codeaurora.org,
linux@armlinux.org.uk, andy.gross@linaro.org,
david.brown@linaro.org, rjw@rjwysocki.net,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
linux-pm@vger.kernel.org, linux@arm.linux.org.uk,
thierry.escande@linaro.org, ctatlor97@gmail.com
Cc: sricharan@codeaurora.org
Subject: [PATCH v10 14/14] dt-bindings: cpufreq: Document operating-points-v2-krait-cpu
Date: Tue, 19 Jun 2018 19:15:25 +0530 [thread overview]
Message-ID: <1529415925-28915-15-git-send-email-sricharan@codeaurora.org> (raw)
In-Reply-To: <1529415925-28915-1-git-send-email-sricharan@codeaurora.org>
In Certain QCOM SoCs like ipq8064, apq8064, msm8960, msm8974
that has KRAIT processors the voltage/current value of each OPP
varies based on the silicon variant in use.
operating-points-v2-krait-cpu specifies the phandle to nvmem efuse cells
and the operating-points-v2 table for each opp. The qcom-cpufreq driver
reads the efuse value from the SoC to provide the required information
that is used to determine the voltage and current value for each OPP of
operating-points-v2 table when it is parsed by the OPP framework.
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
---
.../devicetree/bindings/cpufreq/krait-cpufreq.txt | 363 +++++++++++++++++++++
1 file changed, 363 insertions(+)
create mode 100644 Documentation/devicetree/bindings/cpufreq/krait-cpufreq.txt
diff --git a/Documentation/devicetree/bindings/cpufreq/krait-cpufreq.txt b/Documentation/devicetree/bindings/cpufreq/krait-cpufreq.txt
new file mode 100644
index 0000000..7b083c7
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/krait-cpufreq.txt
@@ -0,0 +1,363 @@
+QCOM KRAIT CPUFreq and OPP bindings
+===================================
+
+In Certain QCOM SoCs like ipq8064, apq8064, msm8960, msm8974
+that has KRAIT processors the voltage value of each OPP varies
+based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
+defines the voltage and current value based on the speed/pvs/version
+combination blown in the efuse. The qcom-cpufreq driver reads the efuse
+value from the SoC to provide the OPP framework with required information.
+This is used to determine the voltage and current value for each OPP of
+operating-points-v2 table when it is parsed by the OPP framework.
+
+Required properties:
+--------------------
+In 'cpus' nodes:
+- operating-points-v2: Phandle to the operating-points-v2 table to use.
+
+In 'operating-points-v2' table:
+- compatible: Should be
+ - 'operating-points-v2-krait-cpu' for ipq8064, apq8064, msm8960,
+ msm8974.
+- nvmem-cells: A phandle pointing to a nvmem-cells node representing the
+ efuse registers that has information about the
+ speedbin/pvs/version that is used to select the right
+ voltage/current value pair. Note that the length field of the
+ nvmem-cell is used to differentiate between format 'A' or 'B'
+ efuse settings. len of '4' bytes is for format 'A' and '8'
+ bytes for format 'B'. Please refer the for nvmem-cells
+ bindings Documentation/devicetree/bindings/nvmem/nvmem.txt
+ and also examples below for both the cases.
+Example 1:
+---------
+
+/* For arch/arm/boot/dts/apq8064.dtsi --> format 'A' */
+cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ CPU0: cpu@0 {
+ compatible = "qcom,krait";
+ enable-method = "qcom,kpss-acc-v1";
+ device_type = "cpu";
+ reg = <0>;
+ next-level-cache = <&L2>;
+ qcom,acc = <&acc0>;
+ qcom,saw = <&saw0>;
+ cpu-idle-states = <&CPU_SPC>;
+ operating-points-v2 = <&cpu_opp_table>;
+ };
+};
+
+qfprom: qfprom@700000 {
+ compatible = "qcom,qfprom";
+ reg = <0x00700000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ pvs_efuse: pvs {
+ reg = <0xc0 0x4>;
+ };
+};
+
+cpu_opp_table: opp-table {
+ compatible = "operating-points-v2-krait-cpu";
+ nvmem-cells = <&pvs_efuse>;
+
+ /*
+ * Missing opp-shared property means CPUs switch DVFS states
+ * independently.
+ */
+
+ opp-918000000 {
+ opp-hz = /bits/ 64 <918000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1100000>;
+ opp-microvolt-speed0-pvs1-v0 = <1050000>;
+ opp-microvolt-speed0-pvs3-v0 = <1000000>;
+ opp-microvolt-speed0-pvs4-v0 = <975000>;
+ opp-microvolt-speed1-pvs0-v0 = <1025000>;
+ opp-microvolt-speed1-pvs1-v0 = <1000000>;
+ opp-microvolt-speed1-pvs2-v0 = <950000>;
+ opp-microvolt-speed1-pvs3-v0 = <925000>;
+ opp-microvolt-speed1-pvs4-v0 = <900000>;
+ opp-microvolt-speed1-pvs5-v0 = <900000>;
+ opp-microvolt-speed1-pvs6-v0 = <900000>;
+ opp-microvolt-speed2-pvs0-v0 = <975000>;
+ opp-microvolt-speed2-pvs1-v0 = <950000>;
+ opp-microvolt-speed2-pvs2-v0 = <925000>;
+ opp-microvolt-speed2-pvs3-v0 = <912500>;
+ opp-microvolt-speed2-pvs4-v0 = <900000>;
+ opp-microvolt-speed2-pvs5-v0 = <900000>;
+ opp-microvolt-speed2-pvs6-v0 = <900000>;
+ opp-microvolt-speed14-pvs0-v0 = <1025000>;
+ opp-microvolt-speed14-pvs1-v0 = <1000000>;
+ opp-microvolt-speed14-pvs2-v0 = <950000>;
+ opp-microvolt-speed14-pvs3-v0 = <925000>;
+ opp-microvolt-speed14-pvs4-v0 = <900000>;
+ opp-microvolt-speed14-pvs5-v0 = <900000>;
+ opp-microvolt-speed14-pvs6-v0 = <900000>;
+ };
+
+ opp-810000000 {
+ opp-hz = /bits/ 64 <810000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1075000>;
+ opp-microvolt-speed0-pvs1-v0 = <1025000>;
+ opp-microvolt-speed0-pvs3-v0 = <975000>;
+ opp-microvolt-speed0-pvs3-v0 = <962500>;
+ opp-microvolt-speed1-pvs0-v0 = <1000000>;
+ opp-microvolt-speed1-pvs1-v0 = <975000>;
+ opp-microvolt-speed1-pvs2-v0 = <937500>;
+ opp-microvolt-speed1-pvs3-v0 = <900000>;
+ opp-microvolt-speed1-pvs4-v0 = <887500>;
+ opp-microvolt-speed1-pvs5-v0 = <887500>;
+ opp-microvolt-speed1-pvs6-v0 = <887500>;
+ opp-microvolt-speed2-pvs0-v0 = <962500>;
+ opp-microvolt-speed2-pvs1-v0 = <937500>;
+ opp-microvolt-speed2-pvs2-v0 = <912500>;
+ opp-microvolt-speed2-pvs3-v0 = <900000>;
+ opp-microvolt-speed2-pvs4-v0 = <887500>;
+ opp-microvolt-speed2-pvs5-v0 = <887500>;
+ opp-microvolt-speed2-pvs6-v0 = <887500>;
+ opp-microvolt-speed14-pvs0-v0 = <1000000>;
+ opp-microvolt-speed14-pvs1-v0 = <975000>;
+ opp-microvolt-speed14-pvs2-v0 = <937500>;
+ opp-microvolt-speed14-pvs3-v0 = <900000>;
+ opp-microvolt-speed14-pvs4-v0 = <887500>;
+ opp-microvolt-speed14-pvs5-v0 = <887500>;
+ opp-microvolt-speed14-pvs6-v0 = <887500>;
+ };
+
+ opp-702000000 {
+ opp-hz = /bits/ 64 <702000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1025000>;
+ opp-microvolt-speed0-pvs1-v0 = <975000>;
+ opp-microvolt-speed0-pvs3-v0 = <925000>;
+ opp-microvolt-speed0-pvs3-v0 = <925000>;
+ opp-microvolt-speed1-pvs0-v0 = <962500>;
+ opp-microvolt-speed1-pvs1-v0 = <962500>;
+ opp-microvolt-speed1-pvs2-v0 = <925000>;
+ opp-microvolt-speed1-pvs3-v0 = <900000>;
+ opp-microvolt-speed1-pvs4-v0 = <875000>;
+ opp-microvolt-speed1-pvs5-v0 = <875000>;
+ opp-microvolt-speed1-pvs6-v0 = <875000>;
+ opp-microvolt-speed2-pvs0-v0 = <950000>;
+ opp-microvolt-speed2-pvs1-v0 = <925000>;
+ opp-microvolt-speed2-pvs2-v0 = <900000>;
+ opp-microvolt-speed2-pvs3-v0 = 900000>;
+ opp-microvolt-speed2-pvs4-v0 = <875000>;
+ opp-microvolt-speed2-pvs5-v0 = <875000>;
+ opp-microvolt-speed2-pvs6-v0 = <875000>;
+ opp-microvolt-speed14-pvs0-v0 = <962500>;
+ opp-microvolt-speed14-pvs1-v0 = <962500>;
+ opp-microvolt-speed14-pvs2-v0 = <925000>;
+ opp-microvolt-speed14-pvs3-v0 = <900000>;
+ opp-microvolt-speed14-pvs4-v0 = <875000>;
+ opp-microvolt-speed14-pvs5-v0 = <875000>;
+ opp-microvolt-speed14-pvs6-v0 = <875000>;
+ };
+
+ opp-594000000 {
+ opp-hz = /bits/ 64 <594000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1000000>;
+ opp-microvolt-speed0-pvs1-v0 = <950000>;
+ opp-microvolt-speed0-pvs3-v0 = <900000>;
+ opp-microvolt-speed0-pvs3-v0 = <900000>;
+ opp-microvolt-speed1-pvs0-v0 = <950000>;
+ opp-microvolt-speed1-pvs1-v0 = <950000>;
+ opp-microvolt-speed1-pvs2-v0 = <925000>;
+ opp-microvolt-speed1-pvs3-v0 = <900000>;
+ opp-microvolt-speed1-pvs4-v0 = <875000>;
+ opp-microvolt-speed1-pvs5-v0 = <875000>;
+ opp-microvolt-speed1-pvs6-v0 = <875000>;
+ opp-microvolt-speed2-pvs0-v0 = <950000>;
+ opp-microvolt-speed2-pvs1-v0 = <925000>;
+ opp-microvolt-speed2-pvs2-v0 = <900000>;
+ opp-microvolt-speed2-pvs3-v0 = <900000>;
+ opp-microvolt-speed2-pvs4-v0 = <875000>;
+ opp-microvolt-speed2-pvs5-v0 = <875000>;
+ opp-microvolt-speed2-pvs6-v0 = <875000>;
+ opp-microvolt-speed14-pvs0-v0 = <950000>;
+ opp-microvolt-speed14-pvs1-v0 = <950000>;
+ opp-microvolt-speed14-pvs2-v0 = <925000>;
+ opp-microvolt-speed14-pvs3-v0 = <900000>;
+ opp-microvolt-speed14-pvs4-v0 = <875000>;
+ opp-microvolt-speed14-pvs5-v0 = <875000>;
+ opp-microvolt-speed14-pvs6-v0 = <875000>;
+ };
+
+ opp-486000000 {
+ opp-hz = /bits/ 64 <486000000>;
+ opp-microvolt-speed0-pvs0-v0 = <975000>;
+ opp-microvolt-speed0-pvs1-v0 = <925000>;
+ opp-microvolt-speed0-pvs3-v0 = <875000>;
+ opp-microvolt-speed0-pvs3-v0 = <875000>;
+ opp-microvolt-speed1-pvs0-v0 = <950000>;
+ opp-microvolt-speed1-pvs1-v0 = <950000>;
+ opp-microvolt-speed1-pvs2-v0 = <925000>;
+ opp-microvolt-speed1-pvs3-v0 = <900000>;
+ opp-microvolt-speed1-pvs4-v0 = <875000>;
+ opp-microvolt-speed1-pvs5-v0 = <875000>;
+ opp-microvolt-speed1-pvs6-v0 = <875000>;
+ opp-microvolt-speed2-pvs0-v0 = <950000>;
+ opp-microvolt-speed2-pvs1-v0 = <925000>;
+ opp-microvolt-speed2-pvs2-v0 = <900000>;
+ opp-microvolt-speed2-pvs3-v0 = <900000>;
+ opp-microvolt-speed2-pvs4-v0 = <875000>;
+ opp-microvolt-speed2-pvs5-v0 = <875000>;
+ opp-microvolt-speed2-pvs6-v0 = <875000>;
+ opp-microvolt-speed14-pvs0-v0 = <950000>;
+ opp-microvolt-speed14-pvs1-v0 = <950000>;
+ opp-microvolt-speed14-pvs2-v0 = <925000>;
+ opp-microvolt-speed14-pvs3-v0 = <900000>;
+ opp-microvolt-speed14-pvs4-v0 = <875000>;
+ opp-microvolt-speed14-pvs5-v0 = <875000>;
+ opp-microvolt-speed14-pvs6-v0 = <875000>;
+ };
+
+ opp-384000000 {
+ opp-hz = /bits/ 64 <384000000>;
+ opp-microvolt-speed0-pvs0-v0 = <950000>;
+ opp-microvolt-speed0-pvs1-v0 = <900000>;
+ opp-microvolt-speed0-pvs3-v0 = <850000>;
+ opp-microvolt-speed0-pvs3-v0 = <850000>;
+ opp-microvolt-speed1-pvs0-v0 = <950000>;
+ opp-microvolt-speed1-pvs1-v0 = <950000>;
+ opp-microvolt-speed1-pvs2-v0 = <925000>;
+ opp-microvolt-speed1-pvs3-v0 = <900000>;
+ opp-microvolt-speed1-pvs4-v0 = <875000>;
+ opp-microvolt-speed1-pvs5-v0 = <875000>;
+ opp-microvolt-speed1-pvs6-v0 = <875000>;
+ opp-microvolt-speed2-pvs0-v0 = <950000>;
+ opp-microvolt-speed2-pvs1-v0 = <925000>;
+ opp-microvolt-speed2-pvs2-v0 = <900000>;
+ opp-microvolt-speed2-pvs3-v0 = <900000>;
+ opp-microvolt-speed2-pvs4-v0 = <875000>;
+ opp-microvolt-speed2-pvs5-v0 = <875000>;
+ opp-microvolt-speed2-pvs6-v0 = <875000>;
+ opp-microvolt-speed14-pvs0-v0 = <950000>;
+ opp-microvolt-speed14-pvs1-v0 = <950000>;
+ opp-microvolt-speed14-pvs2-v0 = <925000>;
+ opp-microvolt-speed14-pvs3-v0 = <900000>;
+ opp-microvolt-speed14-pvs4-v0 = <875000>;
+ opp-microvolt-speed14-pvs5-v0 = <875000>;
+ opp-microvolt-speed14-pvs6-v0 = <875000>;
+ };
+};
+
+EXAMPLE 2:
+---------
+/* For arch/arm/boot/dts/qcom-msm8974.dtsi--> format 'B' */
+
+qfprom: qfprom@700000 {
+ compatible = "qcom,qfprom";
+ reg = <0x00700000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ pvs_efuse: pvs {
+ reg = <0xc0 0x8>;
+ };
+};
+
+cpu_opp_table: opp-table {
+ compatible = "operating-points-v2-krait-cpu";
+ nvmem-cells = <&pvs_efuse>;
+
+ /*
+ * Missing opp-shared property means CPUs switch DVFS states
+ * independently.
+ */
+ opp-960000000 {
+ opp-hz = /bits/ 64 <960000000>;
+ opp-microvolt-speed0-pvs0-v0 = <915000>;
+ opp-microvolt-speed0-pvs1-v0 = <895000>;
+ opp-microvolt-speed0-pvs2-v0 = <875000>;
+ opp-microvolt-speed0-pvs3-v0 = <860000>;
+ opp-microvolt-speed0-pvs4-v0 = <850000>;
+ opp-microvolt-speed0-pvs5-v0 = <840000>;
+ opp-microvolt-speed0-pvs6-v0 = <830000>;
+ opp-microvolt-speed2-pvs0-v0 = <875000>;
+ opp-microvolt-speed2-pvs1-v0 = <860000>;
+ opp-microvolt-speed2-pvs2-v0 = <845000>;
+ opp-microvolt-speed2-pvs3-v0 = <830000>;
+ opp-microvolt-speed2-pvs4-v0 = <820000>;
+ opp-microvolt-speed2-pvs5-v0 = <810000>;
+ opp-microvolt-speed2-pvs6-v0 = <800000>;
+ opp-microvolt-speed1-pvs0-v0 = <840000>;
+ opp-microvolt-speed1-pvs1-v0 = <825000>;
+ opp-microvolt-speed1-pvs2-v0 = <810000>;
+ opp-microvolt-speed1-pvs3-v0 = <795000>;
+ opp-microvolt-speed1-pvs4-v0 = <785000>;
+ opp-microvolt-speed1-pvs5-v0 = <775000>;
+ opp-microvolt-speed1-pvs6-v0 = <765000>;
+
+ opp-microamp-speed0-pvs0-v0 = <252>;
+ opp-microamp-speed0-pvs1-v0 = <252>;
+ opp-microamp-speed0-pvs2-v0 = <252>;
+ opp-microamp-speed0-pvs3-v0 = <252>;
+ opp-microamp-speed0-pvs4-v0 = <252>;
+ opp-microamp-speed0-pvs5-v0 = <252>;
+ opp-microamp-speed0-pvs6-v0 = <252>;
+ opp-microamp-speed2-pvs0-v0 = <245>;
+ opp-microamp-speed2-pvs1-v0 = <245>;
+ opp-microamp-speed2-pvs2-v0 = <245>;
+ opp-microamp-speed2-pvs3-v0 = <245>;
+ opp-microamp-speed2-pvs4-v0 = <245>;
+ opp-microamp-speed2-pvs5-v0 = <245>;
+ opp-microamp-speed2-pvs6-v0 = <245>;
+ opp-microamp-speed1-pvs0-v0 = <242>;
+ opp-microamp-speed1-pvs1-v0 = <242>;
+ opp-microamp-speed1-pvs2-v0 = <242>;
+ opp-microamp-speed1-pvs3-v0 = <242>;
+ opp-microamp-speed1-pvs4-v0 = <242>;
+ opp-microamp-speed1-pvs5-v0 = <242>;
+ opp-microamp-speed1-pvs6-v0 = <242>;
+ };
+
+ opp-883200000 {
+ opp-hz = /bits/ 64 <883200000>;
+ opp-microvolt-speed0-pvs0-v0 = <900000>;
+ opp-microvolt-speed0-pvs1-v0 = <885000>;
+ opp-microvolt-speed0-pvs2-v0 = <865000>;
+ opp-microvolt-speed0-pvs3-v0 = <850000>;
+ opp-microvolt-speed0-pvs4-v0 = <840000>;
+ opp-microvolt-speed0-pvs5-v0 = <830000>;
+ opp-microvolt-speed0-pvs6-v0 = <820000>;
+ opp-microvolt-speed2-pvs0-v0 = <865000>;
+ opp-microvolt-speed2-pvs1-v0 = <850000>;
+ opp-microvolt-speed2-pvs2-v0 = <835000>;
+ opp-microvolt-speed2-pvs3-v0 = <820000>;
+ opp-microvolt-speed2-pvs4-v0 = <810000>;
+ opp-microvolt-speed2-pvs5-v0 = <800000>;
+ opp-microvolt-speed2-pvs6-v0 = <790000>;
+ opp-microvolt-speed1-pvs0-v0 = <830000>;
+ opp-microvolt-speed1-pvs1-v0 = <815000>;
+ opp-microvolt-speed1-pvs2-v0 = <800000>;
+ opp-microvolt-speed1-pvs3-v0 = <785000>;
+ opp-microvolt-speed1-pvs4-v0 = <775000>;
+ opp-microvolt-speed1-pvs5-v0 = <765000>;
+ opp-microvolt-speed1-pvs6-v0 = <755000>;
+
+ opp-microamp-speed0-pvs0-v0 = <229>;
+ opp-microamp-speed0-pvs1-v0 = <229>;
+ opp-microamp-speed0-pvs2-v0 = <229>;
+ opp-microamp-speed0-pvs3-v0 = <229>;
+ opp-microamp-speed0-pvs4-v0 = <229>;
+ opp-microamp-speed0-pvs5-v0 = <229>;
+ opp-microamp-speed0-pvs6-v0 = <229>;
+ opp-microamp-speed2-pvs0-v0 = <223>;
+ opp-microamp-speed2-pvs1-v0 = <223>;
+ opp-microamp-speed2-pvs2-v0 = <223>;
+ opp-microamp-speed2-pvs3-v0 = <223>;
+ opp-microamp-speed2-pvs4-v0 = <223>;
+ opp-microamp-speed2-pvs5-v0 = <223>;
+ opp-microamp-speed2-pvs6-v0 = <223>;
+ opp-microamp-speed1-pvs0-v0 = <221>;
+ opp-microamp-speed1-pvs1-v0 = <221>;
+ opp-microamp-speed1-pvs2-v0 = <221>;
+ opp-microamp-speed1-pvs3-v0 = <221>;
+ opp-microamp-speed1-pvs4-v0 = <221>;
+ opp-microamp-speed1-pvs5-v0 = <221>;
+ opp-microamp-speed1-pvs6-v0 = <221>;
+ };
+};
--
1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: sricharan@codeaurora.org (Sricharan R)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v10 14/14] dt-bindings: cpufreq: Document operating-points-v2-krait-cpu
Date: Tue, 19 Jun 2018 19:15:25 +0530 [thread overview]
Message-ID: <1529415925-28915-15-git-send-email-sricharan@codeaurora.org> (raw)
In-Reply-To: <1529415925-28915-1-git-send-email-sricharan@codeaurora.org>
In Certain QCOM SoCs like ipq8064, apq8064, msm8960, msm8974
that has KRAIT processors the voltage/current value of each OPP
varies based on the silicon variant in use.
operating-points-v2-krait-cpu specifies the phandle to nvmem efuse cells
and the operating-points-v2 table for each opp. The qcom-cpufreq driver
reads the efuse value from the SoC to provide the required information
that is used to determine the voltage and current value for each OPP of
operating-points-v2 table when it is parsed by the OPP framework.
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
---
.../devicetree/bindings/cpufreq/krait-cpufreq.txt | 363 +++++++++++++++++++++
1 file changed, 363 insertions(+)
create mode 100644 Documentation/devicetree/bindings/cpufreq/krait-cpufreq.txt
diff --git a/Documentation/devicetree/bindings/cpufreq/krait-cpufreq.txt b/Documentation/devicetree/bindings/cpufreq/krait-cpufreq.txt
new file mode 100644
index 0000000..7b083c7
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/krait-cpufreq.txt
@@ -0,0 +1,363 @@
+QCOM KRAIT CPUFreq and OPP bindings
+===================================
+
+In Certain QCOM SoCs like ipq8064, apq8064, msm8960, msm8974
+that has KRAIT processors the voltage value of each OPP varies
+based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
+defines the voltage and current value based on the speed/pvs/version
+combination blown in the efuse. The qcom-cpufreq driver reads the efuse
+value from the SoC to provide the OPP framework with required information.
+This is used to determine the voltage and current value for each OPP of
+operating-points-v2 table when it is parsed by the OPP framework.
+
+Required properties:
+--------------------
+In 'cpus' nodes:
+- operating-points-v2: Phandle to the operating-points-v2 table to use.
+
+In 'operating-points-v2' table:
+- compatible: Should be
+ - 'operating-points-v2-krait-cpu' for ipq8064, apq8064, msm8960,
+ msm8974.
+- nvmem-cells: A phandle pointing to a nvmem-cells node representing the
+ efuse registers that has information about the
+ speedbin/pvs/version that is used to select the right
+ voltage/current value pair. Note that the length field of the
+ nvmem-cell is used to differentiate between format 'A' or 'B'
+ efuse settings. len of '4' bytes is for format 'A' and '8'
+ bytes for format 'B'. Please refer the for nvmem-cells
+ bindings Documentation/devicetree/bindings/nvmem/nvmem.txt
+ and also examples below for both the cases.
+Example 1:
+---------
+
+/* For arch/arm/boot/dts/apq8064.dtsi --> format 'A' */
+cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ CPU0: cpu at 0 {
+ compatible = "qcom,krait";
+ enable-method = "qcom,kpss-acc-v1";
+ device_type = "cpu";
+ reg = <0>;
+ next-level-cache = <&L2>;
+ qcom,acc = <&acc0>;
+ qcom,saw = <&saw0>;
+ cpu-idle-states = <&CPU_SPC>;
+ operating-points-v2 = <&cpu_opp_table>;
+ };
+};
+
+qfprom: qfprom at 700000 {
+ compatible = "qcom,qfprom";
+ reg = <0x00700000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ pvs_efuse: pvs {
+ reg = <0xc0 0x4>;
+ };
+};
+
+cpu_opp_table: opp-table {
+ compatible = "operating-points-v2-krait-cpu";
+ nvmem-cells = <&pvs_efuse>;
+
+ /*
+ * Missing opp-shared property means CPUs switch DVFS states
+ * independently.
+ */
+
+ opp-918000000 {
+ opp-hz = /bits/ 64 <918000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1100000>;
+ opp-microvolt-speed0-pvs1-v0 = <1050000>;
+ opp-microvolt-speed0-pvs3-v0 = <1000000>;
+ opp-microvolt-speed0-pvs4-v0 = <975000>;
+ opp-microvolt-speed1-pvs0-v0 = <1025000>;
+ opp-microvolt-speed1-pvs1-v0 = <1000000>;
+ opp-microvolt-speed1-pvs2-v0 = <950000>;
+ opp-microvolt-speed1-pvs3-v0 = <925000>;
+ opp-microvolt-speed1-pvs4-v0 = <900000>;
+ opp-microvolt-speed1-pvs5-v0 = <900000>;
+ opp-microvolt-speed1-pvs6-v0 = <900000>;
+ opp-microvolt-speed2-pvs0-v0 = <975000>;
+ opp-microvolt-speed2-pvs1-v0 = <950000>;
+ opp-microvolt-speed2-pvs2-v0 = <925000>;
+ opp-microvolt-speed2-pvs3-v0 = <912500>;
+ opp-microvolt-speed2-pvs4-v0 = <900000>;
+ opp-microvolt-speed2-pvs5-v0 = <900000>;
+ opp-microvolt-speed2-pvs6-v0 = <900000>;
+ opp-microvolt-speed14-pvs0-v0 = <1025000>;
+ opp-microvolt-speed14-pvs1-v0 = <1000000>;
+ opp-microvolt-speed14-pvs2-v0 = <950000>;
+ opp-microvolt-speed14-pvs3-v0 = <925000>;
+ opp-microvolt-speed14-pvs4-v0 = <900000>;
+ opp-microvolt-speed14-pvs5-v0 = <900000>;
+ opp-microvolt-speed14-pvs6-v0 = <900000>;
+ };
+
+ opp-810000000 {
+ opp-hz = /bits/ 64 <810000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1075000>;
+ opp-microvolt-speed0-pvs1-v0 = <1025000>;
+ opp-microvolt-speed0-pvs3-v0 = <975000>;
+ opp-microvolt-speed0-pvs3-v0 = <962500>;
+ opp-microvolt-speed1-pvs0-v0 = <1000000>;
+ opp-microvolt-speed1-pvs1-v0 = <975000>;
+ opp-microvolt-speed1-pvs2-v0 = <937500>;
+ opp-microvolt-speed1-pvs3-v0 = <900000>;
+ opp-microvolt-speed1-pvs4-v0 = <887500>;
+ opp-microvolt-speed1-pvs5-v0 = <887500>;
+ opp-microvolt-speed1-pvs6-v0 = <887500>;
+ opp-microvolt-speed2-pvs0-v0 = <962500>;
+ opp-microvolt-speed2-pvs1-v0 = <937500>;
+ opp-microvolt-speed2-pvs2-v0 = <912500>;
+ opp-microvolt-speed2-pvs3-v0 = <900000>;
+ opp-microvolt-speed2-pvs4-v0 = <887500>;
+ opp-microvolt-speed2-pvs5-v0 = <887500>;
+ opp-microvolt-speed2-pvs6-v0 = <887500>;
+ opp-microvolt-speed14-pvs0-v0 = <1000000>;
+ opp-microvolt-speed14-pvs1-v0 = <975000>;
+ opp-microvolt-speed14-pvs2-v0 = <937500>;
+ opp-microvolt-speed14-pvs3-v0 = <900000>;
+ opp-microvolt-speed14-pvs4-v0 = <887500>;
+ opp-microvolt-speed14-pvs5-v0 = <887500>;
+ opp-microvolt-speed14-pvs6-v0 = <887500>;
+ };
+
+ opp-702000000 {
+ opp-hz = /bits/ 64 <702000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1025000>;
+ opp-microvolt-speed0-pvs1-v0 = <975000>;
+ opp-microvolt-speed0-pvs3-v0 = <925000>;
+ opp-microvolt-speed0-pvs3-v0 = <925000>;
+ opp-microvolt-speed1-pvs0-v0 = <962500>;
+ opp-microvolt-speed1-pvs1-v0 = <962500>;
+ opp-microvolt-speed1-pvs2-v0 = <925000>;
+ opp-microvolt-speed1-pvs3-v0 = <900000>;
+ opp-microvolt-speed1-pvs4-v0 = <875000>;
+ opp-microvolt-speed1-pvs5-v0 = <875000>;
+ opp-microvolt-speed1-pvs6-v0 = <875000>;
+ opp-microvolt-speed2-pvs0-v0 = <950000>;
+ opp-microvolt-speed2-pvs1-v0 = <925000>;
+ opp-microvolt-speed2-pvs2-v0 = <900000>;
+ opp-microvolt-speed2-pvs3-v0 = 900000>;
+ opp-microvolt-speed2-pvs4-v0 = <875000>;
+ opp-microvolt-speed2-pvs5-v0 = <875000>;
+ opp-microvolt-speed2-pvs6-v0 = <875000>;
+ opp-microvolt-speed14-pvs0-v0 = <962500>;
+ opp-microvolt-speed14-pvs1-v0 = <962500>;
+ opp-microvolt-speed14-pvs2-v0 = <925000>;
+ opp-microvolt-speed14-pvs3-v0 = <900000>;
+ opp-microvolt-speed14-pvs4-v0 = <875000>;
+ opp-microvolt-speed14-pvs5-v0 = <875000>;
+ opp-microvolt-speed14-pvs6-v0 = <875000>;
+ };
+
+ opp-594000000 {
+ opp-hz = /bits/ 64 <594000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1000000>;
+ opp-microvolt-speed0-pvs1-v0 = <950000>;
+ opp-microvolt-speed0-pvs3-v0 = <900000>;
+ opp-microvolt-speed0-pvs3-v0 = <900000>;
+ opp-microvolt-speed1-pvs0-v0 = <950000>;
+ opp-microvolt-speed1-pvs1-v0 = <950000>;
+ opp-microvolt-speed1-pvs2-v0 = <925000>;
+ opp-microvolt-speed1-pvs3-v0 = <900000>;
+ opp-microvolt-speed1-pvs4-v0 = <875000>;
+ opp-microvolt-speed1-pvs5-v0 = <875000>;
+ opp-microvolt-speed1-pvs6-v0 = <875000>;
+ opp-microvolt-speed2-pvs0-v0 = <950000>;
+ opp-microvolt-speed2-pvs1-v0 = <925000>;
+ opp-microvolt-speed2-pvs2-v0 = <900000>;
+ opp-microvolt-speed2-pvs3-v0 = <900000>;
+ opp-microvolt-speed2-pvs4-v0 = <875000>;
+ opp-microvolt-speed2-pvs5-v0 = <875000>;
+ opp-microvolt-speed2-pvs6-v0 = <875000>;
+ opp-microvolt-speed14-pvs0-v0 = <950000>;
+ opp-microvolt-speed14-pvs1-v0 = <950000>;
+ opp-microvolt-speed14-pvs2-v0 = <925000>;
+ opp-microvolt-speed14-pvs3-v0 = <900000>;
+ opp-microvolt-speed14-pvs4-v0 = <875000>;
+ opp-microvolt-speed14-pvs5-v0 = <875000>;
+ opp-microvolt-speed14-pvs6-v0 = <875000>;
+ };
+
+ opp-486000000 {
+ opp-hz = /bits/ 64 <486000000>;
+ opp-microvolt-speed0-pvs0-v0 = <975000>;
+ opp-microvolt-speed0-pvs1-v0 = <925000>;
+ opp-microvolt-speed0-pvs3-v0 = <875000>;
+ opp-microvolt-speed0-pvs3-v0 = <875000>;
+ opp-microvolt-speed1-pvs0-v0 = <950000>;
+ opp-microvolt-speed1-pvs1-v0 = <950000>;
+ opp-microvolt-speed1-pvs2-v0 = <925000>;
+ opp-microvolt-speed1-pvs3-v0 = <900000>;
+ opp-microvolt-speed1-pvs4-v0 = <875000>;
+ opp-microvolt-speed1-pvs5-v0 = <875000>;
+ opp-microvolt-speed1-pvs6-v0 = <875000>;
+ opp-microvolt-speed2-pvs0-v0 = <950000>;
+ opp-microvolt-speed2-pvs1-v0 = <925000>;
+ opp-microvolt-speed2-pvs2-v0 = <900000>;
+ opp-microvolt-speed2-pvs3-v0 = <900000>;
+ opp-microvolt-speed2-pvs4-v0 = <875000>;
+ opp-microvolt-speed2-pvs5-v0 = <875000>;
+ opp-microvolt-speed2-pvs6-v0 = <875000>;
+ opp-microvolt-speed14-pvs0-v0 = <950000>;
+ opp-microvolt-speed14-pvs1-v0 = <950000>;
+ opp-microvolt-speed14-pvs2-v0 = <925000>;
+ opp-microvolt-speed14-pvs3-v0 = <900000>;
+ opp-microvolt-speed14-pvs4-v0 = <875000>;
+ opp-microvolt-speed14-pvs5-v0 = <875000>;
+ opp-microvolt-speed14-pvs6-v0 = <875000>;
+ };
+
+ opp-384000000 {
+ opp-hz = /bits/ 64 <384000000>;
+ opp-microvolt-speed0-pvs0-v0 = <950000>;
+ opp-microvolt-speed0-pvs1-v0 = <900000>;
+ opp-microvolt-speed0-pvs3-v0 = <850000>;
+ opp-microvolt-speed0-pvs3-v0 = <850000>;
+ opp-microvolt-speed1-pvs0-v0 = <950000>;
+ opp-microvolt-speed1-pvs1-v0 = <950000>;
+ opp-microvolt-speed1-pvs2-v0 = <925000>;
+ opp-microvolt-speed1-pvs3-v0 = <900000>;
+ opp-microvolt-speed1-pvs4-v0 = <875000>;
+ opp-microvolt-speed1-pvs5-v0 = <875000>;
+ opp-microvolt-speed1-pvs6-v0 = <875000>;
+ opp-microvolt-speed2-pvs0-v0 = <950000>;
+ opp-microvolt-speed2-pvs1-v0 = <925000>;
+ opp-microvolt-speed2-pvs2-v0 = <900000>;
+ opp-microvolt-speed2-pvs3-v0 = <900000>;
+ opp-microvolt-speed2-pvs4-v0 = <875000>;
+ opp-microvolt-speed2-pvs5-v0 = <875000>;
+ opp-microvolt-speed2-pvs6-v0 = <875000>;
+ opp-microvolt-speed14-pvs0-v0 = <950000>;
+ opp-microvolt-speed14-pvs1-v0 = <950000>;
+ opp-microvolt-speed14-pvs2-v0 = <925000>;
+ opp-microvolt-speed14-pvs3-v0 = <900000>;
+ opp-microvolt-speed14-pvs4-v0 = <875000>;
+ opp-microvolt-speed14-pvs5-v0 = <875000>;
+ opp-microvolt-speed14-pvs6-v0 = <875000>;
+ };
+};
+
+EXAMPLE 2:
+---------
+/* For arch/arm/boot/dts/qcom-msm8974.dtsi--> format 'B' */
+
+qfprom: qfprom at 700000 {
+ compatible = "qcom,qfprom";
+ reg = <0x00700000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ pvs_efuse: pvs {
+ reg = <0xc0 0x8>;
+ };
+};
+
+cpu_opp_table: opp-table {
+ compatible = "operating-points-v2-krait-cpu";
+ nvmem-cells = <&pvs_efuse>;
+
+ /*
+ * Missing opp-shared property means CPUs switch DVFS states
+ * independently.
+ */
+ opp-960000000 {
+ opp-hz = /bits/ 64 <960000000>;
+ opp-microvolt-speed0-pvs0-v0 = <915000>;
+ opp-microvolt-speed0-pvs1-v0 = <895000>;
+ opp-microvolt-speed0-pvs2-v0 = <875000>;
+ opp-microvolt-speed0-pvs3-v0 = <860000>;
+ opp-microvolt-speed0-pvs4-v0 = <850000>;
+ opp-microvolt-speed0-pvs5-v0 = <840000>;
+ opp-microvolt-speed0-pvs6-v0 = <830000>;
+ opp-microvolt-speed2-pvs0-v0 = <875000>;
+ opp-microvolt-speed2-pvs1-v0 = <860000>;
+ opp-microvolt-speed2-pvs2-v0 = <845000>;
+ opp-microvolt-speed2-pvs3-v0 = <830000>;
+ opp-microvolt-speed2-pvs4-v0 = <820000>;
+ opp-microvolt-speed2-pvs5-v0 = <810000>;
+ opp-microvolt-speed2-pvs6-v0 = <800000>;
+ opp-microvolt-speed1-pvs0-v0 = <840000>;
+ opp-microvolt-speed1-pvs1-v0 = <825000>;
+ opp-microvolt-speed1-pvs2-v0 = <810000>;
+ opp-microvolt-speed1-pvs3-v0 = <795000>;
+ opp-microvolt-speed1-pvs4-v0 = <785000>;
+ opp-microvolt-speed1-pvs5-v0 = <775000>;
+ opp-microvolt-speed1-pvs6-v0 = <765000>;
+
+ opp-microamp-speed0-pvs0-v0 = <252>;
+ opp-microamp-speed0-pvs1-v0 = <252>;
+ opp-microamp-speed0-pvs2-v0 = <252>;
+ opp-microamp-speed0-pvs3-v0 = <252>;
+ opp-microamp-speed0-pvs4-v0 = <252>;
+ opp-microamp-speed0-pvs5-v0 = <252>;
+ opp-microamp-speed0-pvs6-v0 = <252>;
+ opp-microamp-speed2-pvs0-v0 = <245>;
+ opp-microamp-speed2-pvs1-v0 = <245>;
+ opp-microamp-speed2-pvs2-v0 = <245>;
+ opp-microamp-speed2-pvs3-v0 = <245>;
+ opp-microamp-speed2-pvs4-v0 = <245>;
+ opp-microamp-speed2-pvs5-v0 = <245>;
+ opp-microamp-speed2-pvs6-v0 = <245>;
+ opp-microamp-speed1-pvs0-v0 = <242>;
+ opp-microamp-speed1-pvs1-v0 = <242>;
+ opp-microamp-speed1-pvs2-v0 = <242>;
+ opp-microamp-speed1-pvs3-v0 = <242>;
+ opp-microamp-speed1-pvs4-v0 = <242>;
+ opp-microamp-speed1-pvs5-v0 = <242>;
+ opp-microamp-speed1-pvs6-v0 = <242>;
+ };
+
+ opp-883200000 {
+ opp-hz = /bits/ 64 <883200000>;
+ opp-microvolt-speed0-pvs0-v0 = <900000>;
+ opp-microvolt-speed0-pvs1-v0 = <885000>;
+ opp-microvolt-speed0-pvs2-v0 = <865000>;
+ opp-microvolt-speed0-pvs3-v0 = <850000>;
+ opp-microvolt-speed0-pvs4-v0 = <840000>;
+ opp-microvolt-speed0-pvs5-v0 = <830000>;
+ opp-microvolt-speed0-pvs6-v0 = <820000>;
+ opp-microvolt-speed2-pvs0-v0 = <865000>;
+ opp-microvolt-speed2-pvs1-v0 = <850000>;
+ opp-microvolt-speed2-pvs2-v0 = <835000>;
+ opp-microvolt-speed2-pvs3-v0 = <820000>;
+ opp-microvolt-speed2-pvs4-v0 = <810000>;
+ opp-microvolt-speed2-pvs5-v0 = <800000>;
+ opp-microvolt-speed2-pvs6-v0 = <790000>;
+ opp-microvolt-speed1-pvs0-v0 = <830000>;
+ opp-microvolt-speed1-pvs1-v0 = <815000>;
+ opp-microvolt-speed1-pvs2-v0 = <800000>;
+ opp-microvolt-speed1-pvs3-v0 = <785000>;
+ opp-microvolt-speed1-pvs4-v0 = <775000>;
+ opp-microvolt-speed1-pvs5-v0 = <765000>;
+ opp-microvolt-speed1-pvs6-v0 = <755000>;
+
+ opp-microamp-speed0-pvs0-v0 = <229>;
+ opp-microamp-speed0-pvs1-v0 = <229>;
+ opp-microamp-speed0-pvs2-v0 = <229>;
+ opp-microamp-speed0-pvs3-v0 = <229>;
+ opp-microamp-speed0-pvs4-v0 = <229>;
+ opp-microamp-speed0-pvs5-v0 = <229>;
+ opp-microamp-speed0-pvs6-v0 = <229>;
+ opp-microamp-speed2-pvs0-v0 = <223>;
+ opp-microamp-speed2-pvs1-v0 = <223>;
+ opp-microamp-speed2-pvs2-v0 = <223>;
+ opp-microamp-speed2-pvs3-v0 = <223>;
+ opp-microamp-speed2-pvs4-v0 = <223>;
+ opp-microamp-speed2-pvs5-v0 = <223>;
+ opp-microamp-speed2-pvs6-v0 = <223>;
+ opp-microamp-speed1-pvs0-v0 = <221>;
+ opp-microamp-speed1-pvs1-v0 = <221>;
+ opp-microamp-speed1-pvs2-v0 = <221>;
+ opp-microamp-speed1-pvs3-v0 = <221>;
+ opp-microamp-speed1-pvs4-v0 = <221>;
+ opp-microamp-speed1-pvs5-v0 = <221>;
+ opp-microamp-speed1-pvs6-v0 = <221>;
+ };
+};
--
1.9.1
next prev parent reply other threads:[~2018-06-19 13:45 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-19 13:45 [PATCH v10 00/14] Krait clocks + Krait CPUfreq Sricharan R
2018-06-19 13:45 ` Sricharan R
2018-06-19 13:45 ` [PATCH v10 01/14] ARM: Add Krait L2 register accessor functions Sricharan R
2018-06-19 13:45 ` Sricharan R
2018-06-19 13:45 ` [PATCH v10 02/14] clk: qcom: Add support for High-Frequency PLLs (HFPLLs) Sricharan R
2018-06-19 13:45 ` Sricharan R
2018-06-19 13:45 ` [PATCH v10 03/14] clk: qcom: Add HFPLL driver Sricharan R
2018-06-19 13:45 ` Sricharan R
2018-06-19 13:45 ` [PATCH v10 04/14] dt-bindings: clock: Document qcom,hfpll Sricharan R
2018-06-19 13:45 ` Sricharan R
2018-06-19 13:45 ` [PATCH v10 05/14] clk: qcom: Add MSM8960/APQ8064's HFPLLs Sricharan R
2018-06-19 13:45 ` Sricharan R
2018-06-19 13:45 ` [PATCH v10 06/14] clk: qcom: Add IPQ806X's HFPLLs Sricharan R
2018-06-19 13:45 ` Sricharan R
2018-06-19 13:45 ` [PATCH v10 07/14] clk: qcom: Add support for Krait clocks Sricharan R
2018-06-19 13:45 ` Sricharan R
2018-06-19 13:45 ` [PATCH v10 08/14] clk: qcom: Add KPSS ACC/GCC driver Sricharan R
2018-06-19 13:45 ` Sricharan R
2018-06-19 13:45 ` [PATCH v10 09/14] dt-bindings: arm: Document qcom,kpss-gcc Sricharan R
2018-06-19 13:45 ` Sricharan R
2018-06-19 13:45 ` [PATCH v10 10/14] clk: qcom: Add Krait clock controller driver Sricharan R
2018-06-19 13:45 ` Sricharan R
2018-06-19 13:45 ` [PATCH v10 11/14] dt-bindings: clock: Document qcom,krait-cc Sricharan R
2018-06-19 13:45 ` Sricharan R
2018-06-19 13:45 ` [PATCH v10 12/14] clk: qcom: Add safe switch hook for krait mux clocks Sricharan R
2018-06-19 13:45 ` Sricharan R
2018-06-19 13:45 ` [PATCH v10 13/14] cpufreq: Add module to register cpufreq on Krait CPUs Sricharan R
2018-06-19 13:45 ` Sricharan R
2018-06-19 13:56 ` Sudeep Holla
2018-06-19 13:56 ` Sudeep Holla
2018-06-19 14:49 ` Craig Tatlor
2018-06-20 9:08 ` sricharan
2018-06-20 9:08 ` sricharan at codeaurora.org
2018-06-19 15:29 ` Craig Tatlor
2018-06-19 15:29 ` Craig Tatlor
2018-06-20 8:48 ` sricharan
2018-06-20 8:48 ` sricharan at codeaurora.org
2018-06-19 13:45 ` Sricharan R [this message]
2018-06-19 13:45 ` [PATCH v10 14/14] dt-bindings: cpufreq: Document operating-points-v2-krait-cpu Sricharan R
2018-06-27 9:31 ` [PATCH v10 00/14] Krait clocks + Krait CPUfreq Thierry Escande
2018-06-27 9:31 ` Thierry Escande
2018-06-28 4:29 ` Sricharan R
2018-06-28 4:29 ` Sricharan R
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