From: richard.gong@linux.intel.com To: gregkh@linuxfoundation.org, catalin.marinas@arm.com, will.deacon@arm.com, dinguyen@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, atull@kernel.org, mdf@kernel.org, arnd@arndb.de, corbet@lwn.net Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-fpga@vger.kernel.org, linux-doc@vger.kernel.org, yves.vandervennet@linux.intel.com, richard.gong@intel.com Subject: [PATCHv9 1/8] dt-bindings, firmware: add Intel Stratix10 service layer binding Date: Thu, 6 Sep 2018 14:25:03 -0500 [thread overview] Message-ID: <1536261910-16426-2-git-send-email-richard.gong@linux.intel.com> (raw) In-Reply-To: <1536261910-16426-1-git-send-email-richard.gong@linux.intel.com> From: Richard Gong <richard.gong@intel.com> Add a device tree binding for the Intel Stratix10 service layer driver Signed-off-by: Richard Gong <richard.gong@intel.com> Signed-off-by: Alan Tull <atull@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Moritz Fischer <mdf@kernel.org> --- v2: change to put service layer driver node under the firmware node change compatible to "intel, stratix10-svc" v3: no change v4: add Rob's Reviewed-by v5: no change v6: add Moritz's Acked-by v7: no change v8: no change v9: no chnage --- .../bindings/firmware/intel,stratix10-svc.txt | 57 ++++++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt diff --git a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt new file mode 100644 index 0000000..1fa6606 --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt @@ -0,0 +1,57 @@ +Intel Service Layer Driver for Stratix10 SoC +============================================ +Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard +processor system (HPS) and Secure Device Manager (SDM). When the FPGA is +configured from HPS, there needs to be a way for HPS to notify SDM the +location and size of the configuration data. Then SDM will get the +configuration data from that location and perform the FPGA configuration. + +To meet the whole system security needs and support virtual machine requesting +communication with SDM, only the secure world of software (EL3, Exception +Layer 3) can interface with SDM. All software entities running on other +exception layers must channel through the EL3 software whenever it needs +service from SDM. + +Intel Stratix10 service layer driver, running at privileged exception level +(EL1, Exception Layer 1), interfaces with the service providers and provides +the services for FPGA configuration, QSPI, Crypto and warm reset. Service layer +driver also manages secure monitor call (SMC) to communicate with secure monitor +code running in EL3. + +Required properties: +------------------- +The svc node has the following mandatory properties, must be located under +the firmware node. + +- compatible: "intel,stratix10-svc" +- method: smc or hvc + smc - Secure Monitor Call + hvc - Hypervisor Call +- memory-region: + phandle to the reserved memory node. See + Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt + for details + +Example: +------- + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + service_reserved: svcbuffer@0 { + compatible = "shared-dma-pool"; + reg = <0x0 0x0 0x0 0x1000000>; + alignment = <0x1000>; + no-map; + }; + }; + + firmware { + svc { + compatible = "intel,stratix10-svc"; + method = "smc"; + memory-region = <&service_reserved>; + }; + }; -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: richard.gong@linux.intel.com (richard.gong at linux.intel.com) To: linux-arm-kernel@lists.infradead.org Subject: [PATCHv9 1/8] dt-bindings, firmware: add Intel Stratix10 service layer binding Date: Thu, 6 Sep 2018 14:25:03 -0500 [thread overview] Message-ID: <1536261910-16426-2-git-send-email-richard.gong@linux.intel.com> (raw) In-Reply-To: <1536261910-16426-1-git-send-email-richard.gong@linux.intel.com> From: Richard Gong <richard.gong@intel.com> Add a device tree binding for the Intel Stratix10 service layer driver Signed-off-by: Richard Gong <richard.gong@intel.com> Signed-off-by: Alan Tull <atull@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Moritz Fischer <mdf@kernel.org> --- v2: change to put service layer driver node under the firmware node change compatible to "intel, stratix10-svc" v3: no change v4: add Rob's Reviewed-by v5: no change v6: add Moritz's Acked-by v7: no change v8: no change v9: no chnage --- .../bindings/firmware/intel,stratix10-svc.txt | 57 ++++++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt diff --git a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt new file mode 100644 index 0000000..1fa6606 --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt @@ -0,0 +1,57 @@ +Intel Service Layer Driver for Stratix10 SoC +============================================ +Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard +processor system (HPS) and Secure Device Manager (SDM). When the FPGA is +configured from HPS, there needs to be a way for HPS to notify SDM the +location and size of the configuration data. Then SDM will get the +configuration data from that location and perform the FPGA configuration. + +To meet the whole system security needs and support virtual machine requesting +communication with SDM, only the secure world of software (EL3, Exception +Layer 3) can interface with SDM. All software entities running on other +exception layers must channel through the EL3 software whenever it needs +service from SDM. + +Intel Stratix10 service layer driver, running at privileged exception level +(EL1, Exception Layer 1), interfaces with the service providers and provides +the services for FPGA configuration, QSPI, Crypto and warm reset. Service layer +driver also manages secure monitor call (SMC) to communicate with secure monitor +code running in EL3. + +Required properties: +------------------- +The svc node has the following mandatory properties, must be located under +the firmware node. + +- compatible: "intel,stratix10-svc" +- method: smc or hvc + smc - Secure Monitor Call + hvc - Hypervisor Call +- memory-region: + phandle to the reserved memory node. See + Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt + for details + +Example: +------- + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + service_reserved: svcbuffer at 0 { + compatible = "shared-dma-pool"; + reg = <0x0 0x0 0x0 0x1000000>; + alignment = <0x1000>; + no-map; + }; + }; + + firmware { + svc { + compatible = "intel,stratix10-svc"; + method = "smc"; + memory-region = <&service_reserved>; + }; + }; -- 2.7.4
next prev parent reply other threads:[~2018-09-06 19:17 UTC|newest] Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-09-06 19:25 [PATCHv9 0/8] Add Intel Stratix10 FPGA manager and service layer richard.gong 2018-09-06 19:25 ` richard.gong at linux.intel.com 2018-09-06 19:25 ` richard.gong [this message] 2018-09-06 19:25 ` [PATCHv9 1/8] dt-bindings, firmware: add Intel Stratix10 service layer binding richard.gong at linux.intel.com 2018-09-06 19:25 ` [PATCHv9 2/8] arm64: dts: stratix10: add stratix10 service driver binding to base dtsi richard.gong 2018-09-06 19:25 ` richard.gong at linux.intel.com 2018-09-06 19:25 ` [PATCHv9 3/8] misc: add Intel Stratix10 service layer driver richard.gong 2018-09-06 19:25 ` richard.gong at linux.intel.com 2018-09-06 19:25 ` [PATCHv9 4/8] dt-bindings: fpga: add Stratix10 SoC FPGA manager binding richard.gong 2018-09-06 19:25 ` richard.gong at linux.intel.com 2018-09-06 19:25 ` [PATCHv9 5/8] arm64: dts: stratix10: add fpga manager and region richard.gong 2018-09-06 19:25 ` richard.gong at linux.intel.com 2018-09-06 19:25 ` [PATCHv9 6/8] fpga: add intel stratix10 soc fpga manager driver richard.gong 2018-09-06 19:25 ` richard.gong at linux.intel.com 2018-09-06 19:25 ` [PATCHv9 7/8] Documentation: driver-api: add stratix10 service layer richard.gong 2018-09-06 19:25 ` richard.gong at linux.intel.com 2018-09-06 19:25 ` [PATCHv9 8/8] misc: add remote status update client support richard.gong 2018-09-06 19:25 ` richard.gong at linux.intel.com
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