From: Ludovic Barre <ludovic.Barre@st.com> To: Ulf Hansson <ulf.hansson@linaro.org>, Rob Herring <robh+dt@kernel.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue <alexandre.torgue@st.com>, <benjamin.gaignard@linaro.org>, Gerald Baeza <gerald.baeza@st.com>, Loic Pallardy <loic.pallardy@st.com>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-mmc@vger.kernel.org>, <linux-stm32@st-md-mailman.stormreply.com>, Ludovic Barre <ludovic.barre@st.com> Subject: [PATCH V4 16/25] mmc: mmci: add variant property to define dpsm bit Date: Tue, 2 Oct 2018 14:09:18 +0200 [thread overview] Message-ID: <1538482167-13819-17-git-send-email-ludovic.Barre@st.com> (raw) In-Reply-To: <1538482167-13819-1-git-send-email-ludovic.Barre@st.com> From: Ludovic Barre <ludovic.barre@st.com> This patch adds datactrl variant property to define dpsm enable bit. Needed to support the STM32 variant (STM32 has no dpsm enable bit). Signed-off-by: Ludovic Barre <ludovic.barre@st.com> --- drivers/mmc/host/mmci.c | 15 ++++++++++++--- drivers/mmc/host/mmci.h | 2 ++ 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 00a9244..97b0f5c 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -56,6 +56,7 @@ static struct variant_data variant_arm = { .cmdreg_srsp = MCI_CPSM_RESPONSE, .datalength_bits = 16, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .pwrreg_powerup = MCI_PWR_UP, .f_max = 100000000, .reversed_irq_handling = true, @@ -74,6 +75,7 @@ static struct variant_data variant_arm_extended_fifo = { .cmdreg_srsp = MCI_CPSM_RESPONSE, .datalength_bits = 16, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .pwrreg_powerup = MCI_PWR_UP, .f_max = 100000000, .mmcimask1 = true, @@ -92,6 +94,7 @@ static struct variant_data variant_arm_extended_fifo_hwfc = { .cmdreg_srsp = MCI_CPSM_RESPONSE, .datalength_bits = 16, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .pwrreg_powerup = MCI_PWR_UP, .f_max = 100000000, .mmcimask1 = true, @@ -111,6 +114,7 @@ static struct variant_data variant_u300 = { .cmdreg_srsp = MCI_CPSM_RESPONSE, .datalength_bits = 16, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN, .st_sdio = true, .pwrreg_powerup = MCI_PWR_ON, @@ -135,6 +139,7 @@ static struct variant_data variant_nomadik = { .cmdreg_srsp = MCI_CPSM_RESPONSE, .datalength_bits = 24, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN, .st_sdio = true, .st_clkdiv = true, @@ -162,6 +167,7 @@ static struct variant_data variant_ux500 = { .cmdreg_srsp = MCI_CPSM_RESPONSE, .datalength_bits = 24, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN, .st_sdio = true, .st_clkdiv = true, @@ -194,6 +200,7 @@ static struct variant_data variant_ux500v2 = { .datactrl_mask_ddrmode = MCI_DPSM_ST_DDRMODE, .datalength_bits = 24, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN, .st_sdio = true, .st_clkdiv = true, @@ -226,6 +233,7 @@ static struct variant_data variant_stm32 = { .cmdreg_srsp = MCI_CPSM_RESPONSE, .datalength_bits = 24, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN, .st_sdio = true, .st_clkdiv = true, @@ -252,6 +260,7 @@ static struct variant_data variant_qcom = { .blksz_datactrl4 = true, .datalength_bits = 24, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .pwrreg_powerup = MCI_PWR_UP, .f_max = 208000000, .explicit_mclk_control = true, @@ -971,11 +980,11 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) BUG_ON(1 << blksz_bits != data->blksz); if (variant->blksz_datactrl16) - datactrl = MCI_DPSM_ENABLE | (data->blksz << 16); + datactrl = variant->datactrl_dpsm_enable | (data->blksz << 16); else if (variant->blksz_datactrl4) - datactrl = MCI_DPSM_ENABLE | (data->blksz << 4); + datactrl = variant->datactrl_dpsm_enable | (data->blksz << 4); else - datactrl = MCI_DPSM_ENABLE | blksz_bits << 4; + datactrl = variant->datactrl_dpsm_enable | blksz_bits << 4; if (data->flags & MMC_DATA_READ) datactrl |= MCI_DPSM_DIRECTION; diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index e49aba3..bd89745 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -222,6 +222,7 @@ struct mmci_host; * register * @datactrl_mask_sdio: SDIO enable mask in datactrl register * @datactrl_blksz: block size in power of two + * @datactrl_dpsm_enable: enable value for DPSM * @pwrreg_powerup: power up value for MMCIPOWER register * @f_max: maximum clk frequency supported by the controller. * @signal_direction: input/out direction of bus signals can be indicated @@ -258,6 +259,7 @@ struct variant_data { unsigned int datactrl_mask_ddrmode; unsigned int datactrl_mask_sdio; unsigned int datactrl_blocksz; + unsigned int datactrl_dpsm_enable; u8 st_sdio:1; u8 st_clkdiv:1; u8 blksz_datactrl16:1; -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Ludovic Barre <ludovic.Barre@st.com> To: Ulf Hansson <ulf.hansson@linaro.org>, Rob Herring <robh+dt@kernel.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue <alexandre.torgue@st.com>, benjamin.gaignard@linaro.org, Gerald Baeza <gerald.baeza@st.com>, Loic Pallardy <loic.pallardy@st.com>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-mmc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, Ludovic Barre <ludovic.barre@st.com> Subject: [PATCH V4 16/25] mmc: mmci: add variant property to define dpsm bit Date: Tue, 2 Oct 2018 14:09:18 +0200 [thread overview] Message-ID: <1538482167-13819-17-git-send-email-ludovic.Barre@st.com> (raw) In-Reply-To: <1538482167-13819-1-git-send-email-ludovic.Barre@st.com> From: Ludovic Barre <ludovic.barre@st.com> This patch adds datactrl variant property to define dpsm enable bit. Needed to support the STM32 variant (STM32 has no dpsm enable bit). Signed-off-by: Ludovic Barre <ludovic.barre@st.com> --- drivers/mmc/host/mmci.c | 15 ++++++++++++--- drivers/mmc/host/mmci.h | 2 ++ 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 00a9244..97b0f5c 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -56,6 +56,7 @@ static struct variant_data variant_arm = { .cmdreg_srsp = MCI_CPSM_RESPONSE, .datalength_bits = 16, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .pwrreg_powerup = MCI_PWR_UP, .f_max = 100000000, .reversed_irq_handling = true, @@ -74,6 +75,7 @@ static struct variant_data variant_arm_extended_fifo = { .cmdreg_srsp = MCI_CPSM_RESPONSE, .datalength_bits = 16, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .pwrreg_powerup = MCI_PWR_UP, .f_max = 100000000, .mmcimask1 = true, @@ -92,6 +94,7 @@ static struct variant_data variant_arm_extended_fifo_hwfc = { .cmdreg_srsp = MCI_CPSM_RESPONSE, .datalength_bits = 16, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .pwrreg_powerup = MCI_PWR_UP, .f_max = 100000000, .mmcimask1 = true, @@ -111,6 +114,7 @@ static struct variant_data variant_u300 = { .cmdreg_srsp = MCI_CPSM_RESPONSE, .datalength_bits = 16, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN, .st_sdio = true, .pwrreg_powerup = MCI_PWR_ON, @@ -135,6 +139,7 @@ static struct variant_data variant_nomadik = { .cmdreg_srsp = MCI_CPSM_RESPONSE, .datalength_bits = 24, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN, .st_sdio = true, .st_clkdiv = true, @@ -162,6 +167,7 @@ static struct variant_data variant_ux500 = { .cmdreg_srsp = MCI_CPSM_RESPONSE, .datalength_bits = 24, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN, .st_sdio = true, .st_clkdiv = true, @@ -194,6 +200,7 @@ static struct variant_data variant_ux500v2 = { .datactrl_mask_ddrmode = MCI_DPSM_ST_DDRMODE, .datalength_bits = 24, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN, .st_sdio = true, .st_clkdiv = true, @@ -226,6 +233,7 @@ static struct variant_data variant_stm32 = { .cmdreg_srsp = MCI_CPSM_RESPONSE, .datalength_bits = 24, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN, .st_sdio = true, .st_clkdiv = true, @@ -252,6 +260,7 @@ static struct variant_data variant_qcom = { .blksz_datactrl4 = true, .datalength_bits = 24, .datactrl_blocksz = 11, + .datactrl_dpsm_enable = MCI_DPSM_ENABLE, .pwrreg_powerup = MCI_PWR_UP, .f_max = 208000000, .explicit_mclk_control = true, @@ -971,11 +980,11 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) BUG_ON(1 << blksz_bits != data->blksz); if (variant->blksz_datactrl16) - datactrl = MCI_DPSM_ENABLE | (data->blksz << 16); + datactrl = variant->datactrl_dpsm_enable | (data->blksz << 16); else if (variant->blksz_datactrl4) - datactrl = MCI_DPSM_ENABLE | (data->blksz << 4); + datactrl = variant->datactrl_dpsm_enable | (data->blksz << 4); else - datactrl = MCI_DPSM_ENABLE | blksz_bits << 4; + datactrl = variant->datactrl_dpsm_enable | blksz_bits << 4; if (data->flags & MMC_DATA_READ) datactrl |= MCI_DPSM_DIRECTION; diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index e49aba3..bd89745 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -222,6 +222,7 @@ struct mmci_host; * register * @datactrl_mask_sdio: SDIO enable mask in datactrl register * @datactrl_blksz: block size in power of two + * @datactrl_dpsm_enable: enable value for DPSM * @pwrreg_powerup: power up value for MMCIPOWER register * @f_max: maximum clk frequency supported by the controller. * @signal_direction: input/out direction of bus signals can be indicated @@ -258,6 +259,7 @@ struct variant_data { unsigned int datactrl_mask_ddrmode; unsigned int datactrl_mask_sdio; unsigned int datactrl_blocksz; + unsigned int datactrl_dpsm_enable; u8 st_sdio:1; u8 st_clkdiv:1; u8 blksz_datactrl16:1; -- 2.7.4
next prev parent reply other threads:[~2018-10-02 12:10 UTC|newest] Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-10-02 12:09 [PATCH V4 00/25] mmc: mmci: add sdmmc variant for stm32 Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 01/25] mmc: mmci: Change struct members from bool to u8 Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 02/25] mmc: mmci: create generic mmci_dma_setup Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-03 9:22 ` Ulf Hansson 2018-10-03 9:22 ` Ulf Hansson 2018-10-03 11:44 ` Ludovic BARRE 2018-10-03 11:44 ` Ludovic BARRE 2018-10-03 11:44 ` Ludovic BARRE 2018-10-02 12:09 ` [PATCH V4 03/25] mmc: mmci: introduce dma_priv pointer to mmci_host Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 04/25] mmc: mmci: merge prepare data functions Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 05/25] mmc: mmci: add prepare/unprepare_data callbacks Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 06/25] mmc: mmci: add get_next_data callback Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 07/25] mmc: mmci: add dma_release callback Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 08/25] mmc: mmci: add dma_start callback Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 09/25] mmc: mmci: add dma_finalize callback Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 10/25] mmc: mmci: add dma_error callback Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 11/25] mmc: mmci: add validate_data callback Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 12/25] mmc: mmci: add set_clk/pwrreg callbacks Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 13/25] mmc: mmci: add datactrl block size variant property Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 14/25] mmc: mmci: expand startbiterr to irqmask and error check Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 15/25] mmc: mmci: add variant properties to define cpsm & cmdresp bits Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre [this message] 2018-10-02 12:09 ` [PATCH V4 16/25] mmc: mmci: add variant property to define dpsm bit Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 17/25] mmc: mmci: add variant property to define irq pio mask Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 18/25] mmc: mmci: add variant property to write datactrl before command Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 19/25] mmc: mmci: add variant property to not read datacnt Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 20/25] dt-bindings: mmci: add optional reset property Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 21/25] mmc: " Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 22/25] mmc: mmci: add clock divider for stm32 sdmmc Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 23/25] mmc: mmci: add stm32 sdmmc registers Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 24/25] dt-bindings: mmci: add stm32 sdmmc variant Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre 2018-10-02 12:09 ` [PATCH V4 25/25] mmc: " Ludovic Barre 2018-10-02 12:09 ` Ludovic Barre
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