From: Talel Shenhar <talel@amazon.com> To: <broonie@kernel.org>, <linux-spi@vger.kernel.org>, <robh+dt@kernel.org>, <mark.rutland@arm.com>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org> Cc: <talel@amazon.com>, <jonnyc@amazon.com>, <ronenk@amazon.com>, <barakw@amazon.com>, David Woodhouse <dwmw@amazon.co.uk> Subject: [PATCH 1/2] dt-bindings: spi: dw: add compatible for Amazon's Alpine spi controller Date: Thu, 11 Oct 2018 14:20:06 +0300 [thread overview] Message-ID: <1539256807-25676-1-git-send-email-talel@amazon.com> (raw) In-Reply-To: <1539209339.1944.23.camel@impinj.com> This compatible adds the ability for dw spi controller driver to work with the dw spi controller found on Alpine chips. The dw spi controller has an auto-deselect of Chip-Select, in case there is no data inside the Tx FIFO. While working on platforms with Alpine chips, auto-deselect mode causes an issue for some spi devices that can't handle the Chip-Select deselect in the middle of a transaction. It is a normal behavior for a Tx FIFO to be empty in the middle of a transaction, due to busy cpu. In the Alpine chip family an option to change the default behavior was added to the original dw spi controller to prevent this issue of de-asserting Chip-Select once TX FIFO is empty. The change was to allow SW manual control of the Chip-Select. With this change, as long as the Slave Enable Register is asserted, the Chip-Select will be asserted. As a result, it is necessary to deselect the Slave Select Register once the transaction is done. This feature is enabled via a new device compatible string called 'amazon,alpine-dw-apb-ssi'. Once the driver identifies the new compatible string, it enables the hw fixup logic, by writing to a dedicated register found in the IP reserved area and will start manual deselecting the Slave Select Register when the transfer ends. Signed-off-by: Talel Shenhar <talel@amazon.com> Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> --- Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt index 642d3fb..2864bc6 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt @@ -2,7 +2,7 @@ Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface. Required properties: - compatible : "snps,dw-apb-ssi" or "mscc,<soc>-spi", where soc is "ocelot" or - "jaguar2" + "jaguar2", or "amazon,alpine-dw-apb-ssi" - reg : The register base for the controller. For "mscc,<soc>-spi", a second register set is required (named ICPU_CFG:SPI_MST) - interrupts : One interrupt, used by the controller. -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Talel Shenhar <talel@amazon.com> To: broonie@kernel.org, linux-spi@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: talel@amazon.com, jonnyc@amazon.com, ronenk@amazon.com, barakw@amazon.com, David Woodhouse <dwmw@amazon.co.uk> Subject: [PATCH 1/2] dt-bindings: spi: dw: add compatible for Amazon's Alpine spi controller Date: Thu, 11 Oct 2018 14:20:06 +0300 [thread overview] Message-ID: <1539256807-25676-1-git-send-email-talel@amazon.com> (raw) In-Reply-To: <1539209339.1944.23.camel@impinj.com> This compatible adds the ability for dw spi controller driver to work with the dw spi controller found on Alpine chips. The dw spi controller has an auto-deselect of Chip-Select, in case there is no data inside the Tx FIFO. While working on platforms with Alpine chips, auto-deselect mode causes an issue for some spi devices that can't handle the Chip-Select deselect in the middle of a transaction. It is a normal behavior for a Tx FIFO to be empty in the middle of a transaction, due to busy cpu. In the Alpine chip family an option to change the default behavior was added to the original dw spi controller to prevent this issue of de-asserting Chip-Select once TX FIFO is empty. The change was to allow SW manual control of the Chip-Select. With this change, as long as the Slave Enable Register is asserted, the Chip-Select will be asserted. As a result, it is necessary to deselect the Slave Select Register once the transaction is done. This feature is enabled via a new device compatible string called 'amazon,alpine-dw-apb-ssi'. Once the driver identifies the new compatible string, it enables the hw fixup logic, by writing to a dedicated register found in the IP reserved area and will start manual deselecting the Slave Select Register when the transfer ends. Signed-off-by: Talel Shenhar <talel@amazon.com> Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> --- Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt index 642d3fb..2864bc6 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt @@ -2,7 +2,7 @@ Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface. Required properties: - compatible : "snps,dw-apb-ssi" or "mscc,<soc>-spi", where soc is "ocelot" or - "jaguar2" + "jaguar2", or "amazon,alpine-dw-apb-ssi" - reg : The register base for the controller. For "mscc,<soc>-spi", a second register set is required (named ICPU_CFG:SPI_MST) - interrupts : One interrupt, used by the controller. -- 2.7.4
next prev parent reply other threads:[~2018-10-11 11:20 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-10-10 7:08 [PATCH 1/2] dt-bindings: spi: dw: add cs-override property Talel Shenhar 2018-10-10 7:08 ` Talel Shenhar 2018-10-10 7:08 ` [PATCH 2/2] dw: spi: add 'cs-override' DT property support Talel Shenhar 2018-10-10 7:08 ` Talel Shenhar 2018-10-10 10:18 ` [PATCH 1/2] dt-bindings: spi: dw: add cs-override property Mark Brown 2018-10-10 10:34 ` Talel Shenhar 2018-10-10 10:34 ` Talel Shenhar 2018-10-10 11:29 ` David Woodhouse 2018-10-10 11:29 ` David Woodhouse 2018-10-10 11:23 ` Talel Shenhar 2018-10-10 11:23 ` Talel Shenhar 2018-10-10 11:27 ` Mark Brown 2018-10-10 11:58 ` Woodhouse, David 2018-10-10 12:27 ` Mark Brown 2018-10-10 22:52 ` Trent Piepho 2018-10-10 15:15 ` [PATCH 1/2] dt-bindings: spi: dw: add compatible for Alpine spi controller Talel Shenhar 2018-10-10 15:15 ` Talel Shenhar 2018-10-10 15:15 ` [PATCH 2/2] dw: spi: add support " Talel Shenhar 2018-10-10 15:15 ` Talel Shenhar 2018-10-10 22:08 ` Trent Piepho 2018-10-11 11:20 ` Talel Shenhar [this message] 2018-10-11 11:20 ` [PATCH 1/2] dt-bindings: spi: dw: add compatible for Amazon's " Talel Shenhar 2018-10-11 11:20 ` [PATCH 2/2] dw: spi: add support " Talel Shenhar 2018-10-11 11:20 ` Talel Shenhar 2018-10-11 14:58 ` Applied "dw: spi: add support for Amazon's Alpine spi controller" to the spi tree Mark Brown 2018-10-11 14:58 ` Mark Brown 2018-10-11 14:58 ` Mark Brown 2018-10-11 13:44 ` [PATCH 1/2] dt-bindings: spi: dw: add compatible for Amazon's Alpine spi controller Mark Brown 2018-10-11 14:58 ` Applied "spi: dw: add compatible for Amazon's Alpine spi controller" to the spi tree Mark Brown 2018-10-11 14:58 ` Mark Brown 2018-10-11 14:58 ` Mark Brown 2018-10-11 11:22 ` [PATCH 2/2] dw: spi: add support for Alpine spi controller Talel Shenhar 2018-10-10 22:21 ` [PATCH 1/2] dt-bindings: spi: dw: add cs-override property Trent Piepho 2018-10-11 7:39 ` Talel Shenhar 2018-10-11 7:39 ` Talel Shenhar 2018-10-11 13:46 ` Mark Brown
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