From: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
To: Felipe Balbi <balbi@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Thinh Nguyen <Thinh.Nguyen@synopsys.com>,
linux-usb@vger.kernel.org
Cc: John Youn <John.Youn@synopsys.com>, <stable@vger.kernel.org>
Subject: [PATCH] usb: dwc3: core: Revise GHWPARAMS9 offset
Date: Mon, 25 Oct 2021 16:15:32 -0700 [thread overview]
Message-ID: <1541737108266a97208ff827805be1f32852590c.1635202893.git.Thinh.Nguyen@synopsys.com> (raw)
During our predesign phase for DWC_usb32, the GHWPARAMS9 register offset
was 0xc680. We revised our final design, and the GHWPARAMS9 offset is
now moved to 0xc6e8 on release.
Cc: <stable@vger.kernel.org>
Fixes: 16710380d3aa ("usb: dwc3: Capture new capability register GHWPARAMS9")
Signed-off-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
---
drivers/usb/dwc3/core.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 620c8d3914d7..5c491d0a19d7 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -143,7 +143,7 @@
#define DWC3_GHWPARAMS8 0xc600
#define DWC3_GUCTL3 0xc60c
#define DWC3_GFLADJ 0xc630
-#define DWC3_GHWPARAMS9 0xc680
+#define DWC3_GHWPARAMS9 0xc6e0
/* Device Registers */
#define DWC3_DCFG 0xc700
base-commit: e8d6336d9d7198013a7b307107908242a7a53b23
--
2.28.0
reply other threads:[~2021-10-25 23:15 UTC|newest]
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